4.3 Input and Output Characteristics for Non-I2C Digital Channels
The unidirectional Si86xx inputs and outputs are standard CMOS drivers/receivers. The nominal output impedance of an isolator driver
channel is approximately 50 Ω, ±40%, which is a combination of the value of the on-chip series termination resistor and channel resist-
ance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately
terminated with controlled impedance PCB traces. Table 4.1 Si86xx Operation Table on page 8 details powered and unpowered
operation of the Si86xx’s non-I2C digital channels.
Table 4.1. Si86xx Operation Table
VI Input1, 4 VDDI State11,2,3 VDDO State1,2,3 VO Output1, 4 Comments
H P P H Normal operation.
L P P L
X UP P L Upon transition of VDDI from un-
powered to powered, VO returns to
the same state as VI in less than 1
µs.
X P UP Undetermined Upon transition of VDDO from un-
powered to powered, VO returns to
the same state as VI within 1 µs.
Note:
1. VDDI and VDDO are the input and output power supplies. VI and VO are the respective input and output terminals.
2. Powered (P) state is defined as 3.0 V < VDD < 5.5 V.
3. Unpowered (UP) state is defined as VDD = 0 V.
4. X = not applicable; H = Logic High; L = Logic Low.
5. Note that an I/O can power the die for a given side through an internal diode if its source has adequate current.
6. For I2C channels, the outputs for a given side go to Hi-Z when power is lost on the opposite side.
4.4 Layout Recommendations
To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 VAC) must be physically separated from the
safety extra-low voltage circuits (SELV is a circuit with <30 VAC) by a certain distance (creepage/clearance). If a component, such as a
digital isolator, straddles this isolation barrier, it must meet those creepage/clearance requirements and also provide a sufficiently large
high-voltage breakdown protection rating (commonly referred to as working voltage protection). Table 5.6 Regulatory Information1 on
page 15 and Table 5.7 Insulation and Safety-Related Specifications on page 16 detail the working voltage and creepage/clearance
capabilities of the Si86xx. These tables also detail the component standards (UL1577, IEC60747, CSA 5A), which are readily accepted
by certification bodies to provide proof for end-system specifications requirements. Refer to the end-system specification (61010-1,
60950-1, 60601-1, etc.) requirements before starting any design that uses a digital isolator.
4.4.1 Supply Bypass
The Si860x family requires a 0.1 µF bypass capacitor between AVDD and AGND and BVDD and BGND. The capacitor should be
placed as close as possible to the package. To enhance the robustness of a design, the user may also include resistors (50–300 Ω ) in
series with the inputs and outputs if the system is excessively noisy.
4.4.2 Output Pin Termination
The nominal output impedance of an non-I2C isolator channel is approximately 50 Ω, ±40%, which is a combination of the value of the
on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects
will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces.
Si860x Data Sheet
Device Operation
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