IP4059CX5/LF,135"" - NXP SEMICONDUCTORS

1. Product profile

1.1 General description

The IP4059CX5 is designed to protect several I/O pins of computer interfaces, such as

Universal Serial Bus (USB) 2.0, USB On-The-Go (OTG), Ethernet, Digital V isual In terface

(DVI) etc. The IP40 59 CX5 incorp or ates ultra-low capacity diodes to pro vid e pr ot ect ion to

downstream components from ElectroStatic Discharge (ESD) voltages as high as 8kV

contact discharge according to the IEC 61000-4-2 model.

The device is fabricated using monolithic silicon technology and integrates four ultra-low

capacity ESD protection diodes in a 0.5 mm pitch Wafer-Level Chip-Scale Package

(WLCSP) measuring 0.96 mm by 1.34 mm only.

1.2 Features and benefits

Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)

4 ultra-low input capacity rail-to-rail ESD protection diodes with Cd=3.0pF

Integrated ESD protection withstanding 8 kV contact discharge and 15 kV air

discharge

WLCSP with 0.5 mm pitch

1.3 Applications

General purpose ElectroMagnetic Interference (EMI) and Radio Frequency Interference

(RFI) filtering and downstream ESD protection for USB ports inside:

Cellular and Personal Communication System (PCS) mobile handsets

PC peripherals and PCs

Cordless telephones

Wireless data and Local Area Network (LAN) systems

Personal Digital Assistants (PDAs)

Digital cameras

IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection to

IEC 61000-4-2 level 4

Rev. 1 — 15 September 2011 Product data sheet

Product data sheet Rev. 1 — 15 September 2011 2 of 9

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

2. Pinning information

3. Ordering information

4. Limiting values

[1] Device is qualified with > 200 pulses of 15 kV contact discharges each, according to the IEC 61000-4-2

model and far exceeds the specified level 4 (8 kV contact discharge).

Table 1. Pinning

Example of pin configuration for USB 2.0; other combinations for ID, D+ and D



in relation to pin A1,

pin C1 and pin C2 are possible.

Pin Symbol Description Simplified outline Graphic symbol

A1 DUSB 2.0 differential pair

C1 D+

B1 GND ground

A2 VBUS power

C2 ID USB OTG ID pin

008aaa262

transparent top view,

solder balls facing down

bump A1

index area

008aaa271

A1 C1

Table 2. Orderin g information

Type number Package

Name Description Version

IP4059CX5/LF WLCSP5 wafer level chip-size package; 5 bumps (2-1-2) IP4059CX5/LF

Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage 0 5 V

VIinput voltage 0.5 VCC +0.5 V

VESD electrostatic discharge voltage contact discharge [1] 15 +15 kV

air discharge [1] 15 +15 kV

IEC 61000-4-2 level 4

contact discharge 8+8 kV

air discharge 15 +15 kV

Tstg storage temperature 55 +150 C

Treflow(peak) peak reflow temperature 10 s maximum - 260 C

Tamb ambient temperature 40 +85 C

Product data sheet Rev. 1 — 15 September 2011 3 of 9

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

5. Characteristics

[1] Guaranteed by design.

Table 4. Electrical characteristics

Tamb =25



C; unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Cddiode capacitance pins A 1, C1 and C2;

Vbias(DC) =0V;

f=1MHz; V

A2 =0V

[1] -3.04.0pF

ILR reverse leakage current VI= 3.0 V - - 100 nA

VBR breakdown voltage Itest =1mA 6- 9V

VFforward voltage - 0.7 - V

Product data sheet Rev. 1 — 15 September 2011 4 of 9

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

6. Package outline

Fig 1. Package outline IP4059CX5/LF (WLCSP5)

wlcsp5_2-1-2_r_po

European

projection

WLCSP5: wafer level chip-size package; 5 bumps (2-1-2)

detail X

1/2 e

bump A1

index area

Table 5. Dimensions for Figure 1

Symbol Min Typ Max Unit

A 0.61 0.65 0.69 mm

A10.22 0.24 0.26 mm

A20.39 0.41 0.43 mm

b 0.27 0.32 0.37 mm

D 0.91 0.96 1.01 mm

E 1.29 1.34 1.39 mm

e-0.5-mm

e1- 0.435 - mm

e2-0.87-mm

Product data sheet Rev. 1 — 15 September 2011 5 of 9

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

7. Design and assembly recommendations

7.1 PCB design guidelines

For optimum performa nce it is recommended to u se a Non-Solder M ask Defined (NSMD),

also known as a copper-defined design, incorporating laser-drilled micro-vias connecting

the ground pad s to a buried ground-pla ne layer. This results in the lowe st possible ground

inductance and provides the best high frequency and ESD performance. For this case,

refer to Table 6 for the recommended PCB design parameters.

7.2 PCB assembly guidelines for Pb-free soldering

Table 6. Recommended PCB design parameters

Parameter Value or specification

PCB pad diameter 275 m

Micro-via diameter 100 m (0.004 inch)

Solder mask aperture diameter 375 m

Copper thickness 20 m to 40 m

Copper finish AuNi

PCB material FR4

Table 7. Assembly recommendations

Parameter Value or specification

Solder screen aperture diameter 330 m

Solder screen thickness 100 m (0.004 inch)

Solder paste: Pb-free SnAg (3 % to 4 %) Cu (0.5 % to 0.9 %)

Solder to flux ratio 50 : 50

Solder reflow profile see Figure 2

The device is capable of withstanding at least three reflows with this profile.

Fig 2. Pb-free solder reflow profile

001aai943

Treflow(peak)

250

230

217

(°C)

cooling rate

preheat

t2t (s)

Product data sheet Rev. 1 — 15 September 2011 6 of 9

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

8. Abbreviations

9. Revision history

Table 8. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Treflow(peak) p eak reflow temperature 230 - 260 C

t1time 1 soak time 60 - 180 s

t2time 2 tim e du ri n g T 250 C--30s

t3time 3 tim e du ri n g T 230 C10-50s

t4time 4 tim e during T > 217 C30-150s

t5time 5 - - 540 s

dT/dt rate of change of temperature cooling rate - - 6C/s

preheat 2.5 - 4.0 C/s

Table 9. Abbreviations

Acronym Description

DVI Digital Visual Interface

EMI ElectroMagnetic Interference

ESD ElectroStatic Discharge

FR4 Flame Retard 4

IEC International Electrotechnical Commission

I/O Input/Output

LAN Local Area Network

NSMD Non-Solder Mask Defined

OTG On-The-Go

PCB Printed-Circuit Board

PCS Personal Communication System

PDA Personal Digital Assistant

RFI Radio Frequency Interference

RoHS Restriction of Hazardous Substances

USB Universal Serial Bus

WLCSP Wafer-Level Chip-Scale Package

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

IP4059CX5 v.1 20110915 Product data sheet - -

Product data sheet Rev. 1 — 15 September 2011 7 of 9

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

10. Legal information

10.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

10.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conf lict with the short data sheet, the

full data sheet shall pre vail.

Product specificatio n — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyon d those described in the

Product data sheet.

10.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequ ential damages (including - wit hout limitatio n - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregat e and cumulative liabil ity towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descripti ons, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suit able for use in life support, life-crit ical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in perso nal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty tha t such application s will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associate d with t heir

applications and products.

NXP Semiconductors does not accept any liabil ity related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the appl ication or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for th e customer’s applications and pro ducts using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress rating s only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter ms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or t he grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from national authorities.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data fro m the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.

Product [short] dat a sheet Production This document contains the product specification.

Product data sheet Rev. 1 — 15 September 2011 8 of 9

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors prod uct is automotive qualified,

the product is not suitable for automo tive use. It i s neit her qualif ied nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automot ive specifications and standard s, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims result ing from custome r design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

10.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

11. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors IP4059CX5

Integrated USB 2.0 and USB OTG ESD protection

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 15 September 2011

Document identifier: IP4059CX5

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

12. Contents

1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Design and assembly recommen dations . . . . 5

7.1 PCB design guidelines . . . . . . . . . . . . . . . . . . . 5

7.2 PCB assembly guidelines for Pb-free soldering 5

8 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 6

9 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 6

10 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 7

10.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 7

10.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

10.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

10.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

11 Contact information. . . . . . . . . . . . . . . . . . . . . . 8

12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9