NuMicro M058/M0516 Product Brief
ARM Cortex-M0
32-BIT MICROCONTROLLER
Publication Release Date: May 30, 2011
- 1 - Revision V2.00
NuMicro Family
M058/M0516 Product Brief
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 2 - Revision V2.00
TABLE OF CONTENTS
1GENERAL DESCRIPTION∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙5
2FEATURES∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙6
3BLOCK DIAGRAM∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙10
4SELECTION TABLE∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙11
5PIN CONFIGURATION∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙12
5.1 QFN 33 pin ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙12
5.2 LQFP 48 pin ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙13
5.3 Pin Description∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙14
6TYPICAL APPLICATION CIRCUIT∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙17
7ELECTRICAL CHARACTERISTICS∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙18
7.1 Absolute Maximum Ratings ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙18
7.2 DC Electrical Characteristics ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙19
7.3 AC Electrical Characteristics ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙22
7.3.1External 4~24 MHz High Speed Crystal ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙22
7.3.2External 4~24 MHz High Speed Oscillator∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙22
7.3.3Typical Crystal Application Circuits ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙23
7.3.4Internal 22.1184 MHz High Speed Oscillator∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙24
7.3.5Internal 10 kHz Low Speed Oscillator∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙24
7.4 Analog Characteristics∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙25
7.4.1Specification of 600 kHz sps 12-bit SARADC∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙25
7.4.2Specification of LDO and Power management∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙26
7.4.3Specification of Low Voltage Reset∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙27
7.4.4Specification of Brownout Detector ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙27
7.4.5Specification of Power-On Reset (5V) ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙27
7.5 SPI Dynamic characteristics ∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙28
8PACKAGE DIMENSIONS∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙30
8.1 LQFP-48 (7x7x1.4mm2 Footprint 2.0mm)∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙30
8.2 QFN-33 (5X5 mm2, Thickness 0.8mm, Pitch 0.5 mm)∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙31
9REVISION HISTORY∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙∙32
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 3 - Revision V2.00
LIST OF FIGURES
Figure 3–1 NuMicro M051 Series Block Diagram ....................................................................... 10
Figure 4–1 NuMicro M051 Naming Rule..................................................................................... 11
Figure 5-1 NuMicro M051 Series QFN33 Pin Diagram............................................................... 12
Figure 5-2 NuMicro M051 Series LQFP-48 Pin Diagram............................................................ 13
Figure 8-1 Typical Crystal Application Circuit ................................................................................ 23
Figure 8-2 SPI Master timing ......................................................................................................... 29
Figure 8-3 SPI Slave timing ........................................................................................................... 29
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 4 - Revision V2.00
LIST OF TABLES
Table 4–1 NuMicro M051 Series Product Selection Guide......................................................... 11
Table 5-1 NuMicro M051 Series Pin Description ........................................................................ 16
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 5 - Revision V2.00
1 GENERAL DESCRIPTION
The NuMicro M051 series is a 32-bit microcontroller with embedded ARM® Cortex-M0 core for
industrial control and applications which need rich communication interfaces. The Cortex-M0 is
the newest ARM embedded processor with 32-bit performance and at a cost equivalent to
traditional 8-bit microcontroller. The NuMicro M051 series includes M052, M054, M058 and
M0516 families.
The M058/M0516 can run up to 50 MHz. Thus it can afford to support a variety of industrial
control and applications which need high CPU performance. The M058/M0516 has 32K/64K-byte
embedded flash, 4K-byte data flash, 4K-byte flash for the ISP, and 4K-byte embedded SRAM.
Many system level peripheral functions, such as I/O Port, EBI (External Bus Interface), Timer,
UART, SPI, I2C, PWM, ADC, Watchdog Timer and Brownout Detector, have been incorporated
into the M058/M0516 in order to reduce component count, board space and system cost. These
useful functions make the M058/M0516 powerful for a wide range of applications.
Additionally, the M058/M0516 is equipped with ISP (In-System Programming) and ICP (In-Circuit
Programming) functions, which allow the user to update the program memory without removing
the chip from the actual end product.
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 6 - Revision V2.00
2 FEATURES
z Core
ARM® Cortex-M0 core runs up to 50 MHz.
One 24-bit system timer.
Supports low power sleep mode.
A single-cycle 32-bit hardware multiplier.
NVIC for the 32 interrupt inputs, each with 4-levels of priority.
Supports Serial Wire Debug (SWD) interface and 2 watchpoints/4 breakpoints.
z Built-in LDO for Wide Operating Voltage Range: 2.5V to 5.5V
z Memory
32KB/64KB Flash memory for program memory (APROM)
4KB Flash memory for data memory (DataFlash)
4KB Flash memory for loader (LDROM)
4KB SRAM for internal scratch-pad RAM (SRAM)
z Clock Control
Programmable system clock source
External 4~24 MHz high speed crystal input
Internal 22.1184 MHz high speed oscillator (trimmed to 1% accuracy)
Internal 10 kHz low speed oscillator for Watchdog Timer
PLL allows CPU operation up to the maximum 50MHz
z I/O Port
Up to 40 general-purpose I/O (GPIO) pins for LQFP-48 package
Four I/O modes:
Quasi bi-direction
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 7 - Revision V2.00
Push-Pull output
Open-Drain output
Input only with high impendence
TTL/Schmitt trigger input selectable
I/O pin can be configured as interrupt source with edge/level setting
Supports high driver and high sink IO mode
z Timer
Provides four channel 32-bit timers, one 8-bit pre-scale counter with 24-bit up-timer for
each timer.
Independent clock source for each timer.
24-bit timer value is readable through TDR (Timer Data Register)
Provides one-shot, periodic and toggle operation modes.
z Watchdog Timer
Multiple clock sources
Supports wake-up from power down or idle mode
Interrupt or reset selectable on watchdog time-out
z PWM
Built-in up to four 16-bit PWM generators; providing eight PWM outputs or four
complementary paired PWM outputs
Individual clock source, clock divider, 8-bit pre-scalar and dead-zone generator for each
PWM generator
PWM interrupt synchronized to PWM period
16-bit digital Capture timers (shared with PWM timers) with rising/falling capture inputs
Supports capture interrupt
z UART
Up to two sets of UART device
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 8 - Revision V2.00
Programmable baud-rate generator
Buffered receiver and transmitter, each with 15 bytes FIFO
Optional flow control function (CTS and RTS)
Supports IrDA(SIR) function
Supports RS485 function
z SPI
Up to two sets of SPI device.
Supports master/slave mode
Master mode clock rate up to 20 MHz, and slave mode clock rate up to 10 MHz
Full duplex synchronous serial data transfer
Variable length of transfer data from 1 to 32 bits
MSB or LSB first data transfer
Rx latching data can be either at rising edge or at falling edge of serial clock
Tx sending data can be either at rising edge or at falling edge of serial clock
Supports Byte suspend mode in 32-bit transmission
z I
2C
Supports master/slave mode
Bidirectional data transfer between masters and slaves
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial data
on the bus
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
Programmable clocks allow versatile rate control.
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 9 - Revision V2.00
Supports multiple address recognition (four slave address with mask option)
z ADC
12-bit SAR ADC with 600k SPS
Up to 8-ch single-ended input or 4-ch differential input
Supports single mode/burst mode/single-cycle scan mode/continuous scan mode
Each channel with an individual result register
Supports conversion value monitoring (or comparison) for threshold voltage detection
Conversion can be started either by software trigger or external pin trigger
z EBI (External Bus Interface) for external memory-mapped device access
Accessible space: 64KB in 8-bit mode or 128KB in 16-bit mode
Supports 8-bit/16-bit data width
z In-System Programming (ISP) and In-Circuit Programming (ICP)
z Brownout Detector
With 4 levels: 4.5V/3.8V/2.7V/2.2V
Supports brownout interrupt and reset option
z LVR (Low Voltage Reset)
Threshold voltage levels: 2.0V
z Operating Temperature: -40 ~85℃℃
z Packages:
Green package (RoHS)
48-pin LQFP, 33-pin QFN
NuMicro M058/M0516 Product Brief
3 BLOCK DIAGRAM
Figure 3–1 NuMicro M051 Series Block Diagram
Publication Release Date: May 30, 2011
- 10 - Revision V2.00
NuMicro M058/M0516 Product Brief
4 SELECTION TABLE
NuMicro M051™ Series Selection Guide
Connectivity
Part No. APROM RAM Data
Flash LDROM I/O Timer UART SPI I2C PWM ADC EBI ISP
ICP Package
M058LAN 32KB 4KB 4KB 4KB 40 4x32-bit 2 2 1 8 8x12-bit v v LQFP48
M058ZAN 32KB 4KB 4KB 4KB 24 4x32-bit 2 1 1 5 5x12-bit v QFN 33
M0516LAN 64KB 4KB 4KB 4KB 40 4x32-bit 2 2 1 8 8x12-bit v v LQFP48
M0516ZAN 64KB 4KB 4KB 4KB 24 4x32-bit 2 1 1 5 5x12-bit v QFN 33
Table 4–1 NuMicro M051 Series Product Selection Guide
M05X -XX X
ARM Cortex-M0
L : LQFP 48
Z : QFN 33
52 : 8K Flash ROM
54 : 16K Flash ROM
-
CPU core
Reserved
Part Number Temperature
Package
-40 ~ +105
E:
-40 ~ +85
N:
-40 ~ +105
C:
Figure 4–1 NuMicro M051 Naming Rule
Publication Release Date: May 30, 2011
- 11 - Revision V2.00
NuMicro M058/M0516 Product Brief
5 PIN CONFIGURATION
5.1 QFN 33 pin
XTAL2
XTAL1
VSS
LDO_CAP
P2.2, PWM2
P2.3, PWM3
P2.4, PWM4
P3.6, CKO
TXD1, AIN3, P1.3
RXD1, AIN2, P1.2
AIN4, P1.4
AIN0, T2, P1.0
CTS1, P0.0
AVDD
RTS1, P0.1
VDD
Figure 5-1 NuMicro M051 Series QFN33 Pin Diagram
Publication Release Date: May 30, 2011
- 12 - Revision V2.00
NuMicro M058/M0516 Product Brief
5.2 LQFP 48 pin
Figure 5-2 NuMicro M051 Series LQFP-48 Pin Diagram
Publication Release Date: May 30, 2011
- 13 - Revision V2.00
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 14 - Revision V2.00
5.3 Pin Description
Pin number Alternate Function
QFN33 LQFP48
Symbol
1 2
Type[1] Description
11 16 XTAL1
I
(ST)
CRYSTAL1: This is the input pin to the internal inverting
amplifier. The system clock is from external crystal or
resonator when FOSC[1:0] (CONFIG3[1:0]) are both logic
1 by default.
10 15 XTAL2
O CRYSTAL2: This is the output pin from the internal
inverting amplifier. It emits the inverted signal of XTAL1.
27 41 VDD
P POWER SUPPLY: Supply voltage Digital V
DD for
operation.
12
33
17 VSS
P GROUND: Digital Ground potential.
28 42 AVDD
P POWER SUPPLY: Supply voltage Analog AVDD for
operation.
4 6 AVSS
P GROUND: Analog Ground potential.
13 18
LDO_C
AP
P LDO: LDO output pin
Note: It needs to be connected with a 10uF capacitor.
2 4 /RST I
(ST)
RESET: /RST pin is a Schmitt trigger input pin for
hardware device reset. A “Low” on this pin for 768 clock
counter of Internal 22.1184 MHz high speed oscillator while
the system clock is running will reset the device. /RST pin
has an internal pull-up resistor allowing power-on reset by
simply connecting an external capacitor to GND.
26 40 P0.0 CTS1 AD0 D, I/O
25 39 P0.1 RTS1 AD1 D, I/O
NC 38 P0.2 CTS0 AD2 D, I/O
NC 37 P0.3 RTS0 AD3 D, I/O
24 35 P0.4 SPISS1 AD4 D, I/O
PORT0: Port 0 is an 8-bit four mode output pin and two
mode input. Its multifunction pins are for CTS1, RTS1,
CTS0, RTS0, SPISS1, MOSI_1, MISO_1, and SPICLK1.
P0 has an alternative function as AD[7:0] while external
memory interface (EBI) is enabled.
These pins which are SPISS1, MOSI_1, MISO_1, and
SPICLK1 for the SPI function used.
CTS0/1: Clear to Send input pin for UART0/1
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 15 - Revision V2.00
Pin number Alternate Function
QFN33 LQFP48
Symbol
1 2
Type[1] Description
23 34 P0.5 MOSI_1 AD5 D, I/O
22 33 P0.6 MISO_1 AD6 D, I/O
21 32 P0.7 SPICLK1 AD7 D, I/O
RTS0/1: Request to Send output pin for UART0/1
29 43 P1.0 T2 AIN0 I/O
NC 44 P1.1 T3 AIN1 I/O
30 45 P1.2 RXD1 AIN2 I/O
31 46 P1.3 TXD1 AIN3 I/O
32 47 P1.4 SPISS0 AIN4 I/O
1 1 P1.5 MOSI_0 AIN5 I/O
NC 2 P1.6 MISO_0 AIN6 I/O
NC 3 P1.7 SPICLK0 AIN7 I/O
PORT1: Port 1 is an 8-bit four mode output pin and two
mode input. Its multifunction pins are for T2, T3, RXD1,
TXD1, SPISS0, MOSI_0, MISO_0, and SPICLK0.
T2: Timer2 external input
T3: Timer3 external input
These pins which are SPISS0, MOSI_0, MISO_0, and
SPICLK0 for the SPI function used.
These pins which are AIN0~AIN7for the 12 bits ADC
function used.
The RXD1/TXD1 pins are for UART1 function used.
NC 19 P2.0 PWM0 AD8 D, I/O
NC 20 P2.1 PWM1 AD9 D, I/O
14 21 P2.2 PWM2 AD10 D, I/O
15 22 P2.3 PWM3 AD11 D, I/O
16 23 P2.4 PWM4 AD12 D, I/O
17 25 P2.5 PWM5 AD13 D, I/O
18 26 P2.6 PWM6 AD14 D, I/O
NC 27 P2.7 PWM7 AD15 D, I/O
PORT2: Port 2 is an 8-bit four mode output pin and two
mode input. It has an alternative function
P2 has an alternative function as AD[15:8] while external
memory interface (EBI) is enabled.
These pins which are PWM0~PWM7 for the PWM function.
3 5 P3.0 RXD I/O
5 7 P3.1 TXD I/O
PORT3: Port 3 is an 8-bit four mode output pin and two
mode input. Its multifunction pins are for RXD, TXD, 0INT ,
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 16 - Revision V2.00
Pin number Alternate Function
QFN33 LQFP48
Symbol
1 2
Type[1] Description
6 8 P3.2 0INT STADC I/O
NC 9 P3.3 1INT MCLK I/O
7 10 P3.4 T0 SDA I/O
8 11 P3.5 T1 SCL I/O
9 13 P3.6
WR CKO I/O
NC 14 P3.7
RD I/O
1INT WR, T0, T1, , and RD .
T0: Timer0 external input
T1: Timer1 external input
The RXD/TXD pins are for UART0 function used.
The SDA/SCL pins are for I2C function used.
MCLK: EBI clock output pin.
CKO: HCLK clock output
The STADC pin is for ADC external trigger input.
NC 24 P4.0 PWM0 I/O
NC 36 P4.1 PWM1 I/O
NC 48 P4.2 PWM2 I/O
NC 12 P4.3 PWM3 I/O
NC 28 P4.4 /CS I/O
NC 29 P4.5 ALE I/O
19 30 P4.6 ICE_CLK I/O
20 31 P4.7 ICE_DAT I/O
PORT4: Port 4 is an 8-bit four mode output pin and two
mode input. Its multifunction pins are for /CS, ALE,
ICE_CLK and ICE_DAT.
/CS for EBI (External Bus Interface) used.
ALE (Address Latch Enable) is used to enable the address
latch that separates the address from the data on Port 0
and Port 2.
The ICE_CLK/ICE_DAT pins are for JTAG-ICE function
used.
PWM0-3 can be used from P4.0-P4.3 when EBI is active.
Table 5-1 NuMicro M051 Series Pin Description
[1] I/O type description. I: input, O: output, I/O: quasi bi-direction, D: open-drain, P: power pins,
ST: Schmitt trigger.
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 17 - Revision V2.00
6 TYPICAL APPLICATION CIRCUIT
AA12
RI2C1
4.7K
AD0
RI2C2
4.7K
AD1
AD2
DVDD
RXD0
TXD 0
DVDD
I2C-EEPROM
24LC64
UI2C1
SOIC8\ 1.27\5. 6MM
GND
4A2
3A1
2A0
1
SDA 5
SCL 6
WP 7
VCC 8
I2C
AD3
EEPROM
ADDRESS:0H
CB9
0.1 uF
DVDD
MET22
MET23
DVDD
DVDD
MISO_1
nSS1
P32
USPI1
W25X16VSSIG
SOIC -8P
CS#
1
DO
2
WP#
3
GND
4DI 5
CLK 6
HOLD# 7
VCC 8
SPI
DVDD
RSPI1
4.7K
RSPI 2
4.7K
CB7
0.1 uF
SCLK1
MOSI _1
SDA
SCL
SDA
AD4
SCL
nWR
AD5
AD12
AD6
AD11
AD10
AD13
AD7
AD14
nTICER ST
AVDD
AD5
AD6
P40
ALE
AD7
AD9
AD8
AD3
UART_TXD
RXD0
TXD1
RXD1
TXD0
S1
SW D IP-4
SWDIP8
1
2
3
4
8
7
6
5
UART_RXD
AD4
nRD
AD5
EBI
D12MO
AD6
L1 FB
AD7
CB3
0.1 uF
CB4
0.1 uF
nWR
AVDD
DVDD
D12MI
DVSS
CB8
0.1 uF
DVSS
U4
M052_54 LQFP 48
M052_LQFP_48
AIN1/T2/P1.1 44
AIN2/RXD 1/P1.2 45
AIN3/TXD1/P1.3 46
AIN3/SS0/P1.4 47
P4.2 48
MOSI_0/AIN5/P1.5
1
MISO_0/AIN6/P1.6
2
SCLK0/AIN7/P1.7
3
VSS
17
LDO_C AP
18
P2.0 /AD 8/PW M 0
19
P2.1 /AD 9/PW M 1
20
P2.2 /AD 10/P W M 2
21
P2.3 /AD 11/P W M 3
22
P2.4 /AD 12/P W M 4
23
P4.0
24
P2.6/AD14/PWM6 26
P4.6/ICE_CLK 30
P4.7/ICE_DAT 31
P0.7/AD7/SCLK1 32
P0.6/AD6/MISO_1 33
P0.5/AD5/MOSI_1 34
P0.4/AD4/SS1 35
P4.1 36
P0.3/AD3/R TS0 37
P0.2/AD2/C TS0 38
P0.1/AD1/R TS1 39
RST
4
RXD/P3.0
5
AVSS
6
MCLK/INT1/P3.3
9
TXD/ P 3 .1
7
INT0/P3.2
8
SDA/T0/P3.4
10
SCL/T1/P3.5
11
P4.3
12
P3.6 /W R /C K O
13
P4.5/ALE 29
P4.4/CS 28
AIN0/T2/P1.0 43
AVDD 42
VDD 41
P0.0/AD0/C TS1 40
P3.7 /R D
14
XTAL1
16 XTAL2
15
P2.5/AD13/PWM5 25
P2.7/AD15/PWM7 27
MOSI_ 0
AA15
AVSS
MISO_ 0
SCLK0
AA14
AVSS
nTICERST
AA13
DVSS
P33
P41
L2 FB
AA5
AD4
TICEDA T
ADC Input
TICECL K
ALE
AA6
nCS
CB5
0.1 uF
DVDD
DVDD
DVSS
CB6
0.1 uF
DVSS
AD15
U3
BS616LV4017EG70(TSOP-44)
A4
1
A3
2
A2
3
A1
4
A0
5
CS
6
I/O0
7
I/O1
8
I/O2
9
I/O3
10
VCC
11
VSS
12
I/O4
13
I/O5
14
I/O6
15
I/O7
16
WE
17
A17
18
A16
19
A15
20
A14
21
A13
22
NC 28
A8 27
A12 23
A11 24
A9 26
A10 25
I/O8 29
I/O9 30
I/O10 31
I/O11 32
VCC 33
VSS 34
I/O12 35
I/O13 36
I/O14 37
I/O15 38
LB 39
UB 40
OE 41
A5 44
A6 43
A7 42 AA7
AD3
CB1
0.1 uF
AD2
nRD
Tit le
Size Document Number Rev
Date: Sheet of
Application.dsn
1.0
M052_54 Application Circuit
11Thursday , Augus t 19, 2010
C5
10uF
TAN T- B
AD1
AD0
DVDD
AD12
AD11
AD10
AD9
AD8
ALE
AD15
AD14
AD13
CB2
0.1 uF
AA10
AA9
AA8
P42
U2
74F373
D0
3
D1
4
D2
7
D3
8
D4
13
D5
14
D6
17
D7
18
OE
1LE
11
Q0 2
Q1 5
Q2 6
Q3 9
Q4 12
Q5 15
Q6 16
Q7 19
VCC 20
GND
10
AA13
AA12
AA11
AA15
AA14
AD15
nSS0
AD14
TXD 1
AD13
RXD1
AD12
P11
AA4
AD11
AA0
AA3
P43
AA1
AD10
AA2
C3
820pF
AA2
AD9
AA3
AA1
AA4
AD8
AA0
AA5
nCS
U1
74F373
D0
3
D1
4
D2
7
D3
8
D4
13
D5
14
D6
17
D7
18
OE
1LE
11
Q0 2
Q1 5
Q2 6
Q3 9
Q4 12
Q5 15
Q6 16
Q7 19
VCC 20
GND
10
AA6
ADC
AA8
AD0
AA7
AD1
ICE Interface
C1
10uF/10V
TAN T- A
DVDD
AA9
R1
10K
Reset Circuit
AD2
X1
12MHz
XT A L3 - 1
C4
20p
D12MO
C2
20p
D12MI
Crystal
AA10
CON1
1X2 HEADER
1
1
2
2
UART_TXD
UART_RXD
UART
DVDD
VDD NET4
NET5
NET40
NET3
NET9
NET8
NET6
NET7
VSS
R4 33
NET10
R6 33
NET12
NET13NET11
U5
MAX2 32 A
SOP16/150
C1+
1
V+
2
C1-
3
C2+
4
C2-
5
V-
6
T2OUT
7
R2IN
8R2OUT 9
T2I N 10
T1I N 11
R1OUT 12
R1IN 13
T1OUT 14
GND 15
VCC 16
AA11
C7
1uF
TAN T-A
C6
1uF
TAN T- A
C9
1uF
TAN T-A
C8 1uF
TAN T- A
P1
DB9-M ()
DB9L-HP
5
9
4
8
3
7
2
6
1
10
11
R3
33
R5
33
ICEJP1
HEADER 5X2
HEADER5X2
1 2
3 4
5 6
7 8
910
nTICERST
TI C EC L K
TI C ED A T
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 18 - Revision V2.00
7 ELECTRICAL CHARACTERISTICS
7.1 Absolute Maximum Ratings
SYMBOL PARAMETER MIN MAX UNIT
DC Power Supply VDDVSS -0.3 +7.0 V
Input Voltage VIN VSS-0.3 VDD+0.3 V
Oscillator Frequency 1/tCLCL 0 40 MHz
Operating Temperature TA -40 +85 °C
Storage Temperature TST -55 +150 °C
Maximum Current into VDD - 120 mA
Maximum Current out of VSS 120 mA
Maximum Current sunk by a I/O pin 35 mA
Maximum Current sourced by a I/O
pin 35 mA
Maximum Current sunk by total I/O
pins 100 mA
Maximum Current sourced by total
I/O pins 100 mA
Note: Exposure to conditions beyond those listed under absolute maximum ratings may adversely affects the lift and reliability of the device.
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 19 - Revision V2.00
7.2 DC Electrical Characteristics
(VDD-VSS=2.5~5.5V, TA = 25°C, FOSC = 50 MHz unless otherwise specified.)
SPECIFICATION
PARAMETER SYM. MIN. TYP. MAX. UNIT TEST CONDITIONS
Operation voltage VDD 2.5 5.5 V VDD =2.5V ~ 5.5V up to 50 MHz
Power Ground VSS
AVSS -0.3 V
LDO Output Voltage VLDO -10% 2.45 +10% V VDD > 2.7V
Band Gap Analog Input VBG -5% 1.26 +5% V VDD =2.5V ~ 5.5V
Analog Operating
Voltage AVDD 0 VDD V
IDD1 32 mA VDD= 5.5V@50 MHz,
enable all IP and PLL, XTAL=12 MHz
IDD2 24 mA VDD=5.5V@50 MHz, disable all IP and
enable PLL, XTAL=12 MHz
IDD3 31 mA VDD = 3V@50 MHz, enable all IP and PLL,
XTAL=12 MHz
Operating Current
Normal Run Mode
@ 50 MHz
IDD4 23 mA VDD = 3V@50 MHz, disable all IP and
enable PLL, XTAL=12 MHz
IDD5 17 mA VDD = 5.5V@ 12MHz, enable all IP and
disable PLL, XTAL=12 MHz
IDD6 14 mA VDD = 5.5V@12 MHz, disable all IP and
disable PLL, XTAL=12 MHz
IDD7 16 mA VDD = 3V@12 MHz, enable all IP and
disable PLL, XTAL=12 MHz
Operating Current
Normal Run Mode
@ 12 MHz
IDD8 13 mA VDD = 3V@12 MHz, disable all IP and
disable PLL, XTAL=12 MHz
IDD9 12 mA VDD = 5.5V@4 MHz, enable all IP and
disable PLL, XTAL=4MHz
IDD10 10 mA VDD = 5.5V@4 MHz, disable all IP and
disable PLL, XTAL=4MHz
IDD11 10 mA VDD = 3V@4 MHz, enable all IP and
disable PLL, XTAL=4MHz
Operating Current
Normal Run Mode
@ 4 MHz
IDD12 9 mA VDD = 3V@4 MHz, disable all IP and
disable PLL, XTAL=4 MHz
Operating Current IIDLE1 19 mA VDD= 5.5V@50 MHz, enable all IP and
PLL, XTAL=12 MHz
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 20 - Revision V2.00
IIDLE2 11 mA VDD=5.5V@50 MHz, disable all IP and
enable PLL, XTAL=12 MHz
IIDLE3 18 mA VDD = 3V@50 MHz, enable all IP and PLL,
XTAL=12 MHz
Idle Mode
@ 50 MHz
IIDLE4 10 mA VDD = 3V@50 MHz, disable all IP and
enable PLL, XTAL=12 MHz
IIDLE5 10 mA VDD = 5.5V@12 MHz, enable all IP and
disable PLL, XTAL=12 MHz
IIDLE6 7 mA VDD = 5.5V@12 MHz, disable all IP and
disable PLL, XTAL=12 MHz
IIDLE7 9 mA VDD = 3V@12 MHz, enable all IP and
disable PLL, XTAL=12 MHz
Operating Current
Idle Mode
@ 12 MHz
IIDLE8 6 mA VDD = 3V@12 MHz, disable all IP and
disable PLL, XTAL=12 MHz
IIDLE9 5 mA VDD = 5.5V@4 MHz, enable all IP and
disable PLL, XTAL=4 MHz
IIDLE10 4 mA VDD = 5.5V@4 MHz, disable all IP and
disable PLL, XTAL=4 MHz
IIDLE11 4 mA VDD = 3V@4 MHz, enable all IP and
disable PLL, XTAL=4 MHz
Operating Current
Idle Mode
@ 4 MHz
IIDLE12 3 mA VDD = 3V@4 MHz, disable all IP and
disable PLL, XTAL=4 MHz
IPWD1 15 μA VDD = 5.5V, No load @ Disable BOV
function
Standby Current
Power down Mode IPWD2 11 μA VDD = 3.0V, No load @ Disable BOV
function
Input Current P0/1/2/3/4
(Quasi-bidirectional
mode)
IIN1 -50
-60 μA VDD = 5.5V, VIN = 0.4V
Input Leakage Current
P0/1/2/3/4 ILK -2 - +2 μA VDD = 5.5V, 0<VIN<VDD
Logic 1 to 0 Transition
Current P0/1/2/3/4
(Quasi-bidiretional
mode)
ITL
[3] -650 - -200 μA VDD = 5.5V, VIN<2.0V
-0.3 - 0.8 VDD = 4.5V
Input Low Voltage
P0/1/2/3/4 (TTL input) VIL1 -0.3 - 0.6 V VDD = 2.5V
2.0 -
VDD
+0.2 VDD = 5.5V
Input High Voltage
P0/1/2/3/4 (TTL input) VIH1
1.5 - VDD
+0.2
V
VDD =3.0V
0 - 0.8 V VDD = 4.5V
Input Low Voltage XT1[*2] VIL3 0 - 0.4 VDD = 3.0V
3.5 - VDD
+0.2 V VDD = 5.5V
Input High Voltage
XT1[*2] VIH3
2.4 - VDD
+0.2 V
DD = 3.0V
Negative going threshold
(Schmitt input), /RST
VILS -0.5 - 0.3VDD V
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
- 21 - Revision V2.00
Positive going threshold
(Schmitt input), /RST VIHS 0.7VDD - VDD+0.
5 V
Internal /RST pin pull up
resistor RRST 40 150 K
Negative going threshold
(Schmitt input),
P0/1/2/3/4
VILS -0.5 - 0.2VDD V
Positive going threshold
(Schmitt input),
P0/1/2/3/4
VIHS 0.4VDD - VDD
+0.5 V
ISR11 -300 -370 -450 μA VDD = 4.5V, VS = 2.4V
ISR12 -50 -70 -90 μA VDD = 2.7V, VS = 2.2V
Source Current
P0/1/2/3/4 (Quasi-
bidirectional Mode)
ISR12 -40 -60 -80 μA VDD = 2.5V, VS = 2.0V
ISR21 -20 -24 -28 mA VDD = 4.5V, VS = 2.4V
ISR22 -4 -6 -8 mA VDD = 2.7V, VS = 2.2V
Source Current
P0/1/2/3/4 (Push-pull
Mode)
ISR22 -3 -5 -7 mA VDD = 2.5V, VS = 2.0V
ISK1 10 16 20 mA VDD = 4.5V, VS = 0.45V
ISK1 7 10 13 mA VDD = 2.7V, VS = 0.45V
Sink Current P0/1/2/3/4
(Quasi-bidirectional and
Push-pull Mode)
ISK1 6 9 12 mA VDD = 2.5V, VS = 0.45V
Brownout voltage with
BOV_VL [1:0] =00b VBO2.2 2.1 2.2 2.3 V
Brownout voltage with
BOV_VL [1:0] =01b VBO2.7 2.6 2.7 2.8 V
Brownout voltage with
BOV_VL [1:0] =10b VBO3.8 3.7 3.8 3.9 V
Brownout voltage with
BOV_VL [1:0] =11b VBO4.5 4.4 4.5 4.6 V
Hysteresis range of BOD
voltage VBH 30 - 150 mV VDD = 2.5V~5.5V
Notes:
1. /RST pin is a Schmitt trigger input.
2. XTAL1 is a CMOS input.
3. Pins of P0, P1, P2, P3 and P4 can source a transition current when they are being externally driven from 1 to 0. In the condition of VDD=5.5V, 5he transition current
reaches its maximum value when Vin approximates to 2V .
NuMicro M058/M0516 Product Brief
7.3 AC Electrical Characteristics
7.3.1 External 4~24 MHz High Speed Crystal
Note: Duty cycle is 50%.
PARAMETER SYMBOL MIN. TYP. MAX. UNITS CONDITION
Clock High Time tCHCX 20 - 125 nS
Clock Low Time tCLCX 20 - 125 nS
Clock Rise Time tCLCH - - 10 nS
Clock Fall Time tCHCL - - 10 nS
7.3.2 External 4~24 MHz High Speed Oscillator
PARAMETER CONDITION MIN. TYP. MAX. UNIT
Input clock frequency External crystal 4 12 24 MHz
Temperature - -40 - 85
VDD - 2.5 5 5.5 V
Operating current 12 MHz@ VDD = 5V - 5 - mA
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NuMicro M058/M0516 Product Brief
7.3.3 Typical Crystal Application Circuits
CRYSTAL C1 C2
4 MHz ~ 24 MHz Optional
(Depend on crystal specification)
Figure 7-1 Typical Crystal Application Circuit
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NuMicro M058/M0516 Product Brief
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7.3.4 Internal 22.1184 MHz High Speed Oscillator
PARAMETER CONDITION MIN. TYP. MAX. UNIT
Supply voltage[1] - 2.5 - 5.5 V
Center Frequency - - 22.1184 MHz
+25 C; V DD =5V -1 - +1 %
Calibrated Internal Oscillator
Frequency -40C~+85C;   
VDD=2.5V~5.5V -3 - +3 %
Accuracy of Un-calibrated
Internal Oscillator Frequency
-40C~+85C;   
VDD=2.5V~5.5V -25 - +25 %
Operating current VDD =5V - 500 - uA
7.3.5 Internal 10 kHz Low Speed Oscillator
PARAMETER CONDITION MIN. TYP. MAX. UNIT
Supply voltage[1] - 2.5 - 5.5 V
Center Frequency - - 10 - kHz
+25 C; V DD =5V -30 - +30 %
Calibrated Internal Oscillator
Frequency -40C~+85C;   
VDD=2.5V~5.5V -50 - +50 %
Operating current VDD =5V - 5 - uA
Notes:
1. Internal operation voltage comes form LDO.
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
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7.4 Analog Characteristics
7.4.1 Specification of 600 kHz sps 12-bit SARADC
PARAMETER SYM. MIN. TYP. MAX. UNIT
Resolution - - - 12 Bit
Differential nonlinearity error DNL - ±1.2 - LSB
Integral nonlinearity error INL - ±1.5 - LSB
Offset error EO - +4 10 LSB
Gain error (Transfer gain) EG - +7 1.005 -
Monotonic - Guaranteed -
ADC clock frequency FADC - - 20 MHz
Calibration time TCAL - 127 - Clock
Sample time TS - 7 - Clock
Conversion time TADC - 13 - Clock
Sample rate FS - - 600 k sps
VLDO - 2.5 - V
Supply voltage
VADD 3 - 5.5 V
IDD - 0.5 - mA
Supply current (Avg.)
IDDA - 1.5 - mA
Input voltage range VIN 0 - AVDD V
Capacitance CIN - 5 - pF
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
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7.4.2 Specification of LDO and Power management
PARAMETER MIN TYP MAX UNIT NOTE
Input Voltage 2.7 5 5.5 V VDD input voltage
Output Voltage -10% 2.5 +10% V VDD > 2.7V
Temperature -40 25 85
Quiescent Current
(PD=0)
- 100 - uA
Quiescent Current
(PD=1)
- 5 - uA
Iload (PD=0) - - 100 mA
Iload (PD=1) - - 100 uA
Cbp - 10 - uF Resr=1ohm
Note:
1. It is recommended that a 10uF (or higher) capacitor and a 100nF bypass capacitor are
connected between VDD and the closest VSS pin of the device.
2. For ensuring power stability, a 4.7uF or higher capacitor must be connected between LDO
pin and the closest VSS pin of the device.
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
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7.4.3 Specification of Low Voltage Reset
PARAMETER CONDITION MIN. TYP. MAX. UNIT
Operation voltage - 1.7 - 5.5 V
Quiescent current VDD5V=5.5V - - 5 uA
Temperature=25° 1.7 2.0 2.3 V
Temperature=-40° - 2.4 - V
Threshold voltage
Temperature=85° - 1.6 - V
Hysteresis - 0 0 0 V
7.4.4 Specification of Brownout Detector
PARAMETER CONDITION MIN. TYP. MAX. UNIT
Operation voltage - 2.5 - 5.5 V
Quiescent current AVDD=5.5V - - 125 μA
Temperature - -40 25 85
BOV_VL[1:0]=11 4.4 4.5 4.6 V
BOV_VL [1:0]=10 3.7 3.8 3.9 V
BOV_VL [1:0]=01 2.6 2.7 2.8 V
Brown-out voltage
BOV_VL [1:0]=00 2.1 2.2 2.3 V
Hysteresis - 30m - 150m V
7.4.5 Specification of Power-On Reset (5V)
PARAMETER CONDITION MIN. TYP. MAX. UNIT
Reset voltage V+ - 2 - V
Quiescent current Vin>reset voltage - 1 - nA
NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
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7.5 SPI Dynamic characteristics
PARAMETER CONDITION MIN. TYP. MAX. UNIT
SPI master mode (VDD = 4.5V ~ 5.5V, 30pF loading Capacitor)
tDS Data setup time 26 - - ns
tDH Data hold time 0 - - ns
tV Data output valid time - - 6 ns
SPI master mode (VDD = 3.0V ~ 3.6V, 30pF loading Capacitor)
tDS Data setup time 39 - - ns
tDH Data hold time 0 - - ns
tV Data output valid time - - 10 ns
SPI slave mode (VDD = 4.5V ~ 5.5V, 30pF loading Capacitor)
tDS Data setup time 0 - - ns
tDH Data hold time 2*PCLK+4 - - ns
tV Data output valid time - - 2*PCLK+27 ns
SPI slave mode (VDD = 3.0V ~ 3.6V, 30pF loading Capacitor)
tDS Data setup time 0 - - ns
tDH Data hold time 2*PCLK+8 - - ns
tV Data output valid time - - 2*PCLK+40 ns
NuMicro M058/M0516 Product Brief
Figure 7-2 SPI Master timing
Figure 7-3 SPI Slave timing
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NuMicro M058/M0516 Product Brief
8 PACKAGE DIMENSIONS
8.1 LQFP-48 (7x7x1.4mm2 Footprint 2.0mm)
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NuMicro M058/M0516 Product Brief
8.2 QFN-33 (5X5 mm2, Thickness 0.8mm, Pitc h 0.5 mm)
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NuMicro M058/M0516 Product Brief
Publication Release Date: May 30, 2011
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9 REVISION HISTORY
VERSION DATE PAGE DESCRIPTION
V1.0 Jan 31, 2011 - Initial issued
V1.1 Mar 08, 2011 25 Removed the Note 2 of Table 7.4.2
V2.0 May 30, 2011
-
26
28
Add “Whole Chip Clock generator block diagram”
Revise the spec of LDO
Add SPI Dynamic Characteristics
NuMicro M058/M0516 Product Brief
Important Notice
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any
malfunction or failure of which may cause loss of human life, bodily injury or severe property
damage. Such applications are deemed, “Insec ure Usage”.
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic
energy control instruments, airplane or spaceship instruments, the control or operation of
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all
types of safety devices, and other applications intended to support or sustain life.
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay
claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the
damages and liabilities thus incurred by Nuvoton.
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