ZXLD1366
ZXLD1366
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HIGH ACCURACY 1A, 60V LED DRIVER WITH AEC-Q100
Description
The ZXLD1366 is a continuous mode inductive step-down
converter, designed for driving single or multiple series connected
LEDs efficiently from a voltage source higher than the LED voltage.
The device operates from an input suppl y between 6V and 60V an d
provides an externally adjustable output current of up to 1A.
The ZXLD1366 has been qualified to AECQ100 Grade 1 enabling
operation in ambient temperatures from -40°C to +125°C
The ZXLD1366 uses a high-side output current sensing circuit
which uses an external resistor to set the nominal average output
current. The output current can be adjusted above, or below the set
value, by applying an external control signal to the 'ADJ' pin.
Enhanced output current dimming resolution can be achieved by
applying a PWM signal to the ‘ADJ’ pin.
Soft-start can be forced using an external capacitor from the ADJ
pin to ground. Applying a voltage of 0.2V or lower to the ADJ pin
turns the output off and switches the device into a low current
standby state.
Pin Assignments
(TOP VIEW)
TSOT25
I
SENSE
V
IN
2
1
34
5
ADJ
GND
LX
1
2
34
5
6
U-DFN3030-6
(TOP VI EW)
LX
GND
ADJ
V
IN
I
SENSE
GND
(TOP VIEW)
SO-8EP
46
5
1
7
28
3
LX
GND
GND
ADJ
V
IN
GND
GND
I
SENSE
Typical Application Circuit
V
IN
I
SENSE
LX
GND
ZXLD1366
ADJ
V
IN
(24V) Rs
0.2V
4.7µFC1
GND
100nF
D1
L1
Features
Typically better than 0.8% output current accuracy
Simple and with low part count
Single pin on/off and brightness control using DC voltage or
PWM
PWM resolution up to 1000:1
High efficiency (up to 97%)
Switching frequencies up to 1MHz
Wide input voltage range: 6V to 60V
Inherent open-circuit LED protection
Available in thermally enhanced Green molding packages
SO-8EP JA = +45°C/W
U- DFN3030-6 JA = +44°C/W
TSOT25 JA = +82°C/W
Totally Lead-free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Qualified to AEC-Q100 Grade 1
SO-8EP ZXLD1366EN8TC
TSOT25 ZXLD1366ET5TA
Applications
Automotive lighting
Low voltage industrial lighting
LED back-up lighting
Illuminated signs
Emergency lighting
SELV lighting
Refrigeration lights
Notes: 1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. All applicable RoHS exemptions applied.
2. See http://www.diodes.com for more information about Diodes In corpor ated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as tho se which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl)
and <1000ppm antimony compounds.
ZXLD1366
ZXLD1366
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Block Diagram
Low voltage
detector
Voltage
regulator
LX
MN
L1
D1
I
SENSE
Adj
Gnd
V
IN
V
IN
50K 20K
1.25V
1.35V
0.2V
600KHz
+
-
+
-
+
-
R4 R5
R2
R3
R1
2
3
54 1
D1
+
-
R
S
C1
4.7µF
5V
Figure. 1 Pin Connection for TSOT25 Package
Pin Description
Name TSOT25 U-DFN3030-6 SO-8EP Function
LX 1 1 1 Drain of NDMOS switch
GND 2 2, 5 2, 3, 6, 7 Ground (0V)
ADJ 3 3 4
Multi-function On/Off and brightness control pin:
Leave floating for normal operation.(VADJ = VREF = 1.25V giving nominal
average output current IOUTnom = 0.2V/RS)
Drive to voltage below 0.2V to turn off output current
Drive with DC voltage (0.3V < VADJ < 2.5V) to adjust output current from 25%
to 200% of IOUTnom
Connect a capacitor from this pin to ground to set soft-start time.
Soft start time increases approximately 0.2ms/nF
ISENSE 4 4 5
Connect resistor RS from this pin to VIN to define nominal average output current
IOUTnom = 0.2V/RS.
(Note: RSMIN = 0.2V with ADJ pin open-circuit)
VIN 5 6 8
Input Voltage (6V to 60V). Decouple to ground with 4.7µF of higher X7R ceramic
capacitor close to device.
Pad - Pad Pad
Exposed Pad (EP) - connected to device substrate.
To improve thermal impedance of package the EP must be connected to power
ground but should not be used as the 0V (GND) current path.
It can be left floating but must not be connected to any other voltage other than
0V.
ZXLD1366
ZXLD1366
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Absolute Maximum Ratings (Note 4)
Symbol Parameter Rating Unit
VIN Input Voltage -0.3 to +65 V
VSENSE I
SENSE Voltage (Note 5) +0.3 to -5 V
VLX LX Output Voltage -0.3 to +65 V
VADJ Adjust Pin Input Voltage -0.3 to +6 V
ILX Switch Output Current 1.25 A
PTOT Power Dissipation
(Refer to Package thermal de-rating curve on
page 25)
TSOT25 1
W
U-DFN3030-6 1.8
SO-8EP 2.2
TOP Operating Temperature -40 to +125 °C
TST Storage Temperature -55 to +150 °C
TJ MAX Junction Temperature +150 °C
Note: 4 All voltages unless otherwise stated are measured with respect to GND.
5. VSENSE is measured with respect to VIN.
Caution: Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings
only; functional operation of the device at conditions between maximum recommended operating conditions and absolute maximum ratings is not
implied. Device reliability may be affected by exposure to absolute maximum rating conditions for ex tended periods of time.
ESD Susceptibility Rating Unit
Human Body Model 500 V
Machine Model 75 V
Caution: Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when
handling and transporting these devices.
The human body model is a 100pF capacitor discharge through a 1.5k resistor pin. The machine model is a 200pF capacitor discharged directly
into each pin.
Thermal Resistance
Symbol Parameter Rating Unit
TSOT25 SO-8EP U-DFN3030-6
JA Junction to Ambient 82 45 44
°C/W
JB Junction to Board 33
JC Junction to Case 7 14
Recommended Operating Conditions
Symbol Parameter Min Max Units
VIN Input voltage (Note 6) 6 60 V
ILX Maximum recommended continuous/RMS switch current 1 A
VADJ External control voltage range on ADJ pin for DC brightness control (Note 7) 0.3 2.5 V
VADJOFF DC voltage on ADJ pin to ensure devices is off 0.25 V
tOFFMIN Minimum switch off-time 800 ns
tONMIN Minimum switch on-time 800 ns
fLX MAX Recommended maximum operating frequency (Note 8) 625 kHz
DLX Duty cycle range 0.01 0.99
DLX(LIMIT) Recommended duty cycle range of output switch at fLXMAX 0.3 0.7
TOP Operating Temperature range -40 +125 °C
Notes: 6. VIN > 16V to fully enhance output transistor. Otherwise out current must be derated - see graphs. Operation at low supply may cause excessive
heating due to increased on-resistance. Tested at 7V guaranteed for 6V by design.
7. 100% brightness corresponds to VADJ = VADJ(nom) = V REF. Driving the ADJ pin above VREF will increase the VSENSE threshold and output current
proportionally.
8. ZXLD1366 will operate at higher frequencies but accuracy will be affected due to propagation delays.
ZXLD1366
ZXLD1366
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Electrical Characteristics (Test conditions: VIN = 24V, TA = +25°C, unless oth erwise specified.)
Symbol Parameter Condition Min Typ Max Unit
VSU Internal regulator start-up threshold 4.85 5.20 V
VSD Internal regulator shutdown threshold 4.40 4.75 V
IINQoff Quiescent supply current with output off ADJ pin grounded 65 108 µA
IINQon Quiescent supply current with output switching
(Note 9) ADJ pin floating, L = 68µH,
3 LEDs, f = 260kHz 1.6 mA
VSENSE Mean current sense threshold voltage
(Defines LED current setting accuracy)
Measured on ISENSE pin with
respect to VIN VADJ = 1.25V;
VIN = 18V 195 200 205 mV
VSENSEHYS Sense threshold hysteresis ±15 %
ISENSE I
SENSE pin input current VSENSE = VIN -0.2 4 10 µA
VREF Internal reference voltage Measured on ADJ pin with pin
floating 1.25 V
ΔVREF/ΔT Temperature coefficient of VREF 50 ppm/°C
VADJ External control voltage range on ADJ pin for DC
brightness control (Note 7) 0.3 2.5 V
VADJoff DC voltage on ADJ pin to switch device from active
(on) state to quiescent (off) state VADJ falling 0.15 0.20 0.27 V
VADJon DC voltage on ADJ pin to switch device from
quiescent (off) state to active (on) state VADJ rising 0.20 0.25 0.30 V
RADJ Resistance between ADJ pin and VREF 0 < VADJ < VREF
VADJ > VREF +100mV 30
10.4 50
14.2 65
18.0 k
ILXmean Continuous LX switch current 1 A
RLX LX switch ‘On’ resistance @ ILX = 1A 0.50 0.75
ILX(leak) LX switch leakage current 5 µA
DPWM(LF) Duty cycle range of PWM signal applied to ADJ pin
during low frequency PWM dimming mode
PWM frequency < 300Hz PWM
amplitude = VREF
Measured on ADJ pin 0.001 1.000 V
Brightness control range 1000:1
DCADJ DC Brightness control range (Note 8) 5:1
tSS Soft start time
Time taken for output current to
reach 90% of final value after
voltage on ADJ pin has risen
above 0.3V. Requires external
capacitor 22nF. See graphs for
more details
2 ms
fLX Operating frequency
(See graphs for more details)
ADJ pin floating
L = 68µH (0.2V)
IOUT = 1A @ VLED = 3.6V
Driving 3 LEDs
260 kHz
tONmin Minimum switch ‘ON’ time LX switch ‘ON’ 130
tOFFmin Minimum switch ‘OFF’ time LX switch ‘OFF’ 70
Notes: 9. Static current of device is approximately 700 µA, see Graph, Page 16
10. 100% brightness corresponds to VADJ = VADJ(nom) = VREF. Driving the ADJ pin above VREF will increase the VSENSE threshold and output current
proportionally.
11. Ratio of maximum brightness to minimum brightness before shutdown VREF = 1.25/0.3. VREF externally driven to 2.5V, ratio 10:1.
ZXLD1366
ZXLD1366
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Device Description
The device, in conjunction with the coil (L1) and current sense resistor (RS), forms a self-oscillating continuous-mode buck converter.
Device Operation
(refer to Figure 1 - Block diagram and Figure 2 Operating waveforms).
0V
VIN 200mV230mV
0V
SENSE voltage
VSENSE+
VSENSE-
Toff Ton
170mV
0V
5V
VIN
0.15VADJ
0.15VADJ
I
OUTnom
I
OUTnom
+15%
I
OUTnom
-15%
VADJ
LX voltage
Coil current
Comparator
input voltage
Comparator
output
Figure 2. Theoretical Operating Waveforms
Operation can be best understood by assuming that the ADJ pin
of the device is unconnected and the voltage on this pin (VADJ)
appears directly at the (+) input of the comparator.
When input voltage VIN is first applied, the initial current in L1
and RS is zero and there is no output from the current sense
circuit. Under this condition, the (-) input to the comparator is at
ground and its output is high. This turns MN on and switches the
LX pin low, causing current to flow from VIN to ground, via RS, L1
and the LED(s). The current rises at a rate determined by VIN
and L1 to produce a voltage ramp (VSENSE) across RS. The
supply referred voltage VSENSE is forced across internal resistor
R1 by the current sense circuit and produces a proportional
current in internal resistors R2 and R3. This produces a ground
referred rising voltage at the (-) input of the comparator. When
this reaches the threshold voltage (VADJ), the comparator output
switches low and MN turns off. The comparator output also
drives another NMOS switch, which bypasses internal resistor
R3 to provide a controlled amount of hysteresis. The hysteresis
is set by R3 to be nominally 15% of VADJ.
When MN is off, the current in L1 continues to flow via D1 and
the LED(s) back to VIN. The current decays at a rate determined
by the LED(s) and diode forward voltages to produce a falling
voltage at the input of the comparator. When this voltage returns
to VADJ, the comparator output switches high again. This cycle of
events repeats, with the comparator input ramping between limits
of VADJ ± 15%.
Switching Thresholds
With VADJ = VREF, the ratios of R1, R2 and R3 define an average
VSENSE switching threshold of 200mV (measured on the ISENSE
pin with respect to VIN). The average output current IOUTnom is
then defined by this voltage and RS according to:
IOUTnom = 200mV/RS
Nominal ripple current is ±30mV/RS
ZXLD1366
ZXLD1366
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Device Description (cont.)
Actual operating waveforms
VIN = 15V, RS = 0.2Ω, L = 68µH Normal operation.
Output Current (Ch 3) and LX voltage (Ch 2)
VIN = 30V, RS = 0.2Ω, L = 68µH Normal operation.
Output Current (Ch 3) and LX voltage (Ch 2)
VIN = 60V, RS = 0.2Ω, L = 68µH Normal operation.
Output Current (Ch 3) and LX voltage (Ch 2)
Adjusting Output Current
The device contains a low pass filter between the ADJ pin and
the threshold comparator and an internal current limiting resistor
(50k nom) between ADJ and the internal reference voltage.
This allows the ADJ pin to be overdriven with either DC or pulse
signals to change the VSENSE switching threshold and adjust the
output current.
Details of the different modes of adjusting output current are
given in the applications section.
Output Shutdown
The output of the low pass filter drives the shutdown circuit.
When the input voltage to this circuit falls below the threshold
(0.2V nom.), the internal regulator and the output switch are
turned off. The voltage reference remains powered during
shutdown to provide the bias current for the shutdown circuit.
Quiescent supply current during shutdown is nominally 60A
and switch leakage is below 5A.
ZXLD1366
ZXLD1366
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Typical Operating Conditions
010 20 30 40 50 60
SUPPLY VOL TAGE (V)
Output Current, L = 68µH
1.100
1.080
1.060
1.040
1.020
1.000
0.980
OU
T
P
U
T
C
U
R
R
E
N
T
(
A
)
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLT AGE (V)
Output Current Devia tion, L = 68µH
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
1
0
8
6
4
2
0
-2
O
U
T
P
U
T
C
U
R
R
EN
T
DEVI
A
T
I
O
N (%)
-4
-6
-8
-10
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLT AGE (V)
Efficiency, L = 6H
100
95
90
85
80
75
70
E
F
F
I
C
IEN
C
Y
(%)
65
60
55
50
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPL Y VOLTAGE (V)
Sw it chin g Frequency, L = 6 H
500
450
400
150
100
50
0
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(k
H
z)
350
300
250
200
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLTAGE (V)
Duty Cycle, L = 68µH
100
90
80
30
20
10
0
D
U
T
Y
C
Y
C
LE ( %)
70
60
50
40
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLT AGE (V)
Output Current, L = 100µH
1.100
1.080
1.060
1.040
1.020
1.000
0.980
O
UT
P
UT
C
U
R
R
ENT (
A
)
0.960
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLT AGE (V)
Output Current Deviation, L = 100µH
10
8
6
4
2
0
-2
O
UT
P
UT
C
U
R
R
ENT DEVI
A
TI
O
N (%)
-4
-6
-8
-10
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLTAGE (V)
Efficiency, L = 100µH
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
1 LED
3 LEDs
5 LEDs
7 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPL Y VOLTAGE (V)
Sw it chin g Freq uency, L = 100µH
500
450
400
150
100
50
0
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(k
H
z)
350
300
250
200
1 LED
3 LEDs
5 LEDs
7 LEDs
11 LEDs
13 LEDs
15 LEDs
0 102030405060
SUPPL Y VOLTAGE (V)
Duty Cycle, L = 100µH
100
90
80
30
20
10
0
D
U
T
Y
C
Y
C
LE ( %)
70
60
50
40
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
0102030405060
SU PPLY VOLTAGE (V)
Outp ut C u rr ent, L = 15 H
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
1.100
1.080
1.060
1.040
1.020
1.000
0.980
O
UT
P
UT
C
U
R
R
ENT (
A
)
0102030405060
SUPPLY VOL TAGE (V)
Output Current Deviation, L = 15H
10
8
6
4
2
0
-2
O
U
T
P
U
T
C
U
R
R
EN
T
DEVI
A
T
I
O
N (%)
-4
-6
-8
-10
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLT AGE (V)
Efficiency, L = 150µH
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
1 LED
3 LEDs
5 LEDs
7 LEDs
11 LEDs
13 LEDs
15 LEDs
500
450
400
150
100
50
0
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(k
H
z)
350
300
250
200
0102030405060
SUPPLY VOLTAGE (V)
Sw itching Frequency, L = 150 µH
100
90
80
30
20
10
0
D
U
T
Y
C
Y
C
LE (%)
70
60
50
40
0102030405060
SUPPL Y VOLTAGE (V)
Duty Cycle, L = 150µH
1 LED
3 LEDs
5 LEDs
7 LEDs
11 LEDs
13 LEDs
15 LEDs
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
0102030405060
SUPPLY VOL TAGE (V)
Output Current, L = 220µH
1.100
1.080
1.060
1.040
1.020
1.000
0.980
OU
T
P
U
T
C
U
R
R
E
N
T
(
A
)
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOL TAGE (V)
Output Current Deviation, L = 220µH
10
8
6
4
2
0
-2
OU
T
P
U
T
C
U
R
R
E
N
T
D
E
VI
A
T
ION (
%
)
-4
-6
-8
-10
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
0102030405060
SUPPLY VOLTAGE (V)
Effic iency, L = 220µH
1 LED
3 LEDs
5 LEDs
7 LEDs
9 LEDs
11 LEDs
13 LEDs
15 LEDs
EFFICIENCY (%)
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
0102030405060
SUPPLY VOLTAGE (V)
Sw it chin g Frequency, L = 220 µH
500
450
400
150
100
50
0
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(k
H
z)
350
300
250
200
1 LED
3 LEDs
5 LEDs
7 LEDs
11 LE Ds
13 LEDs
15 LEDs
0 102030405060
SUPPL Y VOLTAGE (V)
Duty Cycle, L = 220µH
100
90
80
30
20
10
0
D
U
T
Y
C
Y
C
LE ( %)
70
60
50
40
1 LED
3 LEDs
5 LEDs
7 LEDs
11 LE Ds
13 LEDs
15 LEDs
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
ADJ PIN VOL TAGE (V)
LED Current vs. ADJ
0321
1200
1000
800
600
400
200
0
LED
C
U
R
R
E
N
T
(mA)
R = 200m
Ω
R = 300m
Ω
R = 680m
Ω
SUPPLY VOLTAGE (V)
0705010 20 30 40 60
800
500
400
300
200
100
0
S
U
P
P
L
Y
C
U
R
R
E
N
T
(mA)
600
700
SUPPLY VOLTAGE (V)
0705010 20 30 40 60
1.2430
1.2415
1.2410
1.2405
1.2400
1.2395
1.2380
ADJ
P
I
N
V
O
L
T
A
G
E (V)
1.2420
1.2425
1.2385
1.2390
SUPPL Y VOLTAGE (V)
0705010 20 30 40 60
90
60
50
40
30
0
S
H
U
T
D
O
WN
C
U
R
R
EN
T
(mA)
70
80
10
20
ZXLD1366
ZXLD1366
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Typical Operating Conditions (cont.)
05 303510 15 20 25
SUPPLY VOLT AGE (V)
LX On-Resi stance vs. Supply Volt age
-40°C
20°C
150°C
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
O
N-
R
E
S
I
S
T
A
N
C
E ( )
Ω
7V
9V
12V
20V
30V
-50 0 20050 100 150
TEMP ERATURE (°C)
V vs. Temperature
ADJ
1.262
1.260
1.258
1.256
1.254
1.250
1.248
1.246
1.244
V (V)
ADJ
1.252
7V
9V
12V
30V
20V
-50 0 20050 100 150
DI E TE MP E RATU R E C )
LX On-Resisitance vs. Die Temperature
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
O
N
-
R
E
S
I
S
T
A
N
C
E
()
Ω
ZXLD1366
ZXLD1366
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Application Information
Setting Nominal Average Outpu t Cu rrent with External Resistor RS
The nominal average output current in the LED(s) is determined by the value of the external current sense resistor (R S) connected between
VIN and ISENSE and is given by:
IOUTnom = 0.2/RS for RS 0.2Ω
The table below gives values of nominal average output current for several preferred values of current setting resistor (RS) in the typical
application circuit shown on page 1:
RS (Ω) Nominal Average Output
Current (mA)
0.20 1000
0.27 740
0.56 357
The above values assume that the ADJ pin is floating and at a nominal voltage of VREF (= 1.25V). Note that RS = 0.2Ω is the minimum
allowed value of sense resistor under these conditions to maintain switch current below the specified maximum value.
It is possible to use different values of RS if the ADJ pin is driven from an external voltage. (See next section).
Output Current Adjustment by External DC Control Voltage
The ADJ pin can be driven by an external dc voltage (VADJ), as shown, to adjust the output current to a value above or below the nominal
average value defined by RS.
The nominal average output current in this case is given by:
IOUTdc = (VADJ /1.25) x (0.2/RS) for 0.3< VADJ <2.5V
Note that 100% brightness setting corresponds to VADJ = VREF. When driving the ADJ pin above 1.25V, RS must be increased in
proportion to prevent IOUTdc exceeding 1A maximum.
The input impedance of the ADJ pin is 50k ±25% for voltages below VREF and 14.2k ±25% for voltages above VREF +100mV.
Output Current Adjustment by PWM Control
Directly Driving ADJ Input
A Pulse Width Modulated (PWM) signal with duty cycle DPWM can be applied to the ADJ pin, as shown below, to adjust the output current to
a value above or below the nominal average value set by resistor RS:
GND
ZXLD1366
ADJ
GND
+
DC
PW
M
GND
0V
ADJ
GND
ZXLD1366
ADJ
ZXLD1366
ZXLD1366
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Application Information (cont.)
Driving the ADJ Input via Open Collector Transistor
The recommended method of driving the ADJ pin and controlling the amplitude of the PWM waveform is to use a small NPN switching
transistor as shown below:
This scheme uses the 50k resistor between the ADJ pin and the internal voltage reference as a pull-up resistor for the external transistor.
Driving the ADJ Input from a Microcontroller
Another possibility is to drive the device from the open drain output of a microcontroller. The diagram below shows one method of doing this:
If the NMOS transistor within the microcontroller has high Gate / Drain capacitance, this arrangement can inject a negative spike into ADJ
input of the ZXLD1366 and cause erratic operation but the addition of a Schottky clamp diode (eg Diodes Inc. SD103CWS) to ground and
inclusion of a series resistor (3.3k) will prevent this. See the section on PWM dimming for more details of the various modes of control using
high frequency and low frequency PWM signals.
Shutdown Mode
Taking the ADJ pin to a voltage below 0.2V for more tha n approximately 100s will turn off the output and suppl y current to a low standby
level of 65A nominal.
Note that the ADJ pin is not a logic input. Taking the ADJ pin to a voltage above VREF will increase output current above the 100% nominal
average value. (See page 18 graphs for details).
PWM GND
ZXLD1366
ADJ
GND
GND
ZXLD1366
ADJ
MCU 3.3k
ZXLD1366
ZXLD1366
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Application Information (cont.)
Soft-Start
An external capacitor from the ADJ pin to ground will provide a soft-start delay, by increasing the ti me taken for the voltage on this pin to rise
to the turn-on threshold and by slowing down the rate of rise of the control voltage at the input of the comparator. Adding capacitance
increases this delay by approximately 0.2ms/nF. The graph below shows the variation of soft-start time for different values of capacitor.
60 80 100 12002040
CAPACI TANCE (nF)
Soft-S tart T ime vs. Capacitance form A DJ to Ground
16
14
12
10
4
2
0
-2
8
6
S
O
F
T
-S
T
A
R
T
T
IME (ms)
Actual Operating Waveforms [VIN = 60V, RS = 0.2Ω, L = 68μH, 22nF on ADJ]
Soft-start operation. LX voltage (CH2) and Output current (CH3) using a 22nF external capacitor on the ADJ pin.
ZXLD1366
ZXLD1366
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Application Information (cont.)
VIN Capacitor Selection
A low ESR capacitor should be used for input decoupling, as the ESR of this capacitor appears in series with the supply source impedance
and lowers overall efficiency. This capacitor has to supply the relatively high peak current to the coil and smooth the current ripple on the input
supply.
To avoid transients into the IC, the size of the input capacitor will depend on the VIN voltage:
VIN = 6 to 40V CIN = 2.2F
VIN = 40 to 50V CIN = 4.7F
VIN = 50 to 60V CIN = 10F
When the input voltage is close to the output voltage the input current increases which puts more demand on the input capacitor. The
minimum value of 2.2F may need to be increased to 4.7F; higher values will improve performance at lower input voltages, especially when
the source impedance is high. The input capacitor should be placed as close as possible to the IC.
For maximum stability over temperature and voltage, capacitors with X7R, X5R, or better dielectric is recommended. Capacitors with Y5V
dielectric are not suitable for decoupling in this application and should NOT be used.
When higher voltages are used with the CIN = 10F, an electrolytic capacitor can be used provided that a suitable 1µF ceramic capacitor is
also used and positioned as close to the VIN pin as possible.
A suitable capacitor would be NACEW100M1006.3x8T R13F (NIC Components).
The following web sites are useful when finding alternatives:
www.murata.com
www.niccomp.com
www.kemet.com
Inductor Selection
Recommended inductor values for the ZXLD1366 are in the range 68H to 220H.
Higher values of inductance are recommended at higher supply voltages in order to minimize errors due to s witching delays, which result in
increased ripple and lower efficiency. Higher values of inductance also result in a smaller change in output current over the supply voltage
range. (see graphs pages 10-17). The inductor should be mounted as close to the device as possible with low resistance connections to the
LX and VIN pins.
The chosen coil should have a saturation current higher than the peak output current and a continuous current rating above the required
mean output current.
Suitable coils for use with the ZXLD1366 may be selected from the MSS range ma nufactured by Coilcraft, or the NPIS range manufa ctured
by NIC components. The following websites may be useful in finding suitable components.
www.coilcraft.com
www.niccomp.com
www.wuerth-elektronik.de
The inductor value should be chosen to maintain operating duty cycle and switch 'on'/'off' times within the specified limits over the supply
voltage and load current range.
The graph Figure 3 below can be used to select a recommended inductor based on maintaining the ZXLD1366 case temperature below
+60°C. For detailed performance characteristics for the inductor values 68, 100, 150 and 220H see graphs on pages 10-17.
ZXLD1366
ZXLD1366
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Application Information (cont.)
Minimum Recommended Inductor
2% Accuracy, <60°C Case Temperature
0 102030405060
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Number of LEDs
Supply Voltage (V)
Legend
68uH
100uH
150uH
220uH
Figure. 3 ZXLD1366 Minimum Recommende d Inductor (TSOT25)
Minimum Recommended Inductor
2% Accuracy, <60°C Case Temperature
0.00 10.00 20.00 30.00 40.00 50.00 60.00
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Number of LEDs
Supply Voltage (V)
Legend
68µH
100µH
150µH
220µH
Figure. 4 ZXLD1366 Minimum Recommende d Inductor (U- DF N3030-6 )
ZXLD1366
ZXLD1366
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Application Information (cont.)
Figure. 5 ZXLD1366 Minimum Recommended Indu ctor (SO-8E P)
Diode Selection
For maximum efficiency and perfo rmance, the rectifier (D1) shoul d be a fast lo w capacitance Schottky diode* with low reverse leakage at the
maximum operating voltage and temperature.
They also provide better efficiency than silicon diodes, due to a combination of lower forward voltage and reduced recovery time.
It is important to select parts with a peak current rating above the peak coil current and a continuous current rating higher than the maximum
output load current. It is very important to consider the reverse leakage of the diode when operating above 85°C. Excess leakage will increase
the power dissipation in the device and if close to the load may create a thermal runaway condition.
The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on the LX output. If a
silicon diode is used, care should be taken to ensure that the total voltage appearing on the LX pin including supply ripple, does not exceed
the specified maximum value.
*A suitable Schottky diode would be B3100 (Diodes Inc).
0 102030405060
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Legend
47µH
68µH
100µH
150µH
47µH
68µH
100µH
150µH
T < 70°C, I = 1A
CLED
Number of LE Ds
Supply Voltage (V)
ZXLD1366
ZXLD1366
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Application Information (cont.)
Reducing Output Ripple
Peak to peak ripple current in the LED(s) can be reduced, if required, by shunting a capacitor Cled across the LED(s) as shown below:
Figure. 6 Reduced Output Ripple
A value of 1µF will reduce the supply ripple current by a factor three (approx.). Proportionally lower ripple can be achieved with higher
capacitor values. Note that the capacitor will not affect operating frequency or efficiency, but it will increase start-up delay, by reducing the
rate of rise of LED voltage.
By adding this capacitor the current waveform through the LED(s) changes from a triangular ramp to a more sinusoidal version without
altering the mean current value.
Operation at Low Suppl y Voltage
Below the under-voltage lockout threshold (VSD) the drive to the output transistor is turned off to prevent device operation with excessive on-
resistance of the output transistor. The output tran sistor is not full enhanced until the supply voltage exceeds approximately 17V. At s upply
voltages between VSD and 17V care must be taken to avoid excessive power dissipation due to the on-resistance.
Note that when driving loads of two or more LEDs, the forward drop will normally be sufficient to prevent the device from switching below
approximately 6V. This will minimize the risk of damage to the device.
V
IN
V
IN
I
SENSE
LX
ZXLD1366
Rs
L1
Cled
LED
D1
ZXLD1366
ZXLD1366
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Application Information (cont.)
Thermal Considerations
When operating the device at high ambient temperatures, or when driving maximum load current, care must be taken to avoid exceedi ng the
package power dissipation limits. The graph below gives details for power derating. This assumes the device to be mounted on a 25mm2
PCB with 1oz copper standing in still air.
-40 -25 -10 5 20 35 50 65 80 -5 110 125
AMBIENT TEMPERA TURE C)
Maximum Power Dissipation
POWER DISSIPAT ION (W)
2.
5
2.0
1.5
1.0
0.5
0
SO-8EP
U-DFN3030-6
TSOT25
Note that the device power dissipation will most often be a m aximum at minimum suppl y voltage. It will also increase if the efficiency of the
circuit is low. This may result from the use of unsuitable coils, or excessive parasitic output capacitance on the switch output.
In order to maximize the thermal capabilities of the DFN3030-6 and the SO-8EP packages thermal vias should be incorporated into the PCB.
See figures 7 and 8 for examples used in the ZXLD1366 evaluation boards.
Figure. 7 Suggested Layout for U-DFN3030-6 Package
ZXLD1366
ZXLD1366
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Figure. 8 Suggested Layout for SO-8EP Package
Vias ensure an effective path to the ground plane for the heat flow therefore reducing the thermal impedance between junction and ambient
temperature. Diodes came to the conclusion that the compromise is reached by using more than 10 vias with 1mm of diameter and 0.5 hole
size.
Finally the same scheme in Figure 7 (without the exposed paddle) can be usde for the TSOT25 package guaranteeing an effective thermal
path.
Thermal Compensation of Output Current
High luminance LEDs often need to be supplied with a temperature compensated current in order to maintain stable and reliable operation at
all drive levels. The LEDs are usually mounted remotely from the device so, for this reason, the temperature coefficients of the internal
circuits for the ZXLD1366 have been optimized to minimize the change in output current when no compensation is employed. If output
current compensation is required, it is possible to use an external temperature sensing network normally using Negative Temperature
Coefficient (NTC) thermistors and/or diodes, mounted very close to the LED(s). The output of the sensing network can be used to drive the
ADJ pin in order to reduce output current with increasing temperature.
Layout Considerations
LX Pin
The LX pin of the device is a fast switching node, so PCB tracks should be kept as short as possible. To minimize ground 'bounce', the
ground pin of the device should be soldered directly to the ground plane.
Coil and Decoupling Capacitors and Current Sense Resistor
It is particularly important to mount the coil and the input decoupling capacitor as close to the device pins as possible to minimize parasitic
resistance and inductance, which will degrade efficiency. It is also important to minimize any track resistance in series with current sense
resistor RS. Its best to connect VIN directly to one end of RS and ISENSE directly to the opposite end of RS with no other currents flowing in
these tracks. It is important that the cathode current of the Schottk y diode does not flow in a track between RS and VIN as this may give an
apparent higher measure of current than is actual because of track resistance.
ADJ Pin
The ADJ pin is a high impedance input for voltages up to 1.35V so, when left floating, PCB tracks to this pin should be as short as possible
to reduce noise pickup. A 100nF capacitor from the ADJ pin to ground will reduce frequency modulation of the output under these
conditions. An additional series 3.3k resistor can also be used when driving the ADJ pin from an external circuit (see next page). This
resistor will provide filtering for low frequency noise and provide protection against high voltage transients.
ZXLD1366
ZXLD1366
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Application Information (cont.)
GND
ZXLD1366
ADJ
3.3k
100nF
GND
High Voltage Tracks
Avoid running any high voltage tracks close to the ADJ pin, to reduce the risk of leakage currents due to board conta mination. The ADJ pin is
soft-clamped for voltages above 1.35V to desensitize it to leakage that might raise the ADJ pin voltage and cause excessive output current.
However, a ground ring placed around the ADJ pin is recommended to minimize changes in output current under these conditions.
Evaluation PCB
ZXLD1366 evaluation boards are available on request. Terminals allow users to interface the boards to their preferred LED products.
Dimming Output Current Using PWM
Low Frequency PWM Mode
When the ADJ pin is driven with a low frequenc y PWM signal (eg 100Hz), with a high level voltage VADJ and a lo w level of zero, the ou tput of
the internal low pass filter will swing between 0V and VADJ, causing the input to the shutdown circuit to fall below its turn-off threshold (200mV
nom) when the ADJ pin is low. This will cause the output current to be switched on and off at the PWM frequency, resulting in an average
output current IOUTavg proportional to the PWM duty cycle.
(See Figure 9 - Low frequency PWM operating waveforms).
The average value of output current in this mode is given by:
IOUTavg 0.2DPWM/RS [for DPWM >0.001]
This mode is preferable if optimum LED 'whiteness' is required. It will also provide the widest possible dimming range (app rox. 1000:1) and
higher efficiency at the expense of greater output ripple.
V
ADJ
PWM Voltage Ton
IOUTavg
0V
0
Toff
0.2/RsIOUTnom
Output Current
Figure. 9 Low Frequency PWM Operating Waveforms
ZXLD1366
ZXLD1366
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Ordering Information
ZXLD1366 DAC : U-DFN3030-6
EN8 : SO-8EP
ET5 : TSOT25
TC : 13” Tape & Reel
TC : 13” Tape & Reel
TA : 7” Tape & Reel
Part Number Package Packing
ZXLD1366 XXX X
X
Device Part
Mark Packaging Reel Size
(inches) Reel Width
(mm) Quantity
Per Reel Part Number
Suffix AEC-Q100
ZXLD1366DACTC 1366 U-DFN3030-6 13 12 3000 TC
ZXLD1366EN8TC ZXLD
1366
YYWW SO-8EP 13 12 2500 TC Grade 1
ZXLD1366ET5TA 1366 TSOT25 7 8 3000 TA Grade 1
Where YY stands for last 2 digits of year - 10, 11 and WW stands for week number.
Package Outline Dimensions
1) TSOT25
TSOT25
Dim Min Max Typ
A 1.00
A1 0.01 0.10
A2 0.84 0.90
D 2.90
E 2.80
E1 1.60
b 0.30 0.45
c 0.12 0.20
e 0.95
e1 1.90
L 0.30 0.50
L2 0.25
θ 0° 8°
θ1 4° 12°
All Dimensions in mm
c
A1
L
E1 E
A2
D
e1
e5x b
θ
4x 1
θ
L2
A
ZXLD1366
ZXLD1366
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Package Outline Dimensions (cont.)
2) U-DFN3030-6
3) SO-8EP
U-DFN3030-6
Dim Min Max Typ
A 0.57 0.63 0.60
A1 0 0.05 0.02
A3 0.15
b 0.29 0.39 0.34
D 2.9 3.1 3.0
D2 2.65 2.85 2.75
E 2.9 3.1 3.0
e 1.205
E2 1.76 1.96 1.86
L 0.30 0.60 0.45
All Dimensions in mm
SO-8EP (SOP-8L-EP)
Dim Min Max Typ
A 1.40 1.50 1.45
A1 0.00 0.13 -
b 0.30 0.50 0.40
C 0.15 0.25 0.20
D 4.85 4.95 4.90
E 3.80 3.90 3.85
E0 3.85 3.95 3.90
E1 5.90 6.10 6.00
e - - 1.27
F 2.75 3.35 3.05
H 2.11 2.71 2.41
L 0.62 0.82 0.72
N - - 0.35
Q 0.60 0.70 0.65
All Dimensions in mm
Gauge Plane
Seating Plane
E1
E
N
e
b
A
45
°
E0
H
F
Exposed Pad
Bottom View
L
QC
7
°
4° ± 3°
9° (Al l si de s )
A1
D
14
85
D
A1
AA3
E2
e
b
L
E
D2
ZXLD1366
ZXLD1366
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Suggested Pad Layout
1) TSOT25
2) U-DFN3030-6
3) SO-8EP
Dimensions Value (in mm)
C 0.950
X 0.700
Y 1.000
Y1 3.199
Dimensions Value (in mm)
Z 2.75
G 0.57
X1 1.86
X2 0.45
Y 0.34
C 1.205
Dimensions Value (in mm)
X 0.60
Y 1.55
X1 3.30
Y1 2.66
C1 5.4
C2 1.27
Y1
C C
X (5x)
Y (5x)
X1
G
X2
Z
C
Y
X
C1
C2
Y
Exposed Pad
X1
Y1
ZXLD1366
ZXLD1366
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IMPORTANT NOTICE
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corre ctions or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herei n; neither does D iodes Incorporated conve y any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall
assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes
Incorporated website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales
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Should Customers purchase or use Diodes Incorporated products for any unintended or unaut horized application, Customers shall indemnify
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Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and
markings noted herein may also be covered by one or more United States, international or foreign trademarks.
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Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the
express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause
the failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems,
and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their
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