SN74LVC14A . . . RGY PACKAGE
(TOP VIEW)
1 14
7 8
2
3
4
5
6
13
12
11
10
9
6A
6Y
5A
5Y
4A
1Y
2A
2Y
3A
3Y
1A
4Y V
GND
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
SN54LVC14A . . . J OR W PACKAGE
SN74LVC14A . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
1Y
1A
NC
4Y
4A V
6A
3Y
GND
NC
SN54LVC14A . . . FK PACKAGE
(TOP VIEW)
CC
NC - No internal connection
SN54LVC14A, SN74LVC14A
www.ti.com
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
HEX SCHMITT-TRIGGER INVERTERS
Check for Samples: SN54LVC14A,SN74LVC14A
1FEATURES
• Operate From 1.65 V to 3.6 V • ESD Protection Exceeds JESD 22
• Specified From –40°C to 85°C, – 2000-V Human-Body Model (A114-A)
–40°C to 125°C, and –55°C to 125°C – 200-V Machine Model (A115-A)
• Inputs Accept Voltages to 5.5 V – 1000-V Charged-Device Model (C101)
• Max tpd of 6.4 ns at 3.3 V
• Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA= 25°C
• Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA= 25°C
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
DESCRIPTION/ORDERING INFORMATION
The SN54LVC14A hex Schmitt-trigger inverter is designed for 2.7-V to 3.6-V VCC operation, and the
SN74LVC14A hex Schmitt-trigger inverter is designed for 1.65-V to 3.6-V VCC operation.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 1993–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters. processing does not necessarily include testing of all parameters.
YA
SN54LVC14A, SN74LVC14A
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
www.ti.com
Ordering InformationORDERABLE TOP-SIDE
TAPACKAGE(1) PART NUMBER MARKING
–40°C to 85°C QFN – RGY Reel of 1000 SN74LVC14ARGYR LC14A
Tube of 50 SN74LVC14AD
SOIC – D Reel of 2500 SN74LVC14ADRG3 LVC14A
Reel of 250 SN74LVC14ADT
SOP – NS Reel of 2000 SN74LVC14ANSR LVC14A
–40°C to 125°C SSOP – DB Reel of 2000 SN74LVC14ADBR LC14A
Tube of 90 SN74LVC14APW
TSSOP – PW Reel of 2000 SN74LVC14APWRG3 LC14A
Reel of 250 SN74LVC14APWT
TVSOP – DGV Reel of 2000 SN74LVC14ADGVR LC14A
CDIP – J Tube of 25 SNJ54LVC14AJ SNJ54LVC14AJ
–55°C to 125°C CFP – W Tube of 150 SNJ54LVC14AW SNJ54LVC14AW
LCCC – FK Tube of 55 SNJ54LVC14AFK SNJ54LVC14AFK
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The devices contain six independent inverters and perform the Boolean function Y = A.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
Table 1. FUNCTION TABLE
(EACH INVERTER)
INPUT OUTPUT
A Y
H L
L H
logic diagram, each inverter (positive logic)
2Submit Documentation Feedback Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC14A SN74LVC14A
SN54LVC14A, SN74LVC14A
www.ti.com
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT
VCC Supply voltage range –0.5 6.5 V
VIInput voltage range(2) –0.5 6.5 V
VOOutput voltage range(2) (3) –0.5 VCC + 0.5 V
IIK Input clamp current VI< 0 –50 mA
IOK Output clamp current VO< 0 –50 mA
IOContinuous output current ±50 mA
Continuous current through VCC or GND ±100 mA
D package (4) 86
DB package(4) 96
DGV package(4) 127
qJA Package thermal impedance °C/W
NS package(4) 76
PW package(4) 113
RGY package(5) 47
Tstg Storage temperature range –65 150 °C
Ptot Power dissipation TA= –40°C to 125°C(6) (7) 500 mW
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
(5) The package thermal impedance is calculated in accordance with JESD 51-5.
(6) For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K.
(7) For the DB, DGV, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K.
Copyright © 1993–2010, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): SN54LVC14A SN74LVC14A
SN54LVC14A, SN74LVC14A
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
www.ti.com
Recommended Operating Oonditions(1)
SN54LVC14A
–55 TO 125°C UNIT
MIN MAX
Operating 2 3.6
VCC Supply voltage V
Data retention only 1.5
VIInput voltage 0 5.5 V
VOOutput voltage 0 VCC V
VCC = 2.7 V –12
IOH High-level output current mA
VCC = 3 V –24
VCC = 2.7 V 12
IOL Low-level output current mA
VCC = 3 V 24
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Recommended Operating Conditions(1)
SN74LVC14A
TA= 25°C –40 TO 85°C –40 TO 125°C UNIT
MIN MAX MIN MAX MIN MAX
Operating 1.65 3.6 1.65 3.6 1.65 3.6
VCC Supply voltage V
Data retention only 1.5 1.5 1.5
VIInput voltage 0 5.5 0 5.5 0 5.5 V
VOOutput voltage 0 VCC 0 VCC 0 VCC V
VCC = 1.65 V –4 –4 –4
VCC = 2.3 V –8 –8 –8
IOH High-level output current mA
VCC = 2.7 V –12 –12 –12
VCC = 3 V –24 –24 –24
VCC = 1.65 V 4 4 4
VCC = 2.3 V 8 8 8
IOL Low-level output current mA
VCC = 2.7 V 12 12 12
VCC = 3 V 24 24 24
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4Submit Documentation Feedback Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC14A SN74LVC14A
SN54LVC14A, SN74LVC14A
www.ti.com
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted) SN54LVC14A
PARAMETER TEST CONDITIONS VCC –55 TO 125°C UNIT
MIN TYP MAX
2.7 V 0.8 2
VT+
Positive-going 3 V 0.9 2 V
threshold 3.6 V 1.1 2
2.7 V 0.4 1.4
VT–
Negative-going 3 V 0.6 1.5 V
threshold 3.6 V 0.8 1.7
2.7 V 0.3 1.1
ΔVT
Hysteresis 3 V 0.3 1.2 V
(VT+ – VT-)3.6 V 0.3 1.2
IOH = –100 mA 2.7 V to 3.6 V VCC – 0.2
2.7 V 2.2
VOH IOH = –12 mA V
3 V 2.4
IOH = –24 mA 3 V 2.2
IOL = 100 mA 2.7 V to 3.6 V 0.2
VOL IOL = 12 mA 2.7 V 0.4 V
IOL = 24 mA 3 V 0.55
IIVI= 5.5 V or GND 3.6 V ±5 mA
ICC VI= VCC or GND, IO= 0 3.6 V 10 mA
ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND 2.7 V to 3.6 V 500 mA
CiVI= VCC or GND 3.3 V 5(1) pF
(1) TA= 25°C
Copyright © 1993–2010, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): SN54LVC14A SN74LVC14A
SN54LVC14A, SN74LVC14A
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
www.ti.com
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted) SN74LVC14A
PARAMETER TEST CONDITIONS VCC TA= 25°C –40 TO 85°C –40 TO 125°C UNIT
MIN TYP MAX MIN MAX MIN MAX
1.65 V 0.4 1.3 0.4 1.3 0.4 1.3
1.95 V 0.6 1.5 0.6 1.5 0.6 1.5
2.3 V 0.8 1.7 0.8 1.7 0.8 1.7
VT+
Positive-going 2.5 V 0.8 1.7 0.8 1.7 0.8 1.7 V
threshold 2.7 V 0.8 2 0.8 2 0.8 2
3 V 0.9 2 0.9 2 0.9 2
3.6 V 1.1 2 1.1 2 1.1 2
1.65 V 0.15 0.85 0.15 0.85 0.15 0.85
1.95 V 0.25 0.95 0.25 0.95 0.25 0.95
2.3 V 0.4 1.2 0.4 1.2 0.4 1.2
VT–
Negative-going 2.5 V 0.4 1.2 0.4 1.2 0.4 1.2 V
threshold 2.7 V 0.4 1.4 0.4 1.4 0.4 1.4
3 V 0.6 1.5 0.6 1.5 0.6 1.5
3.6 V 0.8 1.7 0.8 1.7 0.8 1.7
1.65 V 0.1 1.15 0.1 1.15 0.1 1.15
1.95 V 0.15 1.25 0.15 1.25 0.15 1.25
2.3 V 0.25 1.3 0.25 1.3 0.25 1.3
ΔVT
Hysteresis 2.5 V 0.25 1.3 0.25 1.3 0.25 1.3 V
(VT+ – VT-)2.7 V 0.3 1.1 0.3 1.1 0.3 1.1
3 V 0.3 1.2 0.3 1.2 0.3 1.2
3.6 V 0.3 1.2 0.3 1.2 0.3 1.2
IOH = –100 mA 1.65 V to 3.6 V VCC – 0.2 VCC – 0.2 VCC – 0.3
IOH = –4 mA 1.65 V 1.29 1.2 1.05
IOH = –8 mA 2.3 V 1.9 1.7 1.65
VOH V
2.7 V 2.2 2.2 2.05
IOH = –12 mA 3 V 2.4 2.4 2.25
IOH = –24 mA 3 V 2.3 2.2 2
IOL = 100 mA 1.65 V to 3.6 V 0.1 0.2 0.3
IOL = 4 mA 1.65 V 0.24 0.45 0.6
VOL IOL = 8 mA 2.3 V 0.3 0.7 0.75 V
IOL = 12 mA 2.7 V 0.4 0.4 0.6
IOL = 24 mA 3 V 0.55 0.55 0.8
IIVI= 5.5 V or GND 3.6 V ±1 ±5 ±20 mA
ICC VI= VCC or GND, IO= 0 3.6 V 1 10 40 mA
One input at
VCC – 0.6 V,
ΔICC 2.7 V to 3.6 V 500 500 5000 mA
Other inputs at
VCC or GND
CiVI= VCC or GND 3.3 V 5 pF
6Submit Documentation Feedback Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC14A SN74LVC14A
SN54LVC14A, SN74LVC14A
www.ti.com
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
Switching Characteristics
over operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVC14A
FROM TO
PARAMETER VCC –55 TO 125°C UNIT
(INPUT) (OUTPUT) MIN MAX
2.7 V 7.5
tpd A Y ns
3.3 V ± 0.3 V 1 6.4
Switching Characteristics
over operating free-air temperature range (unless otherwise noted) (see Figure 1)SN74LVC14A
FROM TO
PARAMETER VCC TA= 25°C –40 TO 85°C –40 TO 125°C UNIT
(INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX
1.8 V ± 0.15 V 1 5 10.5 1 11 1 13
2.5 V ± 0.2 V 1 3.4 7.3 1 7.8 1 10
tpd A Y ns
2.7 V 1 3.6 7.3 1 7.5 1 9.5
3.3 V ± 0.3 V 1 3.2 6.2 1 6.4 1 8
tsk(o) 3.3 V ± 0.3 V 1 1 1.5 ns
Operating Characteristics
TA= 25°C TEST
PARAMETER VCC TYP UNIT
CONDITIONS
1.8 V 11
Cpd Power dissipation capacitance per inverter f = 10 MHz 2.5 V 12 pF
3.3 V 15
Copyright © 1993–2010, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): SN54LVC14A SN74LVC14A
VM
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 VLOAD
Open
GND
RL
RL
Data Input
Timing Input VI
0 V
VI
0 V
0 V
tw
Input
VOLTAGE W AVEFORMS
SETUP AND HOLD TIMES
VOLTAGE W AVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE W AVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V∆
VOH - V∆≈0 V
VI
VOLTAGE W AVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VMVM
VMVM
VMVM
VM
VMVM
VM
VM
VM
VI
VM
VM
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
1 kΩ
500 Ω
500 Ω
500 Ω
VCC RL
2 × VCC
2 × VCC
6 V
6 V
VLOAD CL
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V∆
VCC
VCC
2.7 V
2.7 V
VI
VCC/2
VCC/2
1.5 V
1.5 V
VM
tr/tf
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
INPUTS
SN54LVC14A, SN74LVC14A
SCAS285Y –MARCH 1993–REVISED OCTOBER 2010
www.ti.com
Parameter Measurement Information
Figure 1. Load Circuit and Voltage Waveforms
8Submit Documentation Feedback Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC14A SN74LVC14A
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-9761501Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-9761501QCA ACTIVE CDIP J 14 1 TBD Call TI Call TI
5962-9761501QDA ACTIVE CFP W 14 1 TBD Call TI Call TI
5962-9761501V2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9761501VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
5962-9761501VDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type
SN74LVC14AD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI
SN74LVC14ADBR ACTIVE SSOP DB 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADE4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADGVRG4 ACTIVE TVSOP DGV 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADR ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADRG3 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM
SN74LVC14ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN74LVC14ADT ACTIVE SOIC D 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADTE4 ACTIVE SOIC D 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ADTG4 ACTIVE SOIC D 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ANSR ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ANSRG4 ACTIVE SO NS 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APW ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
SN74LVC14APWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWRG3 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM
SN74LVC14APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWT ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC14ARGYR ACTIVE VQFN RGY 14 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74LVC14ARGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SNJ54LVC14AFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SNJ54LVC14AJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type
SNJ54LVC14AW ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LVC14A, SN54LVC14A-SP, SN74LVC14A :
•Catalog: SN74LVC14A, SN54LVC14A
•Automotive: SN74LVC14A-Q1, SN74LVC14A-Q1
•Enhanced Product: SN74LVC14A-EP, SN74LVC14A-EP
•Military: SN54LVC14A
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2012
Addendum-Page 4
•Space: SN54LVC14A-SP
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
•Military - QML certified for Military and Defense Applications
•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LVC14ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN74LVC14ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1
SN74LVC14ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74LVC14ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74LVC14ADT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74LVC14ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
SN74LVC14APWR TSSOP PW 14 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1
SN74LVC14APWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74LVC14APWRG3 TSSOP PW 14 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1
SN74LVC14APWRG4 TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74LVC14APWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74LVC14ARGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVC14ADBR SSOP DB 14 2000 367.0 367.0 38.0
SN74LVC14ADGVR TVSOP DGV 14 2000 367.0 367.0 35.0
SN74LVC14ADR SOIC D 14 2500 333.2 345.9 28.6
SN74LVC14ADR SOIC D 14 2500 367.0 367.0 38.0
SN74LVC14ADT SOIC D 14 250 367.0 367.0 38.0
SN74LVC14ANSR SO NS 14 2000 367.0 367.0 38.0
SN74LVC14APWR TSSOP PW 14 2000 364.0 364.0 27.0
SN74LVC14APWR TSSOP PW 14 2000 367.0 367.0 35.0
SN74LVC14APWRG3 TSSOP PW 14 2000 364.0 364.0 27.0
SN74LVC14APWRG4 TSSOP PW 14 2000 367.0 367.0 35.0
SN74LVC14APWT TSSOP PW 14 250 367.0 367.0 35.0
SN74LVC14ARGYR VQFN RGY 14 3000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194