IRF250 Data Sheet March 1999 30A, 200V, 0.085 Ohm, N-Channel Power MOSFET * 30A, 200V Ordering Information IRF250 TO-204AE * rDS(ON) = 0.085 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Formerly developmental type TA09295. PACKAGE 1825.3 Features This N-Channel enhancement mode silicon gate power field effect transistor is designed, tested and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. These MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. They can be operated directly from integrated circuits. PART NUMBER File Number Symbol BRAND IRF250 D NOTE: When ordering, include the entire part number. G S Packaging JEDEC TO-204AE TOP VIEW DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRF250 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRF250 200 200 30 19 120 20 150 1.2 910 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified Electrical Specifications MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER SYMBOL BVDSS VGS = 0V, ID = 250A (Figure 10) 200 - - V Gate Threshold Voltage VGS(TH) VGS = VDS , ID = 250A 2.0 - 4.0 V - - 25 A - - 250 A 30 - - A Zero Gate Voltage Drain Current IDSS TEST CONDITIONS VDS = Rated BVDSS , VGS = 0V VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 125oC On State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time rDS(ON) gfs tD(ON) Rise Time tr Turn-Off Delay Time VDS > ID(ON) x rDS(ON)MAX , VGS = 10V VGS = 20V - - 100 nA VGS = 10V, ID = 16A (Figures 8, 9) - 0.07 0.085 VDS 50V, ID = 16V (Figure 12) VDD = 100V, ID 30A, RG = 6.2, RL = 3.2 (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature tD(OFF) Fall Time tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) Gate to Source Charge Qgs VGS = 10V, ID = 30A, VDS = 0.8 x Rated BVDSS , Ig(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature 13 19 - S - 20 30 ns - 120 180 ns - 70 100 ns - 80 120 ns - 79 120 nC - 13 - nC - 42 - nC - 2000 - pF Gate to Drain "Miller" Charge Qgd Input Capacitance CISS Output Capacitance COSS - 800 - pF Reverse-Transfer Capacitance CRSS - 300 - pF - 5.0 - nH - 12.5 - nH - - 0.83 oC/W - - 30 oC/W Internal Drain Inductance LD Internal Source Inductance LS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) Measured between the Contact Screw on Header that is Closer to Source and Gate Pins and Center of Die Measured from the Source Lead, 6mm (0.25in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S Thermal Resistance Junction to Case RJC Thermal Resistance Junction to Ambient RJA 2 Free Air Operation IRF250 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode ISDM D MIN TYP MAX UNITS - - 30 A - - 120 A - - 2.0 V 140 350 630 ns 1.8 4.7 8.1 C G S Source to Drain Diode Voltage (Note 2) TJ = 25oC, ISD = 30A, VGS = 0V (Figure 13) VSD Reverse Recovery Time TJ = 25oC, ISD = 30A, dISD/dt = 100A/s TJ = 25oC, ISD = 30A, dISD/dt = 100A/s trr Reverse Recovered Charge QRR NOTES: 2. Pulse Test: Pulse width 300s, duty cycle 2%. 3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 1.5mH, RG = 25, peak IAS = 30A. See Figures 15 and 16. Typical Performance Curves Unless Otherwise Specified 40 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 32 24 16 8 0 0 50 100 25 150 50 TC , CASE TEMPERATURE (oC) 75 100 150 125 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 ZJC, THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 0.5 0.2 0.1 0.1 0.05 0.02 0.01 10-2 10-3 10-5 PDM SINGLE PULSE t1 t2t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-4 10-3 10-2 0.1 t1, RECTANGULAR PULSE DURATION (S) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 1 10 IRF250 Typical Performance Curves (Continued) 50 103 VGS = 10V OPERATION IN THIS REGION IS LIMITED BY rDS(ON) 102 ID , DRAIN CURRENT (A) ID, DRAIN CURRENT (A) Unless Otherwise Specified 10ms 100ms 10 1ms 10ms 1 DC TC = 25oC TJ = MAX RATED SINGLE PULSE 0.1 1.0 10 102 VDS , DRAIN TO SOURCE VOLTAGE (V) 40 30 VGS = 6V 20 10 VGS = 5V VGS = 4V 0 103 0 20 40 60 80 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA ID, DRAIN CURRENT (A) IDS(ON), DRAIN TO SOURCE CURRENT (A) VGS = 10V VGS = 8V 40 VGS = 7V 30 VGS = 6V 20 10 VGS = 5V VGS = 4V 0 0 1 2 3 4 VDS , DRAIN TO SOURCE VOLTAGE (V) 5 100 VDS 50V 80s PULSE TEST 10 0.1 0 2 4 6 8 VSD , GATE TO SOURCE VOLTAGE (V) 10 FIGURE 7. TRANSFER CHARACTERISTICS 3.0 0.5 NORMALIZED DRAIN TO SOURCE ON RESISTANCE VOLTAGE 80s PULSE TEST 0.4 ON RESISTANCE () TJ = 25oC TJ = 150oC 1 FIGURE 6. SATURATION CHARACTERISTICS rDS(ON), DRAIN TO SOURCE 100 FIGURE 5. OUTPUT CHARACTERISTICS 50 80s PULSE TEST 80s PULSE TEST VGS = 7V 0.3 VGS = 10V 0.2 VGS = 20V 0.1 0 0 25 50 75 ID , DRAIN CURRENT (A) 100 125 FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4 ID = 30A VGS = 10V 2.4 1.8 1.2 0.6 0 -60 -40 -20 0 20 40 60 80 100 120 140 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRF250 Typical Performance Curves Unless Otherwise Specified (Continued) 7500 1.25 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD 1.15 6000 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A 1.05 0.95 0.85 0.75 -60 -40 0 2 5 10 2 5 102 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE ISD , SOURCE TO DRAIN CURRENT (A) 15 TJ = 150oC 10 5 10 1 VDS , DRAIN TO SOURCE VOLTAGE (V) TJ = 25oC 20 30 ID , DRAIN CURRENT (A) 40 5 2 102 5 TJ = 150oC 2 TJ = 25oC 10 5 2 1 50 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 0 0.5 1.0 1.5 2.0 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS , GATE TO SOURCE VOLTAGE (V) gfs , TRANSCONDUCTANCE (S) CRSS 103 VDS 50V 80s PULSE TEST 0 COSS -20 0 20 40 60 80 100 120 140 120 TJ, JUNCTION TEMPERATURE (oC) 20 0 CISS 3000 1500 FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 25 4500 ID = 30A 16 VDS = 40V VDS = 100V 12 VDS = 160V 8 4 0 0 25 50 75 100 125 Qg(TOT) , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 2.5 IRF250 Test Circuits and Waveforms VDS BVDSS tP L VDS IAS VARY tP TO OBTAIN VDD + RG REQUIRED PEAK IAS - VGS VDD DUT tP 0V 0 IAS 0.01 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr VDS RL 90% + RG - 10% 10% 0 VDD 90% 90% DUT VGS 0 50% 50% PULSE WIDTH 10% VGS FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT VDS (ISOLATED SUPPLY) CURRENT REGULATOR VDD Qg(TOT) 12V BATTERY 0.2F SAME TYPE AS DUT 50k Qgd Qgs 0.3F D Ig(REF) VDS DUT G 0 S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 6 VGS Ig(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRF250 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 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