Slgnetics Advanced BICMOS Products Objective specification ee Octal inverting buffer (3State) 74ABT240 FEATURES QUICK REFERENCE DATA * Octal bus interface SYMBOL PARAMETER To eno cov | TYPICAL | UNIT @ 3-State buffers amb = ; = Output capability: +64mA/-32mA ree ppagation delay CL = 50pF; Veg = SV 35 ns Latch-up protection exceeds 500mA ; _ per Jedec JC40.2 Std 17 Cw Input capacitance V, = OV of Veo 4 pF ESD protection exceeds 2000 V per Cour _ | Output capacitance Vi= OV oF Voc 7 pF MIL STD 883C Method 3015.6 and Icoz Total supply current Ouputs disabled; Voc =5.5V 500 nA 200 V per Machine Model DESCRIPTION ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE The 74ABT240 high-performance BICMOS device combines iow static 20-pin plastic DIP 40C to +85C J4ABT240N and dynamic power dissipation with 20-pin plastic SOL 40C to 485C 74ABT240D high speed and high output drive. The 74ABT240 device is an octal in- verting buffer that is ideal for driving PIN DESCRIPTION bus lines. The device features two PIN NUMBER SYMBOL NAME AND FUNCTION Output Enables (10E, 205), each con- 0-1 trolling four of the 3-State outputs. 2.46.8 A AS | Data inputs 11, 13, 15, 17 2A0-2A3_ | Data inputs 18, 16, 14, 12 1V0-17Y3 | Data outputs 9,7,5,3 270-273 | Data outputs 1,19 10E, 20E | Output enables 10 GND Ground (0V) 20 Veco Positive supply voltage PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) sa [ oor 1a for fo HEP 9 BL 242 Poof a 2401 E_> 23 April 24, 1991 41Signetics Advanced BICMOS Products Objective specification Octal inverting buffer (3-State) 74ABT240 FUNCTION TABLE INPUTS OUTPUTS 10E | 1An | 20E | 2An | 1n | 1n L L L L H H H H x H x z Zz ABSOLUTE MAXIMUM RATINGS? 2 SYMBOL PARAMETER CONDITIONS RATING UNIT Voc DC supply voltage 05 to +7.0 v fic DC input diode current Vv, <0 18 mA vi DC input voltage? -1.2to +7.0 V lox DC output diode current Vo<0d 50 mA Vout DC output voltage? output in Off or High state 0.5 to +5.5 Vv lout DC output current output in Low state 128 mA Tag Storage temperature range ~65 to 150 C NOTES: 1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions Is not implied. Exposure to abso- lute-maximumrated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance Integrated circuit in conjunction with its thermal environment can create junction tempara- tures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3 The input anc output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNIT Min Max Vec DC supply voltage 45 5.6 v vi Input voltage 0 Vee Vv Vin High level input voltage 2.0 v Vir Input voltage 0.8 Vv lou High level output current -32 mA lot Low level output current 64 mA At/Av Input transition rise or fall rate 0 ns/V Tamb operating free-air temperature range ~40 +85 C April 24, 1991 42Signetics Advanced BICMOS Products Objective specification Octal inverting buffer (3-State) 74ABT240 DC ELECTRICAL CHARACTERISTICS LIMITS Tame = 40C SYMBOL PARAMETER TEST CONDITIONS Tame = +25C to 485C UNIT Min Typ Max Min Max Vin Input clamp voltage Voo 2 4.5V; lk =-18mA -09 | ~-1.2 ~1.2 v Voc = 4.5V; low = -3MA; Vi = Vic or Vin 2.5 2.9 25 Vou High-level output voltage Voc = 5.0V; loy = -3mA; Vy = Vip or Vig 3.0 3.4 3.0 v Voe = 4.5V; low = 32mA; V) = Vi, or Vin 2.0 2.4 2.0 Voi Low-level output voltage Veg = 4.54; lo, = 64MA; V, = Vi_ or Vig 0.42 | 0.55 0.55 Vv 4 Input leakage current Voc = 5.5V; V, = GND or 5.5V 40.01 | +1.0 +1.0 pA lozet 3-State output High current | Voc = 5.5V; Vo = 2.7V; Vi = Vic or Vin 5.0 50 50 pA loz 3State output Low currant =| Voc = .5V; Vo = 0.5V; Vi = Vic or Vin ~5.0 50 -50 pA lo Short-circuit output current | Veg = 5.5V; Vo = 2.5V -50 | -100 | -180 | -50 | -180 | mA loch Voc = .5V; Outputs High, V, = GND or Voc 0.5 50 50 pA lect Quiescent supply current Voc = 5.5V; Outputs Low, V, = GND or Voc 24 30 30 mA Vec = 5.5V; Outputs 3-State; Icoz Vy = GND oF Voc 0.5 50 50 HA Outputs enabled, one input at 3.4V, other inputs at Voc or GND; Vig = 5.5V 05 | 16 0.5 | mA Additional supply current per | Outputs 3-State, one data input at 3.4V, Alec | input pin? other inputs at Voc or GND; Vgc = 5.5V 05 | 50 50 | BA Outputs 3-State, one enable input at 3.4V, other inputs at Veg or GND; Vog = 8.5V 05 | 15 05 | mA NOTES: 1 Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase In supply current for each input at 3.4V. April 24, 1991