74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
Rev. 11 — 10 August 2018 Product data sheet
1. General description
The 74LVC2G14 provides two inverting buffers with Schmitt-trigger input. It is capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device
in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the inputs makes the circuit tolerant
of slower input rise and fall time. This device is fully specified for partial power-down applications
using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current
through the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Input accepts voltages up to 5 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C.
3. Applications
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
4. Ordering information
Table 1. Ordering information
PackageType number
Temperature range Name Description Version
74LVC2G14GW -40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363
74LVC2G14GV -40 °C to +125 °C TSOP6 plastic surface-mounted package (TSOP6); 6 leads SOT457
74LVC2G14GM -40 °C to +125 °C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
SOT886
74LVC2G14GF -40 °C to +125 °C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1 × 0.5 mm
SOT891
74LVC2G14GN -40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 0.9 × 1.0 × 0.35 mm
SOT1115
74LVC2G14GS -40 °C to +125 °C XSON6 extremely thin small outline package; no leads;
6 terminals; body 1.0 × 1.0 × 0.35 mm
SOT1202
5. Marking
Table 2. Marking codes
Type number Marking code [1]
74LVC2G14GW VK
74LVC2G14GV V14
74LVC2G14GM VK
74LVC2G14GF VK
74LVC2G14GN VK
74LVC2G14GS VK
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
mnb082
1A 1Y
16
2A 2Y
34
Fig. 1. Logic symbol
mnb083
1
34
6
Fig. 2. IEC logic symbol
mnb084
2A 2Y
1A 1Y
Fig. 3. Logic diagram
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 2 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
7. Pinning information
7.1. Pinning
74LVC2G14
1A 1Y
GND
2A 2Y
001aab672
1
2
3
6
VCC
5
4
Fig. 4. Pin configuration
SOT363 (SC-88)
and SOT457 (TSOP6)
74LVC2G14
GND
001aab673
1A
2A
VCC
1Y
2Y
Transparent top view
2
3
1
5
4
6
Fig. 5. Pin configuration
SOT886 (XSON6)
74LVC2G14
GND
001aaf957
1A
2A
VCC
1Y
2Y
Transparent top view
2
3
1
5
4
6
Fig. 6. Pin configuration
SOT891, SOT1115
and SOT1202 (XSON6)
7.2. Pin description
Table 3. Pin description
Symbol Pin Description
1A 1 data input
GND 2 ground (0 V)
2A 3 data input
2Y 4 data output
VCC 5 supply voltage
1Y 6 data input
8. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level.
Input Output
nA nY
L H
H L
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 3 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
9. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +6.5 V
IIK input clamping current VI < 0 V -50 - mA
VIinput voltage [1] -0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - ±50 mA
Active mode [1] -0.5 VCC + 0.5 VVOoutput voltage
Power-down mode; VCC = 0 V [1] -0.5 +6.5 V
IOoutput current VO = 0 V to VCC - ±50 mA
ICC supply current - 100 mA
IGND ground current -100 - mA
Ptot total power dissipation Tamb = -40 °C to +125 °C [2] - 250 mW
Tstg storage temperature -65 +150 °C
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SC-88 and TSOP6 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
10. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 1.65 - 5.5 V
VIinput voltage 0 - 5.5 V
Active mode 0 - VCC VVOoutput voltage
Power-down mode; VCC = 0 V 0 - 5.5 V
Tamb ambient temperature -40 - +125 °C
11. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ [1] Max Unit
Tamb = -40 °C to +85 °C
VI = VT+ or VT-
IO = -100 μA; VCC = 1.65 V to 5.5 V VCC - 0.1 - - V
IO = -4 mA; VCC = 1.65 V 1.2 - - V
IO = -8 mA; VCC = 2.3 V 1.9 - - V
IO = -12 mA; VCC = 2.7 V 2.2 - - V
IO = -24 mA; VCC = 3.0 V 2.3 - - V
VOH HIGH-level output
voltage
IO = -32 mA; VCC = 4.5 V 3.8 - - V
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 4 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
Symbol Parameter Conditions Min Typ [1] Max Unit
VI = VT+ or VT-
IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.1 V
IO = 4 mA; VCC = 1.65 V - - 0.45 V
IO = 8 mA; VCC = 2.3 V - - 0.3 V
IO = 12 mA; VCC = 2.7 V - - 0.4 V
IO = 24 mA; VCC = 3.0 V - - 0.55 V
VOL LOW-level output
voltage
IO = 32 mA; VCC = 4.5 V - - 0.55 V
IIinput leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - ±0.1 ±1 μA
IOFF power-off leakage
current
VI or VO = 5.5 V; VCC = 0 V - ±0.1 ±2 μA
ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V;
IO = 0 A
- 0.1 4 μA
ΔICC additional supply
current
VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - 5 500 μA
CIinput capacitance VCC = 3.3 V; VI = GND to VCC - 3.5 - pF
Tamb = -40 °C to +125 °C
VI = VT+ or VT-
IO = -100 μA; VCC = 1.65 V to 5.5 V VCC - 0.1 - - V
IO = -4 mA; VCC = 1.65 V 0.95 - - V
IO = -8 mA; VCC = 2.3 V 1.7 - - V
IO = -12 mA; VCC = 2.7 V 1.9 - - V
IO = -24 mA; VCC = 3.0 V 2.0 - - V
VOH HIGH-level output
voltage
IO = -32 mA; VCC = 4.5 V 3.4 - - V
VI = VT+ or VT-
IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.1 V
IO = 4 mA; VCC = 1.65 V - - 0.7 V
IO = 8 mA; VCC = 2.3 V - - 0.45 V
IO = 12 mA; VCC = 2.7 V - - 0.6 V
IO = 24 mA; VCC = 3.0 V - - 0.8 V
VOL LOW-level output
voltage
IO = 32 mA; VCC = 4.5 V - - 0.8 V
IIinput leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - ±1 μA
IOFF power-off leakage
current
VI or VO = 5.5 V; VCC = 0 V - - ±2 μA
ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V;
IO = 0 A
- - 4 μA
ΔICC additional supply
current
VI = VCC - 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - - 500 μA
[1] All typical values are measured at maximum VCC and Tamb = 25 °C.
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 5 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
12. Transfer characteristics
Table 8. Transfer characteristics
Voltages are referenced to GND (ground = 0 V; for test circuit see Fig. 11
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
see Fig. 7 and Fig. 8
VCC = 1.8 V 0.70 1.10 1.50 0.70 1.70 V
VCC = 2.3 V 1.00 1.40 1.80 1.00 2.00 V
VCC = 3.0 V; see Fig. 9 1.30 1.76 2.20 1.30 2.40 V
VCC = 4.5 V 1.90 2.47 3.10 1.90 3.30 V
VT+ positive-going
threshold voltage
VCC = 5.5 V 2.20 2.91 3.60 2.20 3.80 V
see Fig. 7 and Fig. 8
VCC = 1.8 V 0.25 0.61 0.90 0.25 1.10 V
VCC = 2.3 V 0.40 0.80 1.15 0.40 1.35 V
VCC = 3.0 V; see Fig. 9 0.60 1.04 1.50 0.60 1.70 V
VCC = 4.5 V 1.00 1.55 2.00 1.00 2.20 V
VT- negative-going
threshold voltage
VCC = 5.5 V 1.20 1.86 2.30 1.20 2.50 V
(VT+ - VT-);
see Fig. 7 and Fig. 8
VCC = 1.8 V 0.15 0.49 1.00 0.15 1.20 V
VCC = 2.3 V 0.25 0.60 1.10 0.25 1.30 V
VCC = 3.0 V; see Fig. 9 0.40 0.73 1.20 0.40 1.40 V
VCC = 4.5 V 0.60 0.92 1.50 0.60 1.70 V
VHhysteresis voltage
VCC = 5.5 V 0.70 1.02 1.70 0.70 1.90 V
[1] All typical values are measured at Tamb = 25 °C
12.1. Waveforms transfer characteristics
mna207
VO
VI
VH
VT+
VT-
Fig. 7. Transfer characteristic
mna208
VO
VIVH
VT+
VT-
VT+ and VT- limits at 70 % and 20 %.
Fig. 8. Definition of VT+, VT- and VH
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 6 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
0
10.5 1.5 2
VI (V)
0
14
10
12
8
4
6
2
mdb627
ICC
(mA)
VCC = 3.0 V
Fig. 9. Typical transfer characteristics
13. Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 11.
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ [1] Max Min Max
Unit
nA to nY; see Fig. 10 [2]
VCC = 1.65 V to 1.95 V 1.0 5.6 11.0 1.0 12.0 ns
VCC = 2.3 V to 2.7 V 0.5 3.7 6.5 0.5 7.2 ns
VCC = 2.7 V 0.5 4.1 7.0 0.5 7.7 ns
VCC = 3.0 V to 3.6 V 0.5 3.9 6.0 0.5 6.7 ns
tpd propagation delay
VCC = 4.5 V to 5.5 V 0.5 2.7 4.3 0.5 4.7 ns
CPD power dissipation
capacitance
VI = GND to VCC; VCC = 3.3 V [3] - 18.1 - - - pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC
2 × fi × N + ∑(CL × VCC
2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC
2 × fo) = sum of outputs.
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 7 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
13.1. Waveforms and test circuit
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 10. The data input (nA) to output (nY) propagation delays
Table 10. Measurement points
Supply voltage Input Output
VCC VMVM
1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC
2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC
2.7 V 1.5 V 1.5 V
3.0 V to 3.6 V 1.5 V 1.5 V
4.5 V to 5.5 V 0.5 × VCC 0.5 × VCC
VEXT
VCC
VIVO
mna616
DUT
CL
RT
RL
RL
G
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 11. Test circuit for measuring switching times
Table 11. Test data
Supply voltage Input Load VEXT
VCC VItr = tfCLRLtPLH, tPHL
1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 kΩ open
2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open
2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open
3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open
4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 8 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
14. Application information
The slow input rise and fall times cause additional power dissipation, which can be calculated using
the following formula:
Padd = fi × (tr × ΔICC(AV) + tf × ΔICC(AV)) × VCC where:
Padd = additional power dissipation (μW);
fi = input frequency (MHz);
tr = input rise time (ns); 10 % to 90 %;
tf = input fall time (ns); 90 % to 10 %;
ΔICC(AV) = average additional supply current (μA).
ΔICC(AV) differs with positive or negative input transitions, as shown in Fig. 12.
An example of a relaxation circuit using the 74LVC2G14 is shown in Fig. 13.
2 3 4 6
50
0
40
5
30
20
10
mnb086
ΔICC(AV)
(mA)
VCC (V)
(1)
(2)
Linear change of VI between 0.8 V to 2.0 V. All values given are typical unless otherwise specified.
(1) Positive-going edge.
(2) Negative-going edge.
Fig. 12. Average ICC as a function of VCC
mna035
R
C
For K-factor, see Fig. 14
Fig. 13. Relaxation oscillator
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 9 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
aaa-022055
0123456
0
0.2
0.4
0.6
0.8
1
1.2
VCC (V)
K-factorK-factor
Fig. 14. Typical K-factor for relaxation oscillator
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 10 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
15. Package outline
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT363 SC-88
w BM
bp
D
e1
e
pin 1
index A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
1 32
456
Plastic surface-mounted package; 6 leads SOT363
UNIT A1
max bpc D Ee1HELpQ ywv
mm 0.1 0.30
0.20
2.2
1.8
0.25
0.10
1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
0.25
0.15
A
1.1
0.8
04-11-08
06-03-16
Fig. 15. Package outline SOT363 (SC-88)
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 11 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT457 SC-74
w BM
bp
D
e
pin 1
index A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
scale
c
X
1 32
456
0 1 2 mm
Plastic surface-mounted package (TSOP6); 6 leads SOT457
UNIT A1bpc D EHELpQ ywv
mm 0.1
0.013
0.40
0.25
3.1
2.7
0.26
0.10
1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2
0.33
0.23
A
1.1
0.9
05-11-07
06-03-16
Fig. 16. Package outline SOT457 (SC-74)
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 12 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT886 MO-252
sot886_po
04-07-22
12-01-05
Unit
mm
max
nom
min
0.5 0.04 1.50
1.45
1.40
1.05
1.00
0.95
0.35
0.30
0.27
0.40
0.35
0.32
0.6
A(1)
Dimensions (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886
A1b
0.25
0.20
0.17
D E e e1
0.5
L L1
terminal 1
index area
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
1
6
2
5
3
4
6x
(2)
4x
(2)
A
Fig. 17. Package outline SOT886 (XSON6)
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 13 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
terminal 1
index area
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT891
SOT891
05-04-06
07-05-15
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm 0.20
0.12
1.05
0.95
0.35
0.27
A1
max b E
1.05
0.95
D e e1L
0.40
0.32
L1
0.350.55
A
max
0.5 0.04
1
6
2
5
3
4
A
6×
(1)
4×
(1)
Note
1. Can be visible in some manufacturing processes.
Fig. 18. Package outline SOT891 (XSON6)
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 14 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1115
sot1115_po
10-04-02
10-04-07
Unit
mm
max
nom
min
0.35 0.04 0.95
0.90
0.85
1.05
1.00
0.95
0.55 0.3
0.40
0.35
0.32
A(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm SOT1115
A1b
0.20
0.15
0.12
D E e e1L
0.35
0.30
0.27
L1
0 0.5 1 mm
scale
terminal 1
index area
D
E
(4×)(2)
e1e1
e
L
L1
b
321
6 5 4
(6×)(2)
A1A
Fig. 19. Package outline SOT1115 (XSON6)
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 15 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT1202
sot1202_po
10-04-02
10-04-06
Unit
mm
max
nom
min
0.35 0.04 1.05
1.00
0.95
1.05
1.00
0.95
0.55 0.35
0.40
0.35
0.32
A(1)
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm SOT1202
A1b
0.20
0.15
0.12
D E e e1L
0.35
0.30
0.27
L1
0 0.5 1 mm
scale
terminal 1
index area
D
E
(4×)(2)
e1e1
e
L
b
1 2 3
L1
6 5 4
(6×)(2)
A
A1
Fig. 20. Package outline SOT1202 (XSON6)
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 16 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
16. Abbreviations
Table 12. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
17. Revision history
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC2G14 v.11 20180810 Product data sheet - 74LVC2G14 v.10
Modifications: The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74LVC2G14 v.10 20161215 Product data sheet - 74LVC2G14 v.9
Modifications: Table 7: The maximum limits for leakage current and supply current have changed.
74LVC2G14 v.9 20160315 Product data sheet - 74LVC2G14 v.8
Modifications: Fig. 14 added (typical K-factor for relaxation oscillator).
74LVC2G14 v.8 20140910 Product data sheet - 74LVC2G14 v.7
Modifications: Package outline drawing of SOT886 (Fig. 17) modified.
74LVC2G14 v.7 20111130 Product data sheet - 74LVC2G14 v.6
74LVC2G14 v.6 20110923 Product data sheet - 74LVC2G14 v.5
74LVC2G14 v.5 20101029 Product data sheet - 74LVC2G14 v.4
74LVC2G14 v.4 20070904 Product data sheet - 74LVC2G14 v.3
74LVC2G14 v.3 20070220 Product data sheet - 74LVC2G14 v.2
74LVC2G14 v.2 20040908 Product specification - 74LVC2G14 v.1
74LVC2G14 v.1 20030731 Product specification - -
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 17 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
18. Legal information
Data sheet status
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[1][2]
Product
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Definition
Objective [short]
data sheet
Development This document contains data from
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specification.
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74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 18 / 19
Nexperia 74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................2
5. Marking.......................................................................... 2
6. Functional diagram.......................................................2
7. Pinning information......................................................3
7.1. Pinning.........................................................................3
7.2. Pin description............................................................. 3
8. Functional description................................................. 3
9. Limiting values............................................................. 4
10. Recommended operating conditions........................4
11. Static characteristics..................................................4
12. Transfer characteristics............................................. 6
12.1. Waveforms transfer characteristics............................6
13. Dynamic characteristics............................................ 7
13.1. Waveforms and test circuit........................................ 8
14. Application information............................................. 9
15. Package outline........................................................ 11
16. Abbreviations............................................................ 17
17. Revision history........................................................17
18. Legal information......................................................18
© Nexperia B.V. 2018. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 10 August 2018
74LVC2G14 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 11 — 10 August 2018 19 / 19