7-203
7
VN2222
VN2224
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FET s are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
N-Channel Enhancement-Mode
Vertical DMOS FETs
Package Options
Ordering Information
Absolute Maximum Ratings
Drain-to-Source Voltage BVDSS
Drain-to-Gate Voltage BVDGS
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
* Distance of 1.6 mm from case for 10 seconds.
Order Number / Package
BVDSS /R
DS(ON) ID(ON)
BVDGS (max) (min) TO-92 20-Pin C-Dip
220V 1.25Ω5.0A – VN2222NC
240V 1.25Ω5.0A VN2224N3 –
Applications
■■Motor controls
■■Converters
■■Amplifiers
■■Switches
■■Power supply circuits
■■Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Features
■■Free from secondary breakdown
■■Low power drive requirement
■■Ease of paralleling
■■Low CISS and fast switching speeds
■■Excellent thermal stability
■■Integral Source-Drain diode
■■High input impedance and high gain
High Reliability Devices
See pages 5-4 and 5-5 for MILITARY STANDARD Process
Flows and Ordering Information.
Note: See Package Outline section for dimensions.
1
10
2
3
4
5
6
7
8
9
20
11
19
18
17
16
15
14
13
12
top view
SS
SS
SNC
G1 D1
G2 D2
G3 D3
G4 D4
SNC
SS
SS
TO-92
S G D
20-pin Ceramic DIP
7-204
Symbol Parameter Min Typ Max Unit Conditions
BVDSS VV
GS = 0V, ID = 5mA
VGS(th) Gate Threshold Voltage 1.0 3.0 V VGS = VDS, ID = 5mA
∆VGS(th) Change in VGS(th) with Temperature -4 -5 mV/°CV
GS = VDS, ID = 5mA
IGSS Gate Body Leakage 1 100 nA VGS = ±20V, VDS = 0V
IDSS Zero Gate Voltage Drain Current 50 µAV
GS = 0V, VDS = Max Rating
5mA V
GS = 0V, VDS = 0.8 Max Rating
TA = 125°C
ID(ON) ON-State Drain Current 2 VGS = 5V, VDS = 25V
510 V
GS = 10V, VDS = 25V
RDS(ON) 1.0 1.5 VGS = 5V, ID = 2A
0.9 1.25 VGS = 10V, ID = 2A
∆RDS(ON) Change in RDS(ON) with Temperature 1.0 1.4 %/°CV
GS = 10V, ID = 2A
GFS Forward Transconductance 1.0 2.2 VDS = 25V, ID = 2A
CISS Input Capacitance 300 350
COSS Common Source Output Capacitance 85 150 pF
CRSS Reverse Transfer Capacitance 20 35
td(ON) Turn-ON Delay Time 6 15
trRise Time 16 25
td(OFF) Turn-OFF Delay Time 65 90
tfFall Time 30 60
VSD Diode Forward Voltage Drop 0.8 1.0 V VGS = 0V, ISD = 100mA
trr Reverse Recovery Time 500 ns VGS = 0V, ISD = 1A
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Package ID (continuous)* ID (pulsed) Power Dissipation
θ
jc
θ
ja IDR*I
DRM
@ TC = 25°C°C/W °C/W
TO-92 0.9A 5.0A 1.0W 125 170 0.9A 5.0A
*ID (continuous) is limited by max rated Tj.
Thermal Characteristics
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
VDD
RL
OUTPUT
D.U.T.
t(ON)
td(ON)
t(OFF)
td(OFF) tF
tr
INPUT
INPUT
OUTPUT
10V
VDD
Rgen
0V
0V
Switching Waveforms and Test Circuit
Electrical Characteristics (@ 25°C unless otherwise specified)
Drain-to-Source
Breakdown Voltage
A
VN2222/VN2224
Ω
Static Drain-to-Source
ON-State Resistance
Ω
VDD = 25V
ID = 2A
RGEN = 10Ω
VGS = 0V, VDS = 25V
f = 1 MHz
ns
VN2224 240
VN2222 220
7-205
7
Typical Performance Curves
VN2222/VN2224
Output Characteristics
10
8
6
4
2
0
VDS (volts)
ID (amperes)
ID (amperes)
Saturation Characteristics
10
8
6
4
2
0
VDS (volts)
Maximum Rated Safe Operating Area
1 100010010
10
1
0.1
0.01
0.001
VDS (volts)
ID (amperes)
Thermal Response Characteristics
Thermal Resistance (normalized)
1.0
0.8
0.6
0.4
0.2
0
0.001 100.01 0.1 1
tp (seconds)
Transconductance vs. Drain Current
5
4
3
2
1
00105
GFS (siemens)
ID (amperes)
Power Dissipation vs. Case Temperature
0 15010050
10
5
0
1257525 TC (°C)
PD (watts)
TO-92
TC = 25°C
PD = 1W
TO-92
TA = -55°C
VDS = 25V
0102030 5040
4V
3V
0246 108
VGS = 10V
6V
4V
3V
TA = 25°C
TA = 125°C
VGS = 10V
6V
8V
8V
TO-92 (DC)
TC = 25°C
7-206
Typical Performance Curves
VN2222/VN2224
Gate Drive Dynamic Characteristics
QG (nanocoulombs)
VGS (volts)
Tj (°C)
VGS(th) (normalized)
RDS(ON) (normalized)
V(th) and RDS Variation with Temperature
On-Resistance vs. Drain Current
RDS(ON) (ohms)
BVDSS (normalized)
Tj (°C)
Transfer Characteristics
VGS (volts)
ID (amperes)
Capacitance vs. Drain-to-Source Voltage
400
C (picofarads)
VDS (volts)
ID (amperes)
BVDSS Variation with Temperature
0 10203040
300
200
0
0246810
10
5
-50 0 50 100 150
1.1
1.0
5
2
1.4
1.0
0.4
10
8
6
4
2
0246810
-50 0 50 100 150
300 pF
VDS = 40V
VDS = 10V
VGS = 5V
VGS = 10V
TA = -55°C
VDS = 25V
125°C
0246 108
0
3
4
f = 1MHz
CISS
COSS
CRSS
0.9
733 pF
0.6
0.8
1.2
2.4
2.0
1.6
1.2
0.8
0.4
Vth @ 5mA
25°C
0
100
0
1
RDS @ 10V, 2A
Note: Circle (e.g. B ) indicates JEDEC Reference.
Package Outline
E
0.065
± 0.003
B
1
0.080 ± 0.005
S
0.165
± 0.005
0.250
± 0.008
0.130
± 0.015
A
L
0.018
± 0.002
B
0.100 TYP.
e
1
0.035
± 0.005
Q
0.310 ± 0.010
E
1
0.011
± 0.002
C
0.760 ± 0.005
14
1
8
7
α = 0 - 15°
D
14-Lead Ceramic Dual-In Line Package (C)
CH06C Table Page 1 of 1
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Device
Number BVDSS
min (V)
RDS(ON)
max (Ω)
CISS
typ (pf) SOT-23
K1 TO-39
N2 TO-92
N3 Quad1
N6 SOT-89
N8
VN0300 30 1.2 190 •3
VN0104 40 3.0 35 •
VN3205 50 0.3 220 • • •
VN0106 60 3.0 55 •
VN2106 60 4.0 35 •
2N7000 60 5.0 60 •2
VN10K 60 5.0 60 •
2N7002 60 7.5 50 •
2N7008 60 7.5 50 •2
VN2222L 60 7.5 60 •3
VN1306460 8.0 25 •
VN2210 100 0.35 300 • •
VN2110 100 4.0 35 •
VN13104100 8.0 25 •
VN2222 220 1.25 300 •
VN2224 240 1.25 300 •
VN0550 500 60.0 45 •
VN2450 500 13.0 150 • •
VN2460 600 20.0 150 • •
Add package suffix for complete part number, e.g., VN0104N3 is VN0104 in a TO-92 package.
Notes:
1. Package options are defined on individual data sheets.
2. No package suffix required.
3. Use package suffix "L" instead of "N3".
4. Not recommended for new designs.
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