NTE980
Integrated Circuit
CMOS, Micropower Phase–Locked Loop (PLL)
Description:
The NTE980 CMOS Micropower Phase–Locked Loop (PLL) consists of a low–power, linear voltage–
controlled oscillator (VCO) and two different phase comparators having a common signal–input am-
plifier and a common comparator input in a 16–Lead type package. A 5.2V zener diode is provided
for supply regulation if necessary.
Features:
DVery Low Power Consumption: 70µW (Typ) @ VCO fo = 10kHz, VDD = 5V
DOperating Frequency Range up to 1.4MHz (Typ) @ VDD = 10V, RI = 5kΩ
DLow Frequency Drift: 0.04%/°C (Typ) @ VDD = 10V
DChoice of Two Phase Comparators:
Exclusive–OR Network (I)
Edge–Controlled Memory Network w/Phase–Pulse Output for Lock Indication (II)
DHigh VCO Linearity: < 1% (Typ) @ VDD = 10V
DVCO Inhibit Control for ON–OFF Keying and Ultra–Low Standby Power Consumption
DSource–Follower Output of VCO Control Input (Demod. Output)
DZener Diode to Assist Supply Regulation
DStandardized, Symmetrical Output Characteristics
D100% Tested for Quiescent Current at 20V
D5V, 10V, and 15V Parametric Ratings
Applications:
DFM Demodulator and Modulator
DFrequency Synthesis and Multiplication
DFrequency Discriminator
DSignal Conditioning
DFSK – Modems
DData Synchronization
DVoltage–to–Frequency Conversion
DTone Decoding
Absolute Maximum Ratings:
DC Supply Voltage Range (Voltages referenced to VSS terminal), VDD –0.5 to +20V. . . . . . . . . . . .
Input Voltage Range, All Inputs –0.5 to VDD+0.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Current, Any One Input ±10mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation (TA = –40° to +60°C), PD500mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TA = +60° to +85°C Derate Linearly at 12mW/°C to 200mW. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Device Dissipation Per Output Transistor (TA = –40° to +85°C) 100mW. . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature Range, TA–40° to +85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, Tstg –65° to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (During Soldering, 1/16” ±1/32” from case, 10sec Max), TL+265°C. . . . . . . . . . .
Recommended Operating Conditions: (TA = –40° to +85°C)
Parameter Min Typ Max Unit
Supply Voltage Range VCO Section:
As Fixed Oscillator 3–18 V
Phase–Lock–Loop Operation 5–18 V
Supply Voltage Range Phase Comparator Section:
Comparators 3–18 V
VCO Operation 5–18 V
Static Electrical Characteristics: (TA = +25°C unless otherwise specified)
Test Conditions
Parameter Symbol VOVIN VDD Min Typ Max Unit
VCO Section
Output Low (Sink) Current IOLMin 400mV 0V, 5V 5V 0.51 1.0 –mA
500mV 0V, 10V 10V 1.3 2.6 –mA
1.5V 0V, 15V 15V 3.4 6.8 –mA
Output High (Source) Current IOHMin 4.6V 0V, 5V 5V –0.51 –1.0 –mA
2.5V 0V, 5V 5V –1.6 –3.2 –mA
9.5V 0V, 10V 10V –1.3 –2.6 –mA
13.5V 0V, 15V 15V –3.4 –6.8 –mA
Output Voltage: Low–Level VOLMax Pin4 0V, 5V 5V –00.05 V
driving
CMOS 0V, 10V 10V –00.05 V
CMOS 0V, 15V 15V –00.05 V
Output Voltage: High–Level VOHMax e.g. 0V, 5V 5V 4.95 5.0 –V
Pin3 0V, 10V 10V 9.95 10.0 –V
0V, 15V 15V 14.95 15.0 –V
Input Current IINMax –0V, 18V 18V –±10–5±0.1 µA
Phase Comparator Section
Total Device Current IDDMax –0V, 5V 5V –0.1 0.2 mA
Pin14 = Open, Pin5 = VDD –0V, 10V 10V –0.5 1.0 mA
–0V, 15V 15V –0.75 1.5 mA
–0V, 20V 20V –2.0 4.0 mA
Pin14 = VSS or VDD, Pin5 = VDD –0V, 5V 5V –10.0 20.0 µA
–0V, 10V 10V –20.0 40.0 µA
–0V, 15V 15V –40.0 80.0 µA
–0V, 20V 20V –80.0 160.0 µA
Output Low (Sink) Current IOLMin 400mV 0V, 5V 5V 0.51 1.0 –mA
500mV 0V, 10V 10V 1.3 2.6 –mA
1.5V 0V, 15V 15V 3.4 6.8 –mA
Output High (Source) Current IOHMin 4.6V 0V, 5V 5V –0.51 –1.0 –mA
2.5V 0V, 5V 5V –1.6 –3.2 –mA
9.5V 0V, 10V 10V –1.3 –2.6 –mA
13.5V 0V, 15V 15V –3.4 –6.8 –mA
Static Electrical Characteristics (Cont’d): (TA = +25°C unless otherwise specified)
Test Conditions
Parameter Symbol VOVIN VDD Min Typ Max Unit
Phase Comparator Section (Cont’d)
DC Coupled Signal Input and VILMax 0.5V, 4.5V –5V – – 1.5 V
Comparator Input Voltage Sensitivity
Low Level 1V, 9V –10V – – 3.0 V
Low Level 1.5V, 13.5V –15V – – 4.0 V
High Level VIHMax 0.5V, 4.5V –5V 3.5 – – V
1V, 9V –10V 7.0 – – V
1.5V, 13.5V –15V 11.0 – – V
Input Current (Except Pin14) IINMax –0V, 18V 18V –±10–5±0.1 µA
3–State Leakage Current IOUTMax 0V, 18V 0V, 18V 18V –±10–5±0.1 µA
Electrical Characteristics: (TA = +25°C)
Test Conditions
Parameter Symbol VDD Min Typ Max Unit
VCO Section
Operating Power PDfo = 10kHz, R1 = 1MΩ,5V –70 140 µW
Dissipation R2 = ∞VCO = VDD 10V –800 1600 µW
VCOIN = 215V –3000 6000 µW
Maximum Operating fmax C1 = 50pF, R1 = 10kΩ5V 0.3 0.6 –MHz
Frequency R2 = ∞,
VCO = V 10V 0.6 1.2 –MHz
VCOIN = VDD 15V 0.8 1.6 –MHz
R1 = 5kΩ5V 0.5 0.8 –MHz
10V 1.0 1.4 –MHz
15V 1.4 2.4 –MHz
Linearity VCOIN = 2.5V±0.3V R1 = 10kΩ5V –1.7 –%
VCOIN = 5.0V±1.0V R1 = 100kΩ10V –0.5 –%
VCOIN = 5.0V±2.5V R1 = 400kΩ10V –4.0 –%
VCOIN = 7.5V±0.3V R1 = 100kΩ15V –0.5 –%
VCOIN = 7.5V±5.0V R1 = 1MΩ15V –7.0 –%
Temperature–Frequency fMIN = 0 5V –±0.12 –%/°C
Stability:
No Frequency Offset 10V –±0.04 –%/°C
No Frequency Offset 15V –±0.015 –%/°C
Frequency Offset fMIN 0 0 5V –±0.09 –%/°C
10V –±0.07 –%/°C
15V –±0.03 –%/°C
Output Duty Cycle 5, 10, 15V –50 –%
Output Transition Times tTHL, tTLH 5V –100 200 ns
10V –50 100 ns
15V –40 80 ns
Electrical Characteristics (Cont’d): (TA = +25°C)
Test Conditions
Parameter Symbol VDD Min Typ Max Unit
VCO Section (Cont’d)
Source–Follower Output VCOIN–VDEM RS > 10kΩ5V –1.8 2.5 V
(Demodulated Output):
Offset Voltage 10V –1.8 2.5 V
Offset Voltage 15V –1.8 2.5 V
Linearity VCOIN = 2.5V±0.3V RS = 100kΩ5V –0.3 –%
VCOIN = 5.0V±2.5V RS = 300kΩ10V –0.7 –%
VCOIN = 7.5V±5.0V RS = 500kΩ15V –0.9 –%
Zener Diode Voltage VZIZ = 50µA–4.45 5.50 6.15 V
Zener Dynamic Resistance RZIZ = 1mA – – 40 –Ω
Phase Comparator Section
Pin14 (Signal In) Input R14 5V 1.0 2.0 –MΩ
Resistance 10V 0.2 0.4 –MΩ
15V 0.1 0.2 –MΩ
AC Coupled Signal Input fIN = 100kHz, Sine Wave, Note 1 5V –180 360 mV
Voltage Sensitivity
(Peak–to–Peak) 10V –330 660 mV
(Peak–to–Peak) 15V –900 1800 mV
Propagation Delay Time tPHL 5V –225 450 ns
(Pin14 to Pin13)
High to Low Level 10V –100 200 ns
High to Low Level 15V –65 130 ns
Low to High Level tPLH 5V –350 700 ns
10V –150 300 ns
15V –100 200 ns
3–State Propagation Delay tPHZ 5V –225 450 ns
Time (Pin14 to Pin13)
High Level to 10V –100 200 ns
High Level to
Low Impedance 15V –95 190 ns
Low Level to tPLZ 5V –285 570 ns
High Impedance 10V –130 260 ns
15V –95 190 ns
Input Rise or Fall Times tr, tf5V – – 50.0 µs
Comparator Input (Pin3) 10V – – 1.0 µs
15V – – 0.3 µs
Signal Input (Pin14) 5V – – 500.0 µs
10V – – 20.0 µs
15V – – 2.5 µs
Output Transition Times tTHL, tTLH 5V –100 200 ns
10V –50 100 ns
15V –40 80 ns
Note 1. For sine wave, the frequency must be greater than 10kHz for Phase Comparator II.
R1 to VSS
R2 to VSS
VDD
Pin Connection Diagram
VSS
Inhibit
Demodulator Output
Phase Comp 2 Out
VCO Input
Signal Input
C1 (2)
VCO Output
C1 (1)
Comparator Input
Phase Comp 1 Out
Phase Pulses 1
2
3
4
5
6
7
8
16
15
14
13
Zener
12
11
10
9
.260 (6.6) Max
16 9
18
.785 (19.9) Max
.200 (5.08)
Max
.245
(6.22)
Min
.300 (7.62)
.700 (17.7)
.100 (2.54)
