Features
•Over temperature protection (with auto-restart)
•Short-circuit protection (current limit)
•Active clamp
•E.S.D protection
•Status feedback
•Open load detection
•Logic ground isolated from power ground
IPS511G/IPS512G
Data Sheet No.PD60156-K
Description
The IPS511G/IPS512G are fully protected five termin a l
high side switches with built in short-circuit, over-tem-
perature, ESD protection, inductive load capability
and diagnostic feedback. The output current is con-
trolled when it reaches Ilim value. The current limitation
is activated until the thermal protection acts. The
over-temperature protection turns off the high side
switch if the junction temperature exceeds Tshutdown.
It will automatically restart after the junction has
cooled 7oC below Tshutdown. A diagnostic pin is
provided for status feedback of short-circuit, over-
temperature and open load detection. The double
level shifter circuitry allows large offsets between the
logic ground and the load ground.
Available Package
Product Summary
Rds(on) 150mΩ (max)
V clamp 50V
I Limit 5A
V open load 3V
Typical Connection
FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
8 Lead SOIC
(Single)
IPS511G 16 Lead SOIC
(Dual)
IPS512G
Load
Logic
signal
control
Logic
Logic Gnd Load Gn d
Vcc
Out
Gnd
In
Dg
+ 5v
Status
feedback
+ VCC
Output pull-up resistor
Rdg
Rin
15K
Truth Table
Op. Conditions
Normal
Normal
Open load
Open load
Over current
Over current
Over-temperature
Over-temperature
In
H
L
H
L
H
L
H
L
Out
H
L
H
H
L
L (cycling)
L
L (limiting)
Dg
H
L
H
H
L
L
L
L
www.irf.com 1
IPS511G/IPS512G
2www.irf.com
(1) Limited by junction temperature (pulsed current limited also by internal wiring)
Symbol Parameter Min. Typ. Max. Units Test Conditions
Rth1 Thermal resistance with standard footprint — a
Rth2 Thermal resistance with 1" square footprint —& a
Rth1 Thermal resistance with standard footprint
(2 mos on) (2 mosfets on) —85 —
Rt h2 (1) Thermal resistance with standard footprint
(1 mos on) (1 mosfet on) —100 —
Rth2 Thermal resistance with 1" square footprint
(2 mos on) (2 mosfets on) —# —
Thermal Characteristics
8 Lead SOIC
16 Lead SOIC
oC/W
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are referenced to GROUND lead. (Tj = 25oC unless otherwise specified).
Symbol Parameter Min. Max. Units Test Conditions
Vout Maximum output voltage Vcc-50 Vcc+0.3
Voffset Maximum logic g round to load ground offset V cc-50 Vcc+0.3
Vin Maximum Input voltage -0.3 5.5
Iin, max Maximum IN current -5 10 mA
Vdg Maximum diagnostic output voltage -0.3 5.5 V
Idg, max Maximum diagnostic output current -1 10 mA
Isd cont. Diode max. continuous current (1)
(IPS511G) — 1.4
(per leg/both legs ON - IPS512G) — 0.8
Isd pulsed Diode max. pulsed current (1) —10
ESD1 Electrostatic discharge voltage (Human Body) — 4000 C=100pF, R=1500Ω,
ESD2 Electrostatic discharge voltage (Machine Model) — 500 C=200pF, R=0Ω, L=10µH
Pd Maximum power dissipation
(rth=125 oC/W) IPS511G — 1
(rth=85oC/W, both legs on) IPS512G — 1. 5
Tj max. Max. storage & operating junction temp. -40
+150
Vvv max Maximum Vcc voltage
—
50 V
V
A
V
oC
W
IPS511G/IPS512G
www.irf.com 3
Recommended Operating Conditions
These values are given for a quick design. For operation outside these conditions, please consult the application notes.
Symbol Parameter Min. Max. Units
Vcc Continuous Vcc voltage 5.5 35
VIH High level input voltage 4 5.5
VIL Low level input voltage -0.3 0.9
Iout Continuous output current
Tamb=85oC (TAmbient = 85oC, Tj = 125oC, rth = 100oC/W) IPS511G — 1.4
Iout Continuous output current per leg
Tamb=85oC (TAmbient = 85oC, Tj = 125oC Rth = 85oC/W both legs on) IPS512G — 1.0
Rin Recommended resistor in series with IN pin 4 6
Rdg Recommended resistor in series with DG pin 10 20
V
A
kΩ
Symbol Parameter Min. Typ. Max. Units Test Conditions
Rds(on) ON state resistance Tj = 25oC — 130 150
@Tj=25oC
Rds(on) ON state resistance @ Vcc = 6V — 130 150
(Vcc=6V)
Rds(on) ON state resistance Tj = 150oC—
220 —Vin = 5V, Iout = 2.5A
@Tj=150oC
Vcc oper. Operating voltage range 5.5 —35
V clamp 1 Vcc to OUT clamp voltage 1 50 56 —Id = 10mA (see Fig.1 & 2)
V clamp 2 Vcc to OUT clamp voltage 2 — 58 65
VfBody diode forward voltage — 0.9 1.2 Id = 2.5A, Vin = 0V
Icc off Supply current when OFF — 16 50 µAV
in = 0V, Vout = 0V
Icc on Supply current when ON — 0.7 2 mA Vin = 5V
Icc ac Ripple current when ON (AC RMS) —20 —µAV
in = 5V
Vdgl Low level diagnostic output voltage — 0.15 0.4 V Idg = 1.6 mA
Iol Output leakage current — 60 120 Vout = 6V
Iol Output leakage current 0 — 25 Vout = 0V
Idg
leakage Diagnostic output leakage current ——10 Vdg = 5.5V
Vih IN high threshold voltage — 2.3 2.5
Vil IN low threshold voltage 1 2 —
Iin, on On state IN positive current —70 200 µAVin = 5V
In, hyst. Input hysteresis 0.1 0.25 0. 5 V
Static Electrical Characteristics
(Tj = 25oC, Vcc = 14V unless otherwise specified.)
mΩ
Vin = 5V, Iout = 2.5A
Id = Isd (see Fig.1 & 2)
V
Vin = 5V, Iout = 1A
µA
V
IPS511G/IPS512G
4www.irf.com
Lead Assignments
Part Number
8 Lead SOIC
IPS511G IPS512G
1
GND IN DG OUT
Vcc Vcc Vcc Vcc
16 Lead SOIC
1
In1 Gnd1 Vcc Vcc Vcc Vcc Out2 Dg2
Dg1 Out1 Vcc Vcc Vcc Vcc Gnd2 In2
Symbol Parameter Min. Typ. Max. Units Test Conditions
Ilim Internal current limit 357AV
out = 0V
Tsd+ Over-temp. positive going threshold — 165 — oC See fig. 2
Tsd- Over-temp. negative going threshold — 158 —oCSee fig. 2
Vsc Short-circuit detection voltage (3) 2 3 4 V See fig. 2
Vopen load Open load detection threshold 2 3 4 V
Protection Characteristics
(3) Referenced to Vcc
Switching Electrical Characteristics
Vcc = 14V, Resistive Load = 5.6 Ω, Tj = 25oC, (unless otherwise specified).
Symbol Parameter Min. Typ. Max. Units Test Conditions
Tdon Turn-on delay time —750
Tr1 Rise time to Vout = Vcc - 5V —10 50
Tr2 Rise time from the end of TR1 to
Vout = 90% of Vcc —45 95
dV/dt (on) Turn ON dV/dt —1.3 4 V/µs
Eon Turn ON energy —400 —µJ
Tdoff Turn-off delay time —15 50
TfFall time to Vout = 10% of Vcc —10 50
dV/dt (off) Turn OFF dV/dt —26 V/µs
Eoff Turn OFF energy —80 — µJ
Tdiag Vout to Vdiag propagation delay — 5 15 µs
See figure 3
µs
µsSee figure 4
IPS511G/IPS512G
www.irf.com 5
Functional Block Diagram
All values are typical
2.2 V
2.7 V
+
-
Level
shift driver
Charge
pump
5 A
VCC
IN
50V
Over
Current
limit
VOUTGND
DG
7 V
7 V
62 V
40Ω
200 KΩ
+
-
Under vol tage
lock out
Open load 3 V
+
-
3 V
Tj
158°C
temperature 165°C
Short-circuit
Figure 1 - Active clamp waveforms Figure 2 - Protection timing diagram
Tsd+
(160 ° )
Vin
Iout
Ilim.
T
5 V
0 V
Tsd-
T shut down
limiting c
y
clin
g
Out
Vin
T clamp
V clamp
( + Vcc )
( see Appl . Notes to evaluate power dissipation )
0 V
I
out
IPS511G/IPS512G
6www.irf.com
Figure 4 - Switching times definition (turn-off)
Vin
Vout
90%
10%
Td off
Tf
d V /dt off
Figure 5 - Active clamp test circuit
Rem : V loa d is negative dur ing demagne t ization
14 V
IN
5 v
0 v
+
-
Vout
Iout
Vin L
R
Gnd
Dg Vcc
Out
Vdiag
Vout
Vcc -Vsc
Vcc
Vol
Vin
T dia g
Diag on blanking Diag off blan king
Figure 6 - Diagnostic delay definitions
Figure 3 - Switching times definition (turn-on)
Turn on energy with a resistive or an
inductive load
Vin
Vout
Vcc - 5V
90%
Vcc
10%
Td on Tr 1 Tr 2
dV/dt on
Iout1 Iout2
Eon2
Resistive load
Inductive loa d
Eon1
E1(t)
E2 (t)
IPS511G/IPS512G
www.irf.com 7
Figure 7 - Rds(on) (mΩ) Vs Vcc (V) Figure 8 - Normalized Rds(on) Vs Tj (oC)
0
50
100
150
0 5 10 15 20 25 30 35
Figure 10 - Max. Iout (A) Vs Load Inductance (uH)Figure 9 - Rds(on) (mΩ) Vs Iout (A)
0.1
1
10
50%
100%
150%
200%
-50 0 50 100 150
0
50
100
150
012345
IPS511G/IPS512G
8www.irf.com
Figure 11a - Max load current (A) Vs Tamb (oC)
IPS511G Figure 11b - Max load current (A) Vs Tamb (oC)
IPS512G
0
1
2
3
4
5
25 50 75 100 125 150
Standard footprint
Rth=100°C/W
1inc h² footpri nt
Rthja= 60°C/W
0
1
2
3
4
5
25 50 75 100 125 150
Standard footprint
bot h legs on
Standard footprint
one leg on
Figure 12 - Transient Thermal Impedance (oC/W)
Vs Time (S) - IPS511G/IPS512G Figure 13 - Ilim (A) Vs Tj (oC)
0,01
0,1
1
10
10 0
1E-05
1E-04
1E-03
1E-02
1E-01
1E+00
1E+01
1E+02
1E+03
0
1
2
3
4
5
6
-50 0 50 100 150
IPS511G/IPS512G
www.irf.com 9
Figure 14 - Eon, Eoff (µJ) vs I (A)
Resi sti ve load
0
200
400
600
0123
Eon
Eoff
0.1
1
10
100
1000
10000
1E+01
1E+02
1E+03
1E+04
1E+05
1E+06
I=Imax vs Induct.(see fi
g
.10)
I=1.5A
Figure 15 - Eon (µJ) Vs Load Inductance (µH)
(see Fig. 3)
0
25
50
75
100
125
150
0123
Dia
g
on blankin
g
Diag off blanking
Figure 16 - Diag Blanking time (µS) Vs Iout (A)
(resistive load - see Fig. 6)
1.00E-06
1.00E-05
1.00E-04
1.00E-03
0 5 10 15 20 25 30 35
Figure 17 - Icc (mA) Vs Vcc (V)
IPS511G/IPS512G
10 www.irf.com
Case Outline - IPS511G
(MS-012AA) 01-0021 09
8 Lead SOIC
IPS511G/IPS512G
www.irf.com 11
Case Outline
01-3064 00
16 Lead SOIC (narrow body)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd., Whyteleafe, Surrey CR3 0BL, United Kingdom
Tel: ++ 44 (0) 20 8645 8000
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo, Japan 171-0021 Tel: 8133 983 0086
IR HONG KONG: Unit 308, #F, New East Ocean Centre, No. 9 Science Museum Road, Tsimshatsui East, Kowloon
Hong Kong Tel: (852) 2803-7380
Data and specifications subject to change without notice. 5/9/2000
