TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 HIGH EFFICIENCY SINGLE INDUCTOR BUCK-BOOST CONVERTER WITH 4-A SWITCHES Check for Samples: TPS63020, TPS63021 FEATURES * * * * * 1 * * 2 * * * * * * * * Up to 96% Efficiency 3A Output Current at 3.3V in Step Down Mode (VIN = 3.6V to 5.5V) More than 2A Output Current at 3.3V in Boost Mode (VIN > 2.5V) Automatic Transition Between Step Down and Boost Mode Dynamic Input Current Limit Device Quiescent Current less than 50A Input Voltage Range: 1.8V to 5.5V Fixed and Adjustable Output Voltage Options from 1.2V to 5.5V Power Save Mode for Improved Efficiency at Low Output Power Forced Fixed Frequency Operation at 2.4MHz and Synchronization Possible Smart Power Good Output Load Disconnect During Shutdown Overtemperature Protection Overvoltage Protection Available in a 3 x 4-mm, QFN-14 Package APPLICATIONS * * * * * * * * All Two-Cell and Three-Cell Alkaline, NiCd or NiMH or Single-Cell Li Battery Powered Products Ultra Mobile PCs and Mobile Internet Devices Digital Media Players DSCs and Camcorders Cellular Phones and Smartphones Personal Medical Products Industrial Metering Equipment High Power LEDs DESCRIPTION The TPS6302x devices provide a power supply solution for products powered by either a two-cell or three-cell alkaline, NiCd or NiMH battery, or a one-cell Li-Ion or Li-polymer battery. Output currents can go as high as 3A while using a single-cell Li-Ion or Li-Polymer Battery, and discharge it down to 2.5V or lower. The buck-boost converter is based on a fixed frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain maximum efficiency. At low load currents, the converter enters Power Save mode to maintain high efficiency over a wide load current range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency. The maximum average current in the switches is limited to a typical value of 4A. The output voltage is programmable using an external resistor divider, or is fixed internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is disconnected from the battery. The device is packaged in a 14-pin QFN PowerPADTM package measuring 3 x 4 mm (DSJ). L1 1H VOUT VIN 2.5 V to 5.5V VIN C1 2X10F L2 L1 FB VINA C3 0.1F 3.3V2A VOUT R1 1M R3 1M EN C2 4X22F PS/SYNC PG GND PGND TPS63020 R2 180k Power Good Output 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2010-2013, Texas Instruments Incorporated TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE DEVICE OPTIONS (1) TA -40C to 85C (1) (2) OUTPUT VOLTAGE DC/DC PACKAGE MARKING Adjustable PS63020 3.3 V PS63021 PACKAGE PART NUMBER (2) TPS63020DSJ 14-Pin QFN TPS63021DSJ Contact the factory to check availability of other fixed output voltage versions. For detailed ordering information please check the PACKAGE OPTION ADDENDUM section at the end of this datasheet. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) Voltage range (2) Temperature range MIN MAX VIN, VINA, L1, L2, VOUT, PS/SYNC, EN, FB, PG -0.3 7 V Operating junction, TJ -40 150 C Storage, Tstg -65 150 C 3 kV Human Body Model - (HBM) ESD rating (3) (1) (2) (3) UNIT Machine Model - (MM) 200 V Charge Device Model - (CDM) 1.5 kV Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. All voltages are with respect to network ground terminal. ESD testing is performed according to the respective JESD22 JEDEC standard. THERMAL INFORMATION THERMAL METRIC TPS63020, TPS63021 (1) DSJ UNITS 14 PINS JA Junction-to-ambient thermal resistance JC(TOP) Junction-to-case(top) thermal resistance 47 JB Junction-to-board thermal resistance 17 JT Junction-to-top characterization parameter 0.9 JB Junction-to-board characterization parameter 16.8 JC(BOTTOM) Junction-to-case(bottom) thermal resistance 3.6 (1) 2 41.8 C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Supply voltage at VIN, VINA 1.8 5.5 V Operating free air temperature range, TA -40 85 C Operating junction temperature range, TJ -40 125 C ELECTRICAL CHARACTERISTICS over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25C) (unless otherwise noted) DC/DC STAGE PARAMETER TEST CONDITIONS Input voltage range VIN VOUT 0C TA 85C Minimum input voltage for startup f ISW Iq IS MAX UNIT 5.5 V 1.5 1.8 1.9 V Minimum input voltage for startup 1.5 1.8 2.0 V TPS63020 output voltage range 1.2 5.5 V mV 20% TPS63020 feedback voltage PS/SYNC = VIN TPS63021 output voltage VFB TYP 1.8 Duty cycle in step down conversion VFB MIN 495 500 505 3.267 3.3 3.333 TPS63020 feedback voltage PS/SYNC = GND referenced to 500mV 0.6% TPS63021 output voltage regulation PS/SYNC = GND referenced to 3.3V 0.6% V 5% 5% Maximum line regulation 0.5% Maximum load regulation 0.5% Oscillator frequency 2200 2400 2600 kHz Frequency range for synchronization 2200 2400 2600 kHz 3500 4000 4500 mA Average switch current limit VIN = VINA = 3.6 V, TA = 25C High side switch on resistance VIN = VINA = 3.6 V 50 Low side switch on resistance VIN = VINA = 3.6 V 50 IO = 0 mA, VEN = VIN = VINA = 3.6 V, VOUT = 3.3 V 25 50 5 10 Quiescent current VIN and VINA VOUT TPS63021 FB input impedance VEN = HIGH Shutdown current VEN = 0 V, VIN = VINA = 3.6 V m m 1 A A M 0.1 1 1.5 1.6 A CONTROL STAGE UVLO Under voltage lockout threshold VINA voltage decreasing 1.4 Under voltage lockout hysteresis VIL EN, PS/SYNC input low voltage VIH EN, PS/SYNC input high voltage 200 V mV 0.4 V 1.2 V EN, PS/SYNC input current Clamped to GND or VINA 0.01 0.1 A PG output low voltage VOUT = 3.3 V, IPGL = 10 A 0.04 0.4 V 0.01 0.1 A PG output leakage current Output overvoltage protection 5.5 7 V Overtemperature protection 140 C Overtemperature hysteresis 20 C Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 3 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com PIN ASSIGNMENTS PGND PGND PG PS/SYNC EN VIN VIN L1 L1 PGND PGND PGND PGND Po we rP ad VINA GND FB VOUT VOUT L2 L2 PGND PGND DSJ PACKAGE (TOP VIEW) Pin Functions PIN NAME NO. I/O DESCRIPTION EN 12 I Enable input (1 enabled, 0 disabled) , must not be left open FB 3 I Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage versions GND 2 Control / logic ground L1 8, 9 I Connection for inductor L2 6, 7 I Connection for inductor PS/SYNC 13 I Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization), must not be left open PG 14 O Output power good (1 good, 0 failure; open drain) PGND PowerPADTM VIN Power ground 10, 11 I Supply voltage for power stage VOUT 4, 5 O Buck-boost converter output VINA 1 I Supply voltage for control stage PowerPADTM 4 Must be connected to PGND. Must be soldered to achieve appropriate power dissipation. Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 FUNCTIONAL BLOCK DIAGRAM (TPS63020) L1 L2 VIN VOUT Current Sensor VINA VIN VOUT PGND _ VINA Modulator PG PS/SYNC PGND Gate Control + _ + FB Oscillator EN VREF + - Device Control Temperature Control PGND GND PGND FUNCTIONAL BLOCK DIAGRAM (TPS63021) L1 L2 VIN VOUT Current Sensor VINA VIN VOUT PGND FB _ VINA Modulator PG PS/SYNC PGND Gate Control + Oscillator Device Control + _ + - VREF EN Temperature Control GND PGND PGND Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 5 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com TYPICAL CHARACTERISTICS TABLE OF GRAPHS DESCRIPTION FIGURE Maximum output current Efficiency Output voltage Waveforms vs Input voltage (TPS63020, VOUT = 2.5 V / VOUT = 4.5 V) 1 vs Input voltage (TPS63021, VOUT = 3.3V) 2 vs Output current (TPS63020, Power Save Enabled, VOUT = 2.5 V / VOUT = 4.5 V) 3 vs Output current (TPS63020, Power Save Disabled, VOUT = 2.5V / VOUT = 4.5V) 4 vs Output current (TPS63021, Power Save Enabled, VOUT = 3.3V) 5 vs Output current (TPS63021, Power Save Disabled, VOUT = 3.3V) 6 vs Input voltage (TPS63020, Power Save Enabled, VOUT = 2.5V, IOUT = {10; 500; 1000; 2000 mA}) 7 vs Input voltage (TPS63020, Power Save Enabled, VOUT = 4.5V, IOUT = {10; 500; 1000; 2000 mA}) 8 vs Input voltage (TPS63020, Power Save Disabled, VOUT = 2.5V, IOUT = {10; 500; 1000; 2000 mA}) 9 vs Input voltage (TPS63020, Power Save Disabled, VOUT = 4.5V, IOUT = {10; 500; 1000; 2000 mA}) 10 vs Input voltage (TPS63021, Power Save Enabled, VOUT = 3.3V, IOUT = {10; 500; 1000; 2000 mA}) 11 vs Input voltage (TPS63021, Power Save Disabled, VOUT = 3.3V, IOUT = {10; 500; 1000; 2000 mA}) 12 vs Output current (TPS63020, VOUT = 2.5 V) 13 vs Output current (TPS63020, VOUT = 4.5 V) 14 vs Output current (TPS63021, VOUT = 3.3V) 15 Load transient response (TPS63021, VIN < VOUT, Load change from 500 mA to 1500 mA) 16 Load transient response (TPS63021, VIN > VOUT, Load change from 500 mA to 1500 mA) 17 Line transient response (TPS63021, VOUT = 3.3V, IOUT = 1500 mA) 18 Startup after enable (TPS63021, VOUT = 3.3V, VIN = 2.4V, IOUT = 1500mA) 19 Startup after enable (TPS63021, VOUT = 3.3V, VIN = 4.2V, IOUT = 1500mA) 20 MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE 4 4 TPS63020 TPS63021 3.5 3.5 3 3 Maximum Output Current (A) Maximum Output Current (A) MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE 2.5 2 1.5 1 2.5 2 1.5 1 0.5 0.5 VOUT = 2.5V VOUT = 4.5V 0 1.8 2.2 2.6 3 3.4 3.8 4.2 Input Voltage (V) 4.6 5 5.4 VOUT = 3.3V 0 1.8 2.2 2.6 Figure 1. 6 Submit Documentation Feedback 3 3.4 3.8 4.2 Input Voltage (V) 4.6 5 5.4 Figure 2. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 EFFICIENCY vs OUTPUT CURRENT 100 90 90 80 80 70 70 60 60 Efficiency (%) Efficiency (%) 100 EFFICIENCY vs OUTPUT CURRENT 50 40 30 50 40 30 VIN = 1.8V, VOUT = 2.5V VIN = 3.6V, VOUT = 2.5V VIN = 2.4V, VOUT = 4.5V VIN = 3.6V, VOUT = 4.5V 20 10 VIN = 1.8V, VOUT = 2.5V VIN = 3.6V, VOUT = 2.5V VIN = 2.4V, VOUT = 4.5V VIN = 3.6V, VOUT = 4.5V 20 10 TPS63020, Power Save Enabled 0 100 1m 1 4 1m Figure 4. EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 90 90 80 80 70 70 60 60 50 40 30 1 4 50 40 30 20 20 VIN = 2.4V VIN = 3.6V 10 VIN = 2.4V VIN = 3.6V 10 TPS63021, Power Save Enabled 0 100 10m 100m Output Current (A) Figure 3. Efficiency (%) Efficiency (%) 100 10m 100m Output Current (A) TPS63020, Power Save Disabled 0 100 1m 10m 100m Output Current (A) 1 TPS63021, Power Save Disabled 4 0 100 Figure 5. 1m 10m 100m Output Current (A) 1 4 Figure 6. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 7 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 EFFICIENCY vs INPUT VOLTAGE 100 EFFICIENCY vs INPUT VOLTAGE 100 90 90 80 80 70 70 60 60 Efficiency (%) Efficiency (%) www.ti.com 50 40 30 50 40 30 IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A 20 10 IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A 20 10 TPS63020, VOUT = 2.5V, Power Save Enabled 0 1.8 2.2 2.6 3.4 3.8 4.2 Input Voltage (V) 4.6 5 5.4 2.2 2.6 3.4 3.8 4.2 Input Voltage (V) Figure 8. EFFICIENCY vs INPUT VOLTAGE EFFICIENCY vs INPUT VOLTAGE 100 90 90 80 80 70 70 60 60 50 40 30 4.6 5 5.4 50 40 30 IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A 20 10 IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A 20 10 TPS63020, VOUT = 2.5V, Power Save Disabled 0 1.8 2.2 2.6 3 3.4 3.8 4.2 Input Voltage (V) 4.6 TPS63020, VOUT = 4.5V, Power Save Disabled 5 5.4 0 1.8 2.2 2.6 Figure 9. 8 3 Figure 7. Efficiency (%) Efficiency (%) 100 3 TPS63020, VOUT = 4.5V, Power Save Enabled 0 1.8 Submit Documentation Feedback 3 3.4 3.8 4.2 Input Voltage (V) 4.6 5 5.4 Figure 10. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 EFFICIENCY vs INPUT VOLTAGE 100 90 90 80 80 70 70 60 60 Efficiency (%) Efficiency (%) 100 EFFICIENCY vs INPUT VOLTAGE 50 40 30 50 40 30 IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A 20 10 IOUT = 10mA IOUT = 500mA IOUT = 1A IOUT = 2A 20 10 TPS63021, Power Save Enabled 0 1.8 2.6 2.2 2.6 3 3.4 3.8 4.2 Input Voltage (V) 4.6 5 TPS63021, Power Save Disabled 0 1.8 5.4 2.2 2.6 3 3.4 3.8 4.2 Input Voltage (V) Figure 11. Figure 12. OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 4.6 VIN = 3.6V 5 5.4 VIN = 3.6V 4.55 Output Voltage (V) 2.55 Output Voltage (V) 4.6 2.5 2.45 4.5 4.45 TPS63020, Power Save Disabled 2.4 100 1m 10m 100m Output Current (A) 1 5 TPS63020, Power Save Disabled 4.4 100 1m 10m 100m Output Current (A) Figure 13. 1 5 Figure 14. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 9 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 3.4 www.ti.com OUTPUT VOLTAGE vs OUTPUT CURRENT LOAD TRANSIENT RESPONSE VIN = 3.6V Output Voltage 50 mV/div, AC Output Voltage (V) 3.35 3.3 Output Current 500 mA/div, DC 3.25 TPS63021 TPS63021, Power Save Disabled 3.2 100 1m 10m 100m Output Current (A) VIN = 2.4 V, IOUT = 500 mA to 1500 mA Time 2 ms/div 1 5 Figure 15. Figure 16. LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE Output Voltage 50 mV/div, AC Output Voltage 50 mV/div, AC Output Current 500 mA/div, DC Input Voltage 500 mV/div, AC TPS63021 VIN = 4.2 V, IOUT = 500 mA to 1500 mA TPS63021 VIN = 3.0 V to 3.7 V, IOUT = 1500 mA Time 2 ms/div Figure 17. 10 Submit Documentation Feedback Time 2 ms/div Figure 18. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 STARTUP AFTER ENABLE Enable 2 V/div, DC STARTUP AFTER ENABLE Enable 2 V/div, DC Output Voltage 1 V/div, DC Output Voltage 1 V/div, DC Inductor Current 500 mA/div, DC Inductor Current 1 A/div, DC Voltage at L1 5 V/div, DC TPS63021 Voltage at L2 5 V/div, DC VIN = 2.4 V, RL = 2.2 W TPS63021 Time 100 ms/div VIN = 4.2 V, RL = 2.2 W Time 40 ms/div Figure 20. Figure 19. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 11 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com PARAMETER MEASUREMENT INFORMATION L1 1.5H VOUT VIN 2.5 V to 5.5V VIN C1 2X10F L2 L1 FB VINA C3 3.3V1.5A VOUT R1 R3 1M 1M EN 0.1F C2 3X22F PS/SYNC PG GND PGND R2 180k Power Good Output TPS63020 Table 1. List of Components REFERENCE DESCRIPTION MANUFACTURER TPS63020 or TPS63021 Texas Instruments L1 1.5 H, 4 mm x 4 mm x 2 mm XFL4020-152ML, Coilcraft C1 2 x 10 F 6.3V, 0603, X5R ceramic GRM188R60J106ME84D, Murata C2 3 x 22 F 6.3V, 0603, X5R ceramic GRM188R60J226MEAOL Murata C3 0.1 F, X5R or X7R ceramic R1 Depending on the output voltage at TPS63020, 0 at TPS63021 R2 Depending on the output voltage at TPS63020, not used at TPS63021 R3 1 M 12 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 DETAILED DESCRIPTION The controller circuit of the device is based on an average current mode topology. The controller also uses input and output voltage feedforward. Changes of input and output voltage are monitored and immediately can change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be connected to that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage will be compared with the internal reference voltage to generate a stable and accurate output voltage. The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power range. To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and PGND are used. The reference for all control functions is the GND pin. The power switches are connected to PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND pin. Due to the 4-switch topology, the load is always disconnected from the input during shutdown of the converter. To protect the device from overheating an internal temperature sensor is implemented. Buck-Boost Operation To regulate the output voltage at all possible input voltage conditions, the device automatically switches from step down operation to boost operation and back as required by the configuration. It always uses one active switch, one rectifying switch, one switch permanently on, and one switch permanently off. Therefore, it operates as a step down converter (buck) when the input voltage is higher than the output voltage, and as a boost converter when the input voltage is lower than the output voltage. There is no mode of operation in which all 4 switches are permanently switching. Controlling the switches this way allows the converter to maintain high efficiency at the most important point of operation, when input voltage is close to the output voltage. The RMS current through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses. For the remaining 2 switches, one is kept permanently on and the other is kept permanently off, thus causing no switching losses. Control loop description The average inductor current is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 21 shows the control loop. The non inverting input of the transconductance amplifier Gmv can be assumed to be constant. The output of Gmv defines the average inductor current. The current through resistor RS, which represents the actual inductor current, is compared to the desired value and the difference, or current error, is amplified and compared to the sawtooth ramp of either the Buck or the Boost. The Buck-Boost Overlap ControlTM makes sure that the classical buck-boost function, which would cause two switches to be on every half a cycle, is avoided. Thanks to this block whenever all switches becomes active during one clock cycle, the two ramps are shifted away from each other, on the other hand when there is no switching activities because there is a gap between the ramps, the ramps are moved closer together. As a result the number of classical buck-boost cycles or no switching is reduced to a minimum and high efficiency values has been achieved. Slope compensation is not required to avoid subharmonic oscillation which are otherwise observed when working with peak current mode control with D>0.5. Nevertheless the amplified inductor current downslope at one input of the PWM comparator must not exceed the oscillator ramp slope at the other comparator input. This purpose is reached limiting the gain of the current amplifier. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 13 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com TM Figure 21. Average Current Mode Control Power Save Mode and synchronization The PS/SYNC pin can be used to select different operation modes. Power Save Mode is used to improve efficiency at light load. To enable power-save, PS/SYNC must be set low. If PS/SYNC is set low then Power Save Mode is entered when the average inductor current gets lower then about 100mA. At this point the converter operates with reduced switching frequency and with a minimum quiescent current to maintain high efficiency. During the Power Save Mode, the output voltage is monitored with a comparator by the threshold comp low and comp high. When the device enters Power Save Mode, the converter stops operating and the output voltage drops. The slope of the output voltage depends on the load and the value of output capacitance. As the output voltage falls below the comp low threshold set to 2.5% typical above Vout, the device ramps up the output voltage again, by starting operation using a programmed average inductor current higher than required by the current load condition. Operation can last one or several pulses. The converter continues these pulses until the comp high threshold, set to typically 3.5% above Vout nominal, is reached and the average inductance current gets lower than about 100mA. When the load increases above the minimum forced inductor current of about 100mA, the device will automatically switch to PWM mode. The Power Save Mode can be disabled by programming high at the PS/SYNC. Connecting a clock signal at PS/SYNC forces the device to synchronize to the connected clock frequency. Synchronization is done by a PLL, so synchronizing to lower and higher frequencies compared to the internal clock works without any issues. The PLL can also tolerate missing clock pulses without the converter malfunctioning. The PS/SYNC input supports standard logic thresholds. 14 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 Heavy Load transient step 3.5% PFM mode at light load current Comparator High 3% Comparator low 2.5% Vo PWM mode Absolute Voltage drop with positioning Figure 22. Power-Save Mode Thresholds and Dynamic Voltage Positioning Dynamic voltage positioning As detailed in Figure 22, the output voltage is typically 3% above the nominal output voltage at light load currents, as the device is in Power Save Mode. This gives additional headroom for the voltage drop during a load transient from light load to full load. This allows the converter to operate with a small output capacitor and still have a low absolute voltage drop during heavy load transient changes. See Figure 22 for detailed operation of the power save mode Dynamic Current Limit To protect the device and the application, the average inductor current is limited internally on the IC. At nominal operating conditions, this current limit is constant. The current limit value can be found in the electrical characteristics table. If the supply voltage at VIN drops below 2.3V, the current limit is reduced. This can happen when the input power source becomes weak. Increasing output impedance, when the batteries are almost discharged, or an additional heavy pulse load is connected to the battery can cause the VIN voltage to drop. The dynamic current limit has its lowest value when reaching the minimum recommended supply voltage at VIN. At this voltage, the device is forced into burst mode operation trying to stay active as long as possible even with a weak input power source. If the die temperature increases above the recommended maximum temperature, the dynamic current limit becomes active. Similar to the behavior when the input voltage at VIN drops, the current limit is reduced with temperature increasing. Device Enable The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is disconnected from the input. This means that the output voltage can drop below the input voltage during shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high peak currents flowing from the input. Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 15 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com Power Good The device has a built in power good function to indicate whether the output voltage is regulated properly. As soon as the average inductor current gets limited to a value below the current the voltage regulator demands for maintaining the output voltage the power good output gets low impedance. The output is open drain, so its logic function can be adjusted to any voltage level the connected logic is using, by connecting a pull up resistor to the supply voltage of the logic. By monitoring the status of the current control loop, the power good output provides the earliest indication possible for an output voltage break down and leaves the connected application a maximum time to safely react. Softstart and Short Circuit Protection After being enabled, the device starts operating. The average current limit ramps up from an initial 400mA following the output voltage increasing. At an output voltage of about 1.2V, the current limit is at its nominal value. If the output voltage does not increase, the current limit will not increase. There is no timer implemented. Thus, the output voltage overshoot at startup, as well as the inrush current, is kept at a minimum. The device ramps up the output voltage in a controlled manner even if a large capacitor is connected at the output. When the output voltage does not increase above 1.2V, the device assumes a short circuit at the output, and keeps the current limit low to protect itself and the application. At a short on the output during operation, the current limit also is decreased accordingly. Overvoltage Protection If, for any reason, the output voltage is not fed back properly to the input of the voltage amplifier, control of the output voltage will not work anymore. Therefore overvoltage protection is implemented to avoid the output voltage exceeding critical values for the device and possibly for the system it is supplying. The implemented overvoltage protection circuit monitors the output voltage internally as well. In case it reaches the overvoltage threshold the voltage amplifier regulates the output voltage to this value. Undervoltage Lockout An undervoltage lockout function prevents device start-up if the supply voltage on VINA is lower than approximately its threshold (see electrical characteristics table). When in operation, the device automatically enters the shutdown mode if the voltage on VINA drops below the undervoltage lockout threshold. The device automatically restarts if the input voltage recovers to the minimum operating input voltage. Overtemperature Protection The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature exceeds the programmed threshold (see electrical characteristics table) the device stops operating. As soon as the IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold. 16 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 APPLICATION INFORMATION DESIGN PROCEDURE The TPS6302X series of buck-boost converter has internal loop compensation. Therefore, the external L-C filter has to be selected to work with the internal compensation. As a general rule of thumb, the product LxC should not move over a wide range when selecting a different output filter. However, when selecting the output filter a low limit for the inductor value exists to avoid subharmonic oscillation which could be caused by a far too fast ramp up of the amplified inductor current. For the TPS6302X series the minimum inductor value should be kept at 1uH. In particular either 1uH or 1.5uH is recommended working at output current between 1.5A and 2A. If operating with lower load current is also possible to use 2.2uH. Selecting a larger output capacitor value is less critical because the corner frequency moves to lower frequencies. Inductor Selection For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at high-switching frequencies the core material has a higher impact on efficiency. When using small chip inductors, the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger inductor values cause a slower load transient response. To avoid saturation of the inductor, with the chosen inductance value, the peak current for the inductor in steady state operation can be calculated. Equation (1) and (5) show how to calculate the peak current IPEAK. Only the equation which defines the switch current in boost mode is reported because this is providing the highest value of current and represents the critical current value for selecting the right inductor. Vout - Vin Vout Iout Vin D = + (1 - D) 2 f L Duty Cycle Boost IPEAK D= (1) (2) With, D =Duty Cycle in Boost mode f = Converter switching frequency (typical 2.4 MHz) L = Selected inductor value = Estimated converter efficiency (use the number from the efficiency curves or 0.80 as an assumption) Note: The calculation must be done for the maximum input voltage which is possible to have in boost mode Consideration must be given to the load transients and error conditions that can cause higher inductor currents. This must be taken into consideration when selecting an appropriate inductor. Please refer to Table 3 for typical inductors. The size of the inductor can also affect the stability of the feedback loop. In particular the boost transfer function exhibits a right half-plane zero, whose frequency is inverse proportional to the inductor value and the load current. This means higher is the value of inductance and load current more possibilities has the right plane zero to be moved at lower frequency which could degrade the phase margin of the feedback loop. It is recommended to choose the inductor's value in order to have the frequency of the right half plane zero >400KHz. The frequency of the RHPZ can be calculated using equation (6) f RHPZ = (1 - D)2 Vout 2p Iout L (3) With, D =Duty Cycle in Boost mode Note: The calculation must be done for the maximum input voltage which is possible to have in boost mode Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 17 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com Table 2. Inductor Selection VENDOR INDUCTOR SERIES Coilcraft XFL4020 Toko FDV0530S Capacitor selection Input Capacitor At least a 10F input capacitor is recommended to improve transient behavior of the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND pins of the IC is recommended. Output Capacitor For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND pins of the IC is recommended. If, for any reason, the application requires the use of large capacitors which can not be placed close to the IC, use a smaller ceramic capacitor in parallel to the large capacitor. The small capacitor should be placed as close as possible to the VOUT and PGND pins of the IC. The recommended typical output capacitor value is 30F with a variance that depends on the specific application requirements. There is also no upper limit for the output capacitance value. Larger capacitors will cause lower output voltage ripple as well as lower output voltage drop during load transients. When choosing input and output capacitors, it needs to be kept in mind, that the value of capacitance experiences significant losses from their rated value depending on the operating temperature and the operating DC voltage. It's not uncommon for a small surface mount ceramic capacitor to lose 50% and more of it's rated capacitance. For this reason could be important to use a larger value of capacitance or a capacitor with higher voltage rating in order to ensure the required capacitance at the full operating voltage. Bypass Capacitor To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor can be connected between VINA and GND. Using a ceramic capacitor with a value of 0.1F is recommended. The value of this capacitor should not be higher than 0.22F. Setting the Output Voltage When the adjustable output voltage version TPS63020 is used, the output voltage is set by the external resistor divider. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is regulated properly, the typical value of the voltage at the FB pin is 500mV. The maximum recommended value for the output voltage is 8V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01A, and the voltage across the resistor between FB and GND, R2, is typically 500 mV. Based on these two values, the recommended value for R2 should be lower than 500k, in order to set the divider current at 1A or higher. It is recommended to keep the value for this resistor in the range of 200k. From that, the value of the resistor connected between VOUT and FB, R1, depending on the needed output voltage (VOUT), can be calculated using Equation 4: aeV o R1 = R2 x c OUT - 1/ e VFB o 18 Submit Documentation Feedback (4) Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 LAYOUT CONSIDERATIONS For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the control ground, short traces are recommended as well, separation from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current. L1 GND GND C1 C2 U1 VOUT VIN R2 C3 EN PS/SYNC PG GND R1 Figure 23. PCB Layout Suggestion THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component. Three basic approaches for enhancing thermal performance are listed below: * Improving the power dissipation capability of the PCB design * Improving the thermal coupling of the component to the PCB by soldering the PowerPADTM * Introducing airflow in the system For more details on how to use the thermal parameters, see the application notes: Thermal Characteristics Application Note (SZZA017), and IC Package Thermal Metrics Application Note (SPRA953). Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 19 TPS63020 TPS63021 SLVS916C - JULY 2010 - REVISED MARCH 2013 www.ti.com TYPICAL APPLICATION L1 1H VOUT VIN 2.5 V to 5.5V L2 L1 VIN C1 C3 R1 FB VINA 2X10F 3.3V2A VOUT PS/SYNC 4X22F 4.7pF R2 PG GND C2 1M 68k C4 EN 0.1F R3 R1 300k 53k PGND Power Good Output TPS63020 Figure 24. Application Circuit 2A Load Current Capacitor C4 and resistor R1 are added for improved load transient performance. L1 1.5H VOUT VIN 2.5 V to 5.5V VIN C1 2X10F L2 L1 FB VINA C3 0.1F 3.3V1.5A VOUT R3 R1 1M 1M EN C2 3X22F PS/SYNC PG GND PGND R2 180k Power Good Output TPS63020 Figure 25. Application Circuit 1.5A Load Current 20 Submit Documentation Feedback Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 TPS63020 TPS63021 www.ti.com SLVS916C - JULY 2010 - REVISED MARCH 2013 REVISION HISTORY Changes from Original (April 2010) to Revision A Page * Changed the List Of Components table. C1 and C2 orderable number From: GRM188R60J106KME84D To: GRM188R60J106ME84D ................................................................................................................................................... 12 * Updated Figure 23 - PCB Layout Suggestion .................................................................................................................... 19 Changes from Revision A (December 2011) to Revision B Page Changes from Revision B (August 2012) to Revision C Page * Changed front-page circuit to show correct values .............................................................................................................. 1 * Changed Typical Application circuits to show correct component values. ......................................................................... 20 Copyright (c) 2010-2013, Texas Instruments Incorporated Product Folder Links: TPS63020 TPS63021 Submit Documentation Feedback 21 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Top-Side Markings (3) (4) TPS63020DSJR ACTIVE VSON DSJ 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PS63020 TPS63020DSJT ACTIVE VSON DSJ 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PS63020 TPS63021DSJR ACTIVE VSON DSJ 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PS63021 TPS63021DSJT ACTIVE VSON DSJ 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 PS63021 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Feb-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS63020DSJR VSON DSJ 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q1 TPS63020DSJT VSON DSJ 14 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q1 TPS63021DSJR VSON DSJ 14 3000 330.0 12.4 3.3 4.3 1.1 8.0 12.0 Q1 TPS63021DSJT VSON DSJ 14 250 180.0 12.4 3.3 4.3 1.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Feb-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS63020DSJR VSON DSJ 14 3000 367.0 367.0 35.0 TPS63020DSJT VSON DSJ 14 250 210.0 185.0 35.0 TPS63021DSJR VSON DSJ 14 3000 367.0 367.0 35.0 TPS63021DSJT VSON DSJ 14 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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