74VHC541MTC_NL - FAIRCHILD SEMICONDUCTOR

1. General description

The 74AHC541; 74AHCT541 is a high-speed Si-gate CMOS device.

The 74AHC541; 74AHCT541 are octal non-inverting buffer/line drivers with 3-state bus

compatible outputs.

The 3-state outputs are controlled by the output enable inputs OE0 and OE1.

A HIGH on OEn causes the outputs to assume a high-impedance OFF-state.

2. Features

■Balanced propagation delays

■All inputs have a Schmitt-trigger action

■Inputs accepts voltages higher than VCC

■For 74AHC541 only: operates with CMOS input levels

■For 74AHCT541 only: operates with TTL input levels

■ESD protection:

◆HBM JESD22-A114E exceeds 2000 V

◆MM JESD22-A115-A exceeds 200 V

◆CDM JESD22-C101C exceeds 1000 V

■Multiple package options

■Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

3. Ordering information

74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

Rev. 03 — 12 November 2007 Product data sheet

Table 1. Ordering information

Type number Package

Temperature range Name Description Version

74AHC541D −40 °C to +125 °C SO20 plastic small outline package; 20 leads;

body width 7.5 mm SOT163-1

74AHCT541D

74AHC541PW −40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads;

body width 4.4 mm SOT360-1

74AHCT541PW

74AHC541BQ −40 °C to +125 °C DHVQFN20 plastic dual-in-line compatible thermal enhanced

very thin quad ﬂat package; no leads; 20 terminals;

body 2.5 ×4.5 ×0.85 mm

SOT764-1

74AHCT541BQ

Product data sheet Rev. 03 — 12 November 2007 2 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

4. Functional diagram

Fig 1. Logic symbol Fig 2. IEC logic symbol

OE0

OE1

mna179 mna180

911

1&EN

Product data sheet Rev. 03 — 12 November 2007 3 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

5. Pinning information

5.1 Pinning

5.2 Pin description

(1) The die substrate is attached to this pad using

conductive die attach material. It can not be used as

a supply pin or input.

Fig 3. Pin conﬁguration SO20, TSSOP20 Fig 4. Pin conﬁguration DHVQFN20

74AHC541

74AHCT541

OE0 VCC

A0 OE1

A1 Y0

A2 Y1

A3 Y2

A4 Y3

A5 Y4

A6 Y5

A7 Y6

GND Y7

001aah038

001aah039

74AHC541

74AHCT541

Transparent top view

A5 Y4

GND(1)

A4 Y3

A3 Y2

A2 Y1

A1 Y0

A0 OE1

GND

OE0

VCC

912

8 13

7 14

6 15

5 16

4 17

3 18

2 19

terminal 1

index area

Table 2. Pin description

Symbol Pin Description

OE0 1 output enable input (active LOW)

A[0:7] 2, 3, 4, 5, 6, 7, 8, 9 data input

GND 10 ground (0 V)

Y[0:7] 18, 17, 16, 15, 14, 13, 12, 11 data output

OE1 19 output enable input (active LOW)

VCC 20 supply voltage

Product data sheet Rev. 03 — 12 November 2007 4 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

6. Functional description

[1] H = HIGH voltage level;

L = LOW voltage level;

X = don’t care;

Z = high-impedance OFF-state.

7. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] Ptot derates linearly with 8 mW/K above 70 °C.

[3] Ptot derates linearly with 5.5 mW/K above 60 °C.

[4] Ptot derates linearly with 4.5 mW/K above 60 °C.

Table 3. Functional table[1]

Control Input Output

OE0 OE1 An Yn

LL L L

LL H H

XH X Z

HX X Z

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +7.0 V

VIinput voltage −0.5 +7.0 V

IIK input clamping current VI < −0.5 V [1] −20 - mA

IOK output clamping current VO<−0.5 V or VO>V

CC + 0.5 V [1] -±20 mA

IOoutput current VO = −0.5 V to (VCC + 0.5 V) - ±25 mA

ICC supply current - 75 mA

IGND ground current −75 - mA

Tstg storage temperature −65 +150 °C

Ptot total power dissipation Tamb = −40 °C to +125 °C

SO20 package [2] - 500 mW

TSSOP20 package [3] - 500 mW

DHVQFN20 package [4] - 500 mW

Product data sheet Rev. 03 — 12 November 2007 5 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

8. Recommended operating conditions

9. Static characteristics

Table 5. Recommended operating conditions

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 74AHC541 74AHCT541 Unit

Min Typ Max Min Typ Max

VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V

VIinput voltage 0 - 5.5 0 - 5.5 V

VOoutput voltage 0 - VCC 0- V

CC V

Tamb ambient temperature −40 +25 +125 −40 +25 +125 °C

∆t/∆V input transition rise

and fall rate VCC = 3.3 V ± 0.3 V - - 100 - - - ns/V

VCC = 5.0 V ± 0.5 V - - 20 - - 20 ns/V

Table 6. Static characteristics

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

For type 74AHC541

VIH HIGH-level

input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V

VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V

VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V

VIL LOW-level

input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V

VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V

VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V

VOH HIGH-level

output voltage VI= VIH or VIL

IO=−50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V

IO=−50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V

IO=−50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V

IO=−4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V

IO=−8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V

VOL LOW-level

output voltage VI= VIH or VIL

IO= 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V

IO= 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V

IO= 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V

IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V

IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V

IOZ OFF-state

output current VI =V

IH or VIL;

VO=V

CC or GND;

VCC = 5.5 V

--±0.25 - ±2.5 - ±10.0 µA

IIinput leakage

current VI=V

CC or GND;

VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA

ICC supply current VI=V

CC or GND; IO = 0 A;

VCC = 5.5 V - - 4.0 - 40 - 80 µA

Product data sheet Rev. 03 — 12 November 2007 6 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

CIinput

capacitance - 3.0 10 - 10 - 10 pF

COoutput

capacitance - 4.0 - - - - - pF

For type 74AHCT541

VIH HIGH-level

input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V

VIL LOW-level

input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V

VOH HIGH-level

output voltage VI= VIH or VIL; VCC = 4.5 V

IO=−50 µA 4.4 4.5 - 4.4 - 4.4 - V

IO=−8.0 mA 3.94 - - 3.8 - 3.70 - V

VOL LOW-level

output voltage VI= VIH or VIL; VCC = 4.5 V

IO= 50 µA - 0 0.1 - 0.1 - 0.1 V

IO= 8.0 mA - - 0.36 - 0.44 - 0.55 V

IOZ OFF-state

output current per input pin; VI =V

IH or VIL;

VCC = 5.5 V; IO= 0 A;

VO=V

CC or GND;

other pins at VCC or GND

--±0.25 - ±2.5 - ±10.0 µA

IIinput leakage

current VI=V

CC or GND;

VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA

ICC supply current VI=V

CC or GND; IO = 0 A;

VCC = 5.5 V - - 4.0 - 40 - 80 µA

∆ICC additional

supply current per input pin;

VI=V

CC −2.1 V; IO= 0 A;

other pins at VCC or GND;

VCC = 4.5 V to 5.5 V

- - 1.35 - 1.5 - 1.5 mA

CIinput

capacitance - 3 10 - 10 - 10 pF

COoutput

capacitance - 4.0 - - - - - pF

Table 6. Static characteristics

…continued

Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ Max Min Max Min Max

Product data sheet Rev. 03 — 12 November 2007 7 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

10. Dynamic characteristics

Table 7. Dynamic characteristics

GND = 0 V. For test circuit see Figure 7.

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ[1] Max Min Max Min Max

For type 74AHC541

tpd propagation

delay An to Yn; see Figure 5 [2]

VCC = 3.0 V to 3.6 V

CL= 15 pF - 5.0 7.0 1.0 8.5 1.0 9.0 ns

CL= 50 pF - 7.0 10.5 1.0 12.0 1.0 13.5 ns

VCC = 4.5 V to 5.5 V

CL= 15 pF - 3.5 5.0 1.0 6.0 1.0 6.5 ns

CL= 50 pF 5.0 7.0 1.0 8.0 1.0 9.0 ns

ten enable time OEn to Yn; see Figure 6 [2]

VCC = 3.0 V to 3.6 V

CL= 15 pF - 5.5 10.5 1.0 11.0 1.0 13.5 ns

CL= 50 pF - 7.5 14.0 1.0 16.0 1.0 17.5 ns

VCC = 4.5 V to 5.5 V

CL= 15 pF - 3.5 7.2 1.0 8.5 1.0 9.0 ns

CL= 50 pF - 5.0 9.2 1.0 10.5 1.0 11.5 ns

tdis disable time OEn to Yn; see Figure 6 [2]

VCC = 3.0 V to 3.6 V

CL= 15 pF - 6.0 11.0 1.0 12.0 1.0 14.0 ns

CL= 50 pF - 9.5 15.4 1.0 17.5 1.0 19.5 ns

VCC = 4.5 V to 5.5 V

CL= 15 pF - 4.5 7.5 1.0 8.0 1.0 9.5 ns

CL= 50 pF - 6.5 8.8 1.0 10.0 1.0 11.0 ns

CPD power

dissipation

capacitance

CL= 50 pF; fi = 1 MHz;

VI= GND to VCC

[3] -10- - - - -pF

Product data sheet Rev. 03 — 12 November 2007 8 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).

[2] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[3] CPD is used to determine the dynamic power dissipation PD(µW).

PD=C

PD ×VCC2×fi+∑(CL×VCC2×fo) where:

fi= input frequency in MHz;

fo= output frequency in MHz;

CL= output load capacitance in pF;

VCC = supply voltage in Volts.

For type 74AHCT541

tpd propagation

delay An to Yn; see Figure 5 [2]

VCC = 4.5 V to 5.5 V

CL= 15 pF - 3.5 5.5 1.0 6.5 1.0 7.0 ns

CL= 50 pF - 5.0 8.5 1.0 9.5 1.0 11.0 ns

ten enable time OEn to Yn; see Figure 6

VCC = 4.5 V to 5.5 V

CL= 15 pF - 4.0 7.0 1.0 8.0 1.0 9.0 ns

CL= 50 pF - 5.5 10.0 1.0 12.0 1.0 12.5 ns

tdis disable time OEn to Yn; see Figure 6 [2]

VCC = 4.5 V to 5.5 V

CL= 15 pF - 5.0 7.0 1.0 8.0 1.0 9.0 ns

CL= 50 pF - 7.0 10.0 1.0 12.0 1.0 12.5 ns

CPD power

dissipation

capacitance

per buffer;

CL=50pF;f=1 MHz;

VI= GND to VCC

[3] -12- - - - -pF

Table 7. Dynamic characteristics

…continued

GND = 0 V. For test circuit see Figure 7.

Symbol Parameter Conditions 25 °C−40 °C to +85 °C−40 °C to +125 °C Unit

Min Typ[1] Max Min Max Min Max

Product data sheet Rev. 03 — 12 November 2007 9 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

11. Waveforms

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 5. Propagation delay input (An) to output (Yn)

mna901

An input

Yn output

tPHL tPLH

GND

VOH

VOL

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 6. Enable and disable times

mna902

tPLZ

tPHZ

outputs

disabled outputs

enabled

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

OEn input

VOL

VOH

VCC

GND

tPZL

tPZH

Table 8. Measurement points

Type Input Output

VMVMVXVY

74AHC541 0.5VCC 0.5VCC VOL + 0.3 V VOH − 0.3 V

74AHCT541 1.5 V 0.5VCC VOL + 0.3 V VOH − 0.3 V

Product data sheet Rev. 03 — 12 November 2007 10 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

Test data is given in Table 9.

Deﬁnitions test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator

CL = Load capacitance including jig and probe capacitance

RL = Load resistor

S1 = Test selection switch

Fig 7. Load circuitry for switching times

VMVM

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

VMVM

90 %

10 %

001aad983

DUT

VCC VCC

VIVO

RLS1

open

PULSE

GENERATOR

Table 9. Test data

Type Input Load S1 position

VItr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ

74AHC541 VCC 3.0 ns 15 pF, 50 pF 1 kΩopen GND VCC

74AHCT541 3.0 V 3.0 ns 15 pF, 50 pF 1 kΩopen GND VCC

Product data sheet Rev. 03 — 12 November 2007 11 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

12. Package outline

Fig 8. Package outline SOT163-1 (SO20)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZ

ywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

2.65 0.3

0.1 2.45

2.25 0.49

0.36 0.32

0.23 13.0

12.6 7.6

7.4 1.27 10.65

10.00 1.1

1.0 0.9

0.4 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.1

0.4

SOT163-1

detail X

0.25

075E04 MS-013

pin 1 index

0.1 0.012

0.004 0.096

0.089 0.019

0.014 0.013

0.009 0.51

0.49 0.30

0.29 0.05

1.4

0.055

0.419

0.394 0.043

0.039 0.035

0.016

0.01

0.25

0.01 0.004

0.043

0.016

0.01

0 5 10 mm

scale

vMA

(A )

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

99-12-27

03-02-19

Product data sheet Rev. 03 — 12 November 2007 12 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

Fig 9. Package outline SOT360-1 (TSSOP20)

UNIT A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.30

0.19 0.2

0.1 6.6

6.4 4.5

4.3 0.65 6.6

6.2 0.4

0.3 0.5

0.2 8

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT360-1 MO-153 99-12-27

03-02-19

0.25

110

20 11

pin 1 index

detail X

(A )

vMA

0 2.5 5 mm

scale

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1

max.

1.1

Product data sheet Rev. 03 — 12 November 2007 13 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

Fig 10. Package outline SOT764-1 (DHVQFN20)

terminal 1

index area

0.51

A1Eh

UNIT ye

0.2

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 4.6

4.4

3.15

2.85

2.6

2.4 1.15

0.85

3.5

0.30

0.18

0.05

0.00 0.05 0.1

DIMENSIONS (mm are the original dimensions)

SOT764-1 MO-241 - - -- - -

0.5

0.3

0.1

0.05

0 2.5 5 mm

scale

SOT764-1

DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

20 terminals; body 2.5 x 4.5 x 0.85 mm

A(1)

max.

AA1c

detail X

y1C

19 12

terminal 1

index area

E(1)

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

D(1)

02-10-17

03-01-27

Product data sheet Rev. 03 — 12 November 2007 14 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

13. Abbreviations

14. Revision history

Table 10. Abbreviations

Acronym Description

CDM Charged Device Model

CMOS Complementary Metal Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

TTL Transistor-Transistor Logic

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74AHC_AHCT541_3 20071112 Product data sheet 74AHC_AHCT541_2

Modiﬁcations: •The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

•Legal texts have been adapted to the new company name where appropriate.

•Section 3: DHVQFN20 package added.

•Section 8: derating values added for DHVQFN20 package.

•Section 12: outline drawing added for DHVQFN20 package.

74AHC_AHCT541_2

(939775006301) 19991124 Product speciﬁcation 74AHC_AHCT541_1

74AHC_AHCT541_1

(939775004256) 19980921 Product speciﬁcation -

Product data sheet Rev. 03 — 12 November 2007 15 of 16

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

15. Legal information

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Deﬁnitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

15.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

15.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

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authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

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grant, conveyance or implication of any license under any copyrights, patents

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Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

16. Contact information

For additional information, please visit: http://www.nxp.com

For sales ofﬁce addresses, send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Deﬁnition

Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.

Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.

Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors 74AHC541; 74AHCT541

Octal buffer/line driver; 3-state

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 12 November 2007

Document identifier: 74AHC_AHCT541_3

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

17. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Functional description . . . . . . . . . . . . . . . . . . . 4

7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Recommended operating conditions. . . . . . . . 5

9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7

11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11

13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14

14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14

15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15

15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15

15.2 Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15

15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15

16 Contact information. . . . . . . . . . . . . . . . . . . . . 15

17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16