1
LTC1872B
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATION
U
Constant Frequency
Current Mode Step-Up
DC/DC Controller in ThinSOT
The LTC
®
1872B is a constant frequency current mode
step-up DC/DC controller providing excellent AC and DC
load and line regulation. The device incorporates an accu-
rate undervoltage lockout feature that shuts down the
LTC1872B when the input voltage falls below 2.0V.
The LTC1872B provides a ±2.5% output voltage accuracy
and consumes only 270µA of quiescent current. In shut-
down, the device draws a mere 8µA.
High constant operating frequency of 550kHz allows the
use of a small external inductor. The constant frequency
operation is maintained down to very light loads, resulting
in less low frequency noise generation over a wide load
current range.
The LTC1872B is available in a 6-lead low profile (1mm)
ThinSOT package. For a Burst Mode operation enabled
version of the LTC1872B, please refer to the LTC1872 data
sheet.
Optical Communications
Lithium-Ion-Powered Applications
Cellular Telephones
Wireless Devices
Portable Computers
Scanners
Burst Mode
TM
Operation Disabled for Lower Output
Ripple at Light Loads
High Efficiency: Over 90%
High Output Currents Easily Achieved
Wide V
IN
Range: 2.5V to 9.8V
V
OUT
Limited Only by External Components
Constant Frequency 550kHz Operation
Current Mode Operation for Excellent Line and Load
Transient Response
Shutdown Mode Draws Only 8µA Supply Current
Low Profile (1mm) ThinSOT
TM
Package
Typical Efficiency vs Load Current*
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode and ThinSOT are trademarks of Linear Technology Corporation.
I
TH
/RUN
LTC1872B
147k
422k
80.6k
R1
0.03
L1
4.7µH
220pF
C1: TAIYO YUDEN CERAMIC EMK325BJ106MNT
C2: MURATA GRM42-2X5R106K010AL
D1: IR10BQ015
L1: MURATA LQN6C4R7M04
M1: Si2302DS
R1: DALE 0.25W
GND
V
FB
5
4
6
1872B TA01
1
2
3NGATE
V
IN
SENSE
C1
10µF
10V
V
IN
3.3V
V
OUT
5V
1A
C2
4× 10µF
10V
M1 D1
Figure 1. LTC1872B High Output Current 3.3V to 5V Boost Converter
1 10 100 1000
LOAD CURRENT (mA)
EFFICIENCY (%)
100
95
90
85
80
75
70
65
1872B TA01b
VIN = 3.3V
VOUT = 5V
*Output ripple waveforms for the circuit of Figure 1 appear in Figure 2.
2
LTC1872B
ABSOLUTE MAXIMUM RATINGS
W
WW
U
(Note 1)
Input Supply Voltage (V
IN
).........................0.3V to 10V
SENSE
, NGATE Voltages ............ 0.3V to (V
IN
+ 0.3V)
V
FB
, I
TH
/RUN Voltages ..............................0.3V to 2.4V
NGATE Peak Output Current (<10µs) ....................... 1A
Storage Ambient Temperature Range ... 65°C to 150°C
Operating Temperature Range (Note 2) .. 40°C to 85°C
Junction Temperature (Note 3).............................150°C
Lead Temperature (Soldering, 10 sec)..................300°C
PACKAGE/ORDER INFORMATION
W
UU
T
JMAX
= 150°C, θ
JA
= 230°C/W
S6 PART MARKING
ORDER PART
NUMBER
LTC1872BES6
LTXY
Consult LTC marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified. (Note 2)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input DC Supply Current Typicals at V
IN
= 4.2V (Note 4)
Normal Operation 2.4V V
IN
9.8V 270 420 µA
Sleep Mode 2.4V V
IN
9.8V 230 370 µA
Shutdown 2.4V V
IN
9.8V, V
ITH
/RUN = 0V 8 22 µA
UVLO V
IN
< UVLO Threshold 6 10 µA
Undervoltage Lockout Threshold V
IN
Falling 1.55 2.00 2.35 V
V
IN
Rising 1.85 2.10 2.40 V
Shutdown Threshold (at I
TH
/RUN) 0.15 0.35 0.55 V
Start-Up Current Source V
ITH
/RUN = 0V 0.25 0.5 0.85 µA
Regulated Feedback Voltage 0°C to 70°C(Note 5) 0.780 0.800 0.820 V
–40°C to 85°C(Note 5) 0.770 0.800 0.830 V
V
FB
Input Current (Note 5) 10 50 nA
Oscillator Frequency V
FB
= 0.8V 500 550 650 kHz
Gate Drive Rise Time C
LOAD
= 3000pF 40 ns
Gate Drive Fall Time C
LOAD
= 3000pF 40 ns
Peak Current Sense Voltage (Note 6) 114 120 mV
I
TH
/RUN 1
GND 2
V
FB
3
6 NGATE
5 V
IN
4 SENSE
TOP VIEW
S6 PACKAGE
6-LEAD PLASTIC SOT-23
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC1872BE is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
θ
JA
°C/W)
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: The LTC1872B is tested in a feedback loop that servos V
FB
to the
output of the error amplifier.
Note 6: Guaranteed by design at duty cycle = 30%. Peak current sense
voltage is V
REF
/6.67 at duty cycle <40%, and decreases as duty cycle
increases due to slope compensation as shown in Figure 3.
3
LTC1872B
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Reference Voltage
vs Temperature Undervoltage Lockout Trip
Voltage vs Temperature
Shutdown Threshold
vs Temperature
Maximum Current Sense Trip
Voltage vs Duty Cycle
Normalized Oscillator Frequency
vs Temperature
PIN FUNCTIONS
UUU
I
TH
/RUN (Pin 1): This pin performs two functions. It
serves as the error amplifier compensation point as well as
the run control input. Nominal voltage range for this pin is
0.7V to 1.9V. Forcing this pin below 0.35V causes the
device to be shut down. In shutdown all functions are
disabled and the NGATE pin is held low.
GND (Pin 2): Ground Pin.
V
FB
(Pin 3): Receives the feedback voltage from an exter-
nal resistive divider across the output.
SENSE
(Pin 4): The Negative Input to the Current Com-
parator.
V
IN
(Pin 5): Supply Pin. Must be closely decoupled to GND
Pin 2.
NGATE (Pin 6): Gate Drive for the External N-Channel
MOSFET. This pin swings from 0V to V
IN
.
TEMPERATURE (°C)
–55
775
V
FB
VOLTAGE (mV)
780
790
795
800
825
810
–15 25 45 125
1872B G01
785
815
820
805
–35 5 65 85 105
V
IN
= 4.2V
TEMPERATURE (°C)
–55
–10
NORMALIZED FREQUENCY (%)
–8
–4
–2
0
10
4
–15 25 45 125
1872B G02
–6
6
8
2
–35 5 65 85 105
V
IN
= 4.2V
TEMPERATURE (°C)
–55
1.84
UVLO TRIP VOLTAGE (V)
1.88
1.96
2.00
2.04
2.24
2.12
–15 25 45 125
1872B G03
1.92
2.16
2.20
2.08
–35 5 65 85 105
V
IN
FALLING
DUTY CYCLE (%)
20 30
V
IN
– V
SENSE
– (mV)
100
187B2 G04
40 50 60 70 80 90
130
120
110
100
90
80
70
60
50
V
IN
= 4.2V
T
A
= 25°C
TEMPERATURE (°C)
–55
200
I
TH
/RUN VOLTAGE (mV)
240
320
360
400
600
480
–15 25 45 125
1872B G05
280
520
560
440
–35 5 65 85 105
V
IN
= 4.2V
4
LTC1872B
FUNCTIONAL DIAGRA
UU
W
OPERATIO
U
(Refer to Functional Diagram)
Main Control Loop
The LTC1872B is a constant frequency current mode
switching regulator. During normal operation, the external
N-channel power MOSFET is turned on each cycle by the
oscillator and turned off when the current comparator
(ICMP) resets the RS latch. The peak inductor current at
which ICMP resets the RS latch is controlled by the voltage
on the I
TH
/RUN pin, which is the output of the error
amplifier EAMP. An external resistive divider connected
between V
OUT
and ground allows the EAMP to receive an
output feedback voltage V
FB
. When the load current in-
creases, it causes a slight decrease in V
FB
relative to the
0.8V reference, which in turn causes the
I
TH
/RUN voltage to increase until the average inductor
current matches the new load current.
The main control loop is shut down by pulling the ITH/RUN
pin low. Releasing ITH/RUN allows an internal 0.5µA
current source to charge up the external compensation
network. When the ITH/RUN pin reaches 0.35V, the main
control loop is enabled with the ITH/RUN voltage then
pulled up to its zero current level of approximately 0.7V.
As the external compensation network continues to charge
up, the corre
sponding output current trip level follows,
allowing normal operation.
Comparator OVP guards against transient overshoots
>7.5% by turning off the external N-channel power
MOSFET and keeping it off until the fault is removed.
Low Load Current Operation
Under very light load current conditions, the I
TH
/RUN pin
voltage will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current)
and the regulator will start to skip cycles, as it must, in
order to maintain regulation. This behavior allows the
regulator to maintain constant frequency down to very
light loads, resulting in less low frequency noise genera-
tion over a wide load current range.
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
+
+
0.5µA
0.3V
OVP
SHDN
1.2V
UV
1872B FD
VREF
+
60mV
VREF
0.8V
VIN
RS
VOLTAGE
REFERENCE
SLOPE
COMP
ICMP
R
S
Q
FREQ
FOLDBACK
OSC
15mV
SENSE
VIN
5
2
4
+
4
EAMP
VFB
+
3
NGATE
VIN
6
ITH/RUN
VIN
0.35V
VREF
0.8V
1
+
SHDN
CMP
GND
+
UNDERVOLTAGE
LOCKOUT
5
LTC1872B
OPERATIO
U
(Refer to Functional Diagram)
Figure 2 illustrates this result for the circuit of Figure 1
using both an LTC1872 in Burst Mode operation and an
LTC1872B (non-Burst Mode operation). At an output
current of 50mA, the Burst Mode operation part exhibits
an output ripple of approximately 80mV
P-P
, whereas the
non-Burst Mode operation part has an output ripple of
45mV
P-P
. At lower output current levels, the improve-
ment is even greater. This comes at a trade off of slightly
lower efficiency for the non-Burst Mode operation part.
Also notice the constant frequency operation of the
LTC1872B, even at 5% of maximum output current.
Undervoltage Lockout
To prevent operation of the N-channel MOSFET below safe
input voltage levels, an undervoltage lockout is incorpo-
rated into the LTC1872B. When the input supply voltage
drops below approximately 2.0V, the N-channel MOSFET
and all circuitry is turned off except the undervoltage
block, which draws only several microamperes.
Overvoltage Protection
The overvoltage comparator in the LTC1872B will turn the
external MOSFET off when the feedback voltage has risen
7.5% above the reference voltage of 0.8V. This compara-
tor has a typical hysteresis of 20mV.
Slope Compensation and Inductor’s Peak Current
The inductor’s peak current is determined by:
IV
R
PK ITH
SENSE
=
()
07
10
.
when the LTC1872B is operating below 40% duty cycle.
However, once the duty cycle exceeds 40%, slope com-
pensation begins and effectively reduces the peak induc-
tor current. The amount of reduction is given by the curves
in Figure 3.
Figure 2. Output Ripple Waveforms for the Circuit of Figure 1
V
IN
= 3.3V 5µs/DIV 1872B F02a
V
OUT
= 5V
I
OUT
= 50mA
20mV AC/DIV
V
IN
= 3.3V 5µs/DIV 1872B F02b
V
OUT
= 5V
I
OUT
= 50mA
20mV AC/DIV
Figure 3. Maximum Output Current vs Duty Cycle
DUTY CYCLE (%)
110
100
90
80
70
60
50
40
30
20
10
SF = I
OUT
/I
OUT(MAX)
(%)
1872B F03
0 70 80 90 1006010 20 30 40 50
I
RIPPLE
= 0.4I
PK
AT 5% DUTY CYCLE
I
RIPPLE
= 0.2I
PK
AT 5% DUTY CYCLE
V
IN
= 4.2V
(2a) VOUT Ripple for Figure 1 Circuit
Using LTC1872 Burst Mode Operation (2b) VOUT Ripple for Figure 1 Circuit Using
LTC1872B Non-Burst Mode Operation
6
LTC1872B
The basic LTC1872B application circuit is shown in
Figure␣ 1. External component selection is driven by the
load requirement and begins with the selection of L1 and
R
SENSE
(= R1). Next, the power MOSFET and the output
diode D1 is selected followed by C
IN
(= C1) and C
OUT
(= C2).
R
SENSE
Selection for Output Current
R
SENSE
is chosen based on the required output current.
With the current comparator monitoring the voltage devel-
oped across R
SENSE
, the threshold of the comparator
determines the inductor’s peak current. The output cur-
rent the LTC1872B can provide is given by:
IR
IV
VV
OUT SENSE
RIPPLE IN
OUT D
=−
+
012
2
.
where I
RIPPLE
is the inductor peak-to-peak ripple current
(see Inductor Value Calculation section) and V
D
is the
forward drop of the output diode at the full rated output
current.
A reasonable starting point for setting ripple current is:
IOI
VV
V
RIPPLE OUT OUT D
IN
=
()( )
+
.4
Rearranging the above equation, it becomes:
RIVV
SENSE OUT OUT D
=
()( )
+
1
10
V
for Duty Cycle < 40%
IN
However, for operation that is above 40% duty cycle, slope
compensation’s effect has to be taken into consideration
to select the appropriate value to provide the required
amount of current. Using the scaling factor (SF, in %) in
Figure 3, the value of R
SENSE
is:
RSF
I
V
VV
SENSE OUT
IN
OUT D
=
()( )( )
+
10 100
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies permit the use
of a smaller inductor for the same amount of inductor
ripple current. However, this is at the expense of efficiency
due to an increase in MOSFET gate charge losses.
The inductance value also has a direct effect on ripple
current. The ripple current, I
RIPPLE
, decreases with higher
inductance or frequency and increases with higher V
OUT
.
The inductor’s peak-to-peak ripple current is given by:
IV
fL
VVV
VV
RIPPLE IN OUT D IN
OUT D
=
()
+−
+
where f is the operating frequency. Accepting larger values
of I
RIPPLE
allows the use of low inductances, but results in
higher output voltage ripple and greater core losses. A
reasonable starting point for setting ripple current is:
II
VV
V
RIPPLE OUT MAX OUT D
IN
=
()
+
()
04.
In Burst Mode operation, the ripple current is normally set
such that the inductor current is continuous during the
burst periods. Therefore, the peak-to-peak ripple current
must not exceed:
IR
RIPPLE SENSE
003.
Short-Circuit Protection
Since the power switch in a boost converter is not in series
with the power path from input to load, turning off the
switch provides no protection from a short-circuit at the
output. External means such as a fuse in series with the
boost inductor must be employed to handle this fault
condition.
OPERATIO
U
(Refer to Functional Diagram)
APPLICATIONS INFORMATION
WUUU
7
LTC1872B
APPLICATIONS INFORMATION
WUUU
This implies a minimum inductance of:
LV
fR
VVV
VV
MIN IN
SENSE
OUT D IN
OUT D
=
+−
+
003.
A smaller value than L
MIN
could be used in the circuit;
however, the inductor current will not be continuous
during burst periods.
Inductor Selection
When selecting the inductor, keep in mind that inductor
saturation current has to be greater than the current limit
set by the current sense resistor. Also, keep in mind that
the DC resistance of the inductor will affect the efficiency.
Off the shelf inductors are available from Murata, Coilcraft,
Toko, Panasonic, Coiltronics and many other suppliers.
Power MOSFET Selection
The main selection criteria for the power MOSFET are the
threshold voltage V
GS(TH)
, the “on” resistance R
DS(ON)
,
reverse transfer capacitance C
RSS
and total gate charge.
Since the LTC1872B is designed for operation down to low
input voltages, a logic level threshold MOSFET (R
DS(ON)
guaranteed at V
GS
= 2.5V) is required for applications that
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the LTC1872B is less
than the absolute maximum V
GS
rating, typically 8V.
The required minimum R
DS(ON)
of the MOSFET is gov-
erned by its allowable power dissipation given by:
RP
DC I p
DS ON P
IN
()
()
+
()
2
1δ
where P
P
is the allowable power dissipation and δp is the
temperature dependency of R
DS(ON)
. (1 + δp) is generally
given for a MOSFET in the form of a normalized R
DS(ON)
vs
temperature curve, but δp = 0.005/°C can be used as an
approximation for low voltage MOSFETs. DC is the maxi-
mum operating duty cycle of the LTC1872B.
Output Diode Selection
Under normal load conditions, the average current con-
ducted by the diode in a boost converter is equal to the
output load current:
II
D avg OUT()
=
It is important to adequately specify the diode peak current
and average power dissipation so as not to exceed the
diode ratings.
Schottky diodes are recommended for low forward drop
and fast switching times. Remember to keep lead length
short and observe proper grounding (see Board Layout
Checklist) to avoid ringing and increased dissipation.
C
IN
and C
OUT
Selection
To prevent large input voltage ripple, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current for a boost
converter is approximately equal to:
CI
IN RIPPLE
Required I
RMS
()
03.
where I
RIPPLE
is as defined in the Inductor Value Calcula-
tion section.
Note that capacitor manufacturer’s ripple current ratings
are often based on 2000 hours of life. This makes it
advisable to further derate the capacitor, or to choose a
capacitor rated at a higher temperature than required.
Several capacitors may be paralleled to meet the size or
height requirements in the design. Due to the high operat-
ing frequency of the LTC1872B, ceramic capacitors can
also be used for C
IN
. Always consult the manufacturer if
there is any question.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisfied, the capacitance is adequate for filtering.
The output ripple (V
OUT
) is approximated by:
8
LTC1872B
Figure 5. Setting Output Voltage
3
V
FB
V
OUT
LTC1872B
R1
1872B F05
R2
APPLICATIONS INFORMATION
WUUU
amount of change as the supply is reduced down to 2V.
Also shown in Figure 4 is the effect of V
IN
on V
REF
as V
IN
goes below 2.3V.
Setting Output Voltage
The LTC1872B develops a 0.8V reference voltage between
the feedback (Pin 3) terminal and ground (see Figure 5). By
selecting resistor R1, a constant current is caused to flow
through R1 and R2 to set the overall output voltage. The
regulated output voltage is determined by:
VV
R
R
OUT =+
08 1 2
1
.
For most applications, an 80k resistor is suggested for R1.
To prevent stray pickup, locate resistors R1 and R2 close
to LTC1872B.
VI
VV
V
I
ESR fC
OUT O OUT D
IN
RIPPLE
OUT
ť ++
+
2
1
2
2
21
2
π
where f is the operating frequency, C
OUT
is the output
capacitance and I
RIPPLE
is the ripple current in the induc-
tor.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance through-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR (size)
product of any aluminum electrolytic at a somewhat
higher price. The output capacitor RMS current is approxi-
mately equal to:
IDCDC
PK
•−
2
where I
PK
is the peak inductor current and DC is the switch
duty cycle.
When using electrolytic output capacitors, if the ripple and
ESR requirements are met, there is likely to be far more
capacitance than required.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum elec-
trolytic and dry tantalum capacitors are both available in
surface mount configurations. An excellent choice of
tantalum capacitors is the AVX TPS and KEMET T510
series of surface mount tantalum capacitors. Also,
ceramic capacitors in X5R pr X7R dielectrics offer excel-
lent performance.
Low Supply Operation
Although the LTC1872B can function down to approxi-
mately 2.0V, the maximum allowable output current is
reduced when V
IN
decreases below 3V. Figure 4 shows the
Figure 4. Line Regulation of VREF and VITH
INPUT VOLTAGE (V)
2.0
NORMALIZED VOLTAGE (%)
105
100
95
90
85
80
75 2.2 2.4 2.6 2.8
1872B F04
3.0
V
REF
V
ITH
9
LTC1872B
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (η1 + η2 + η3 + ...)
where η1, η2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1872B circuits: 1) LTC1872B DC bias cur-
rent, 2) MOSFET gate charge current, 3) I
2
R losses and 4)
voltage drop of the output diode.
1. The V
IN
current is the DC supply current, given in the
electrical characteristics, that excludes MOSFET driver
and control currents. V
IN
current results in a small loss
which increases with V
IN
.
2. MOSFET gate charge current results from switching
the gate capacitance of the power MOSFET. Each time
a MOSFET gate is switched from low to high to low
again, a packet of charge, dQ, moves from V
IN
to
ground. The resulting dQ/dt is a current out of V
IN
which is typically much larger than the contoller’s DC
supply current. In continuous mode, I
GATECHG
= f(Qp).
3. I
2
R losses are predicted from the DC resistances of the
MOSFET, inductor and current sense resistor. The
MOSFET R
DS(ON)
multiplied by duty cycle times the
average output current squared can be summed with
I
2
R losses in the inductor ESR in series with the current
sense resistor.
4. The output diode is a major source of power loss at
high currents. The diode loss is calculated by multiply-
ing the forward voltage by the load current.
APPLICATIONS INFORMATION
WUUU
5. Transition losses apply to the external MOSFET and
increase at higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(V
IN
)
2
I
IN(MAX)
C
RSS
(f)
Other losses, including C
IN
and C
OUT
ESR dissipative
losses, and inductor core losses, generally account for
less than 2% total additional loss.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1872B. These items are illustrated graphically in the
layout diagram in Figure 6. Check the following in your
layout:
1. The Schottky diode should be closely connected
between the output capacitor and the drain of the
external MOSFET.
2. The (+) plate of C
IN
should connect to the sense
resistor as closely as possible. This capacitor provides
AC current to the inductor.
3. The input decoupling capacitor (0.1µF) should be
connected closely between V
IN
(Pin 5) and ground
(Pin 2).
4. Connect the end of R
SENSE
as close to V
IN
(Pin 5) as
possible. The V
IN
pin is the SENSE
+
of the current
comparator.
5. The trace from SENSE
(Pin 4) to the Sense resistor
should be kept short. The trace should connect close
to R
SENSE
.
6. Keep the switching node NGATE away from sensitive
small signal nodes.
7. The V
FB
pin should connect directly to the feedback
resistors. The resistive divider R1 and R2 must be
connected between the (+) plate of C
OUT
and signal
ground.
10
LTC1872B
LTC1872B 3-Cell White LED Driver
I
TH
/RUN
LTC1872B
10k
R1
0.27
53.6
L1
150µH
220pF
C1: TAIYO YUDEN CERAMIC EMK325BJ106MNT
C2: AVX TPSD156M035R0300
D0: MOTOROLA MBR0540
D1-D7: CMD333UWC
GND
V
FB
5
4
6
1872B TA04
1
2
3NGATE
V
IN
SENSE
C1
10µF
10V
V
OUT
28.8V
(WITH 8 LEDs)
C2
15µF
35V
+
C3
0.1µF
CERAMIC
M1 D0
1 TO 8
WHITE
LEDs
15mA
D1
D2
D8
AA
AA
AA
V
IN
= 3 AA CELLS 2.7V TO 4.8V
L1: COILCRAFT DO1608C-154
M1: Si9804
R1: DALE 0.25W
APPLICATIONS INFORMATION
WUUU
Figure 6. LTC1872B Layout Diagram (See PC Board Layout Checklist)
L1 M1
BOLD LINES INDICATE HIGH CURRENT PATHS
D1
R
S
V
OUT
V
IN
1872B F06
0.1µF
C
ITH
R
ITH
R2
R1
C
IN
+
I
TH
/RUN
LTC1872B
GND
V
FB
6
5
4
1
2
3
NGATE
V
IN
SENSE
C
OUT
+
TYPICAL APPLICATIO S
U
11
LTC1872B
LTC1872B 12V/500mA Boost Converter
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
I
TH
/RUN
LTC1872B
10k
R1
0.033
1.1M
78.7k
L1
10µH
220pF
C1: TAIYO YUDEN CERAMIC EMK325BJ106MNT
C2: AVX TPSE476M016R0150
D1: IR10BQ015
L1: COILTRONICS UP2B-100
M1: Si9804DV
R1: DALE 0.25W
GND
V
FB
5
4
6
1872B TA02
1
2
3NGATE
V
IN
SENSE
C1
10µF
10V
V
IN
3V TO 9.8V
V
OUT
12V
C2
47µF
16V
+
M1 D1
TYPICAL APPLICATIO S
U
PACKAGE DESCRIPTION
U
S6 Package
6-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1634)
(Reference LTC DWG # 05-08-1636)
1.50 – 1.75
(.059 – .069)
(NOTE 3)
2.60 – 3.00
(.102 – .118)
.25 – .50
(.010 – .020)
(6PLCS, NOTE 2)
L
DATUM ‘A’
.09 – .20
(.004 – .008)
(NOTE 2)
A1
S6 SOT-23 0401
2.80 – 3.10
(.110 – .118)
(NOTE 3)
.95
(.037)
REF
AA2
1.90
(.074)
REF
.20
(.008)
.90 – 1.45
(.035 – .057)
.00 – 0.15
(.00 – .006)
.90 – 1.30
(.035 – .051)
.35 – .55
(.014 – .021)
1.00 MAX
(.039 MAX)
A
A1
A2
L
.01 – .10
(.0004 – .004)
.80 – .90
(.031 – .035)
.30 – .50 REF
(.012 – .019 REF)
PIN ONE ID
MILLIMETERS
(INCHES)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
4. DIMENSIONS ARE INCLUSIVE OF PLATING
5. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
6. MOLD FLASH SHALL NOT EXCEED .254mm
7. PACKAGE EIAJ REFERENCE IS:
SC-74A (EIAJ) FOR ORIGINAL
JEDEL MO-193 FOR THIN
SOT-23
(Original) SOT-23
(ThinSOT)
12
LTC1872B
1872bf LT/TP 0601 2K • PRINTED IN USA
PART NUMBER DESCRIPTION COMMENTS
LT1304 Micropower DC/DC Converter with Low-Battery Detector 120µA Quiescent Current, 1.5V V
IN
8V
LT1610 1.7MHz, Single Cell Micropower DC/DC Converter 30µA Quiescent Current, V
IN
Down to 1V
LT1613 1.4MHz, Single Cell DC/DC Converter in 5-Lead ThinSOT Internally Compensated, V
IN
Down to 1V
LT1619 Low Voltage Current Mode PWM Controller 8-Lead MSOP Package, 1.9V V
IN
18V
LT1680 High Power DC/DC Step-Up Controller Operation Up to 60V, Fixed Frequency Current Mode
LTC1624 High Efficiency SO-8 N-Channel Switching Regulator Controller 8-Pin N-Channel Drive, 3.5V V
IN
36V
LT1615 Micropower Step-Up DC/DC Converter in ThinSOT 20µA Quiescent Current, V
IN
Down to 1V
LTC1700 No R
SENSE
Synchronous Current Mode DC/DC Step-Up Controller 95% Efficient, 0.9V V
IN
5V, 550kHz Operation
LTC1772 Constant Frequency Current Mode Step-Down DC/DC Controller V
IN
2.5V to 9.8V, I
OUT
up to 4A, ThinSOT Package
LTC1872 Constant Frequency Current Mode Step-Up DC/DC Controller in ThinSOT With Burst Mode Operation for Higher Efficiency at Light
Load Current
LTC3401/LTC3402 1A/2A, 3MHz Micropower Synchronous Boost Converter 10-Lead MSOP Package, 0.5V V
IN
5V
LINEAR TECHNOLOGY CORPORATION 2001
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear-tech.com
RELATED PARTS
LTC1872B –2.5V to 3.3V/0.5A Boost Converter
ITH/RUN
LTC1872B
RC1
10k
RCS
0.03
L1A L1B
CC1
220pF
GND
VFB
5
4
6
1872B TA05
1
2
3NGATE
VIN
SENSE
CIN
10µF
10V, X5R
VIN
2.7V TO 9.8V
VOUT
3.3V/1.2A
CO1
180µF
4V, SP
+
M1
CS
4.7µF
10V
D1
MBRM120
Rf1
252k
Rf2
80.6k
FOR VOUT = 5V CHANGE
Rf1 TO 427k AND
CO1 TO 150µF, 6V PANASONIC
SP TYPE CAPACITOR
CIN, CS; TOKO, MURATA OR TAIYO YUDEN
CO1: PANASONIC EEFUE0G181R
L1: BH ELECTRONICS 511-1012
M1: IRLMS2002
RCS: DALE OR IRC
I
TH
/RUN
LTC1872B
10k
R1
0.034
332k
U1
80.6k 180k
L1
4.7µH
220pF
0.1µF
CERAMIC
C1, C2: AVX TPSE107M010R0100
D1: MOTOROLA MBR2045CT
L1: COILTRONICS UP2B-4R7
M1: Si9804DV
R1: DALE 0.25W
U1: PANASONIC 2SB709A
GND
V
FB
5
4
6
1872B TA03
1
2
3NGATE
V
IN
SENSE
C2
2× 100µF
10V
V
IN
2.5V
V
OUT
3.3V
0.5A
M1 D1
+
C1
100µF
10V
+
LTC1872B 2.7V to 9.8V Input to 3.3V/1.2A Output SEPIC Converter
TYPICAL APPLICATIO S
U