74VHCT245AFT CMOS Digital Integrated Circuits Silicon Monolithic 74VHCT245AFT 1. Functional Description * Octal Bus Transceiver 2. General The 74VHCT245AFT is an advanced high speed CMOS OCTAL BUS TRANSCEIVER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It is intended for two-way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input (G) can be used to disable the device so that the busses are effectively isolated. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 V to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, etc. Note: Output in off-state 3. Features (Note) (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature : Topr = -40 to 125 (3) High speed: Propagation delay time = 4.9 ns (typ.) at VCC = 5.0 V (4) Quiescent supply current: ICC = 4.0 A (max) at Ta = 25 (5) Compatible with TTL inputs: VIL = 0.8 V (max) VIH = 2.0 V (min) (6) Power-down protection is provided on all inputs and outputs (7) Balanced propagation delays: tPLH tPHL (8) Low noise: VOLP = 1.5 V (max) (9) Pin and function compatible with the 74 series (74ACT/HCT/AHCT etc.) 245 type. Note: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result. All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors. Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Start of commercial production (c)2017 Toshiba Corporation 1 2013-01 2017-02-22 Rev.5.0 74VHCT245AFT 4. Packaging TSSOP20B 5. Pin Assignment 6. Marking (c)2017 Toshiba Corporation 2 2017-02-22 Rev.5.0 74VHCT245AFT 7. IEC Logic Symbol 8. Truth Table Input G X: Z: Input DIR A BUS B BUS Output L L L H Output Input A=B Input Output B=A H X Z Z Z Don't care High impedance 9. Absolute Maximum Ratings (Note) Characteristics Symbol Note Rating Unit Supply voltage VCC -0.5 to 7.0 V Input voltage(DIR,G) VIN -0.5 to 7.0 V Bus I/O voltage VI/O (Note 1) -0.5 to 7.0 V (Note 2) -0.5 to VCC + 0.5 V -20 mA (Note 3) 20 mA Input diode current IIK Output diode current IOK Output current IOUT 25 mA VCC/ground current ICC 75 mA 180 mW -65 to 150 Power dissipation PD Storage temperature Tstg (Note 4) Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Output in off-state Note 2: High or low state. IOUT absolute maximum rating must be observed. Note 3: VOUT < GND, VOUT > VCC Note 4: 180 mW in the range of Ta = -40 to 85 . From Ta = 85 to 125 a derating factor of -3.25 mW/ shall be applied until 50 mW. (c)2017 Toshiba Corporation 3 2017-02-22 Rev.5.0 74VHCT245AFT 10. Operating Ranges (Note) Characteristics Symbol Note Rating Unit Supply voltage VCC 4.5 to 5.5 V Input voltage(DIR,G) VIN 0 to 5.5 V Bus I/O voltage VI/O (Note 1) 0 to 5.5 V (Note 2) 0 to VCC V Operating temperature Topr -40 to 125 Input rise and fall times dt/dv 0 to 20 ns/V Note: The operating ranges are required to ensure the normal operation of the device. Unused inputs and bus inputs must be tied to either VCC or GND. Please connect both bus inputs and the bus outputs with VCC or GND when the I/O of the bus terminal changes by the function. In this case, please note that the output is not short-circuited. Note 1: Output in off-state Note 2: High or low state 11. Electrical Characteristics 11.1. DC Characteristics (Unless otherwise specified, Ta = 25 ) Characteristics Symbol Test Condition VCC (V) Min Typ. Max Unit High-level input voltage VIH 4.5 to 5.5 2.0 V Low-level input voltage VIL 4.5 to 5.5 0.8 V High-level output voltage VOH VIN = VIH or VIL V Low-level output voltage 3-state output OFF-state leakage current VOL VIN = VIH or VIL IOH = -50 A 4.5 4.4 4.5 IOH = -8 mA 4.5 3.94 IOL = 50 A 4.5 0.0 0.1 IOL = 8 mA 4.5 0.36 V IOZ VIN = VIH or VIL VOUT = VCC or GND 5.5 0.25 A Input leakage current IIN VIN = 5.5 V or GND 0 to 5.5 0.1 A Quiescent supply current ICC VIN = VCC or GND 5.5 4.0 A Quiescent supply current ICCT Per input: VIN = 3.4 V , other input: VCC or GND 5.5 1.35 mA Output leakage current (Power-OFF) IOPD VOUT = 5.5 V 0 0.5 A 11.2. DC Characteristics (Unless otherwise specified, Ta = -40 to 85 ) Characteristics High-level input voltage Symbol Test Condition VIH Low-level input voltage VIL High-level output voltage VOH VIN = VIH or VIL Low-level output voltage VOL VIN = VIH or VIL 3-state output OFF-state leakage current IOZ VIN = VIH or VIL VOUT = VCC or GND Input leakage current IIN Quiescent supply current ICC Quiescent supply current Output leakage current (Power-OFF) VCC (V) Min Max Unit 4.5 to 5.5 2.0 V 4.5 to 5.5 0.8 V IOH = -50 A 4.5 4.4 V IOH = -8 mA 4.5 3.80 IOL = 50 A 4.5 0.1 IOL = 8 mA 4.5 0.44 5.5 2.50 A VIN = 5.5 V or GND 0 to 5.5 1.0 A VIN = VCC or GND 5.5 40.0 A ICCT Per input: VIN = 3.4 V, other input: VCC or GND 5.5 1.50 mA IOPD VOUT = 5.5 V 0 5.0 A (c)2017 Toshiba Corporation 4 V 2017-02-22 Rev.5.0 74VHCT245AFT 11.3. DC Characteristics (Unless otherwise specified, Ta = -40 to 125 ) Characteristics Symbol Test Condition VCC (V) Min Max Unit High-level input voltage VIH 4.5 to 5.5 2.0 V Low-level input voltage VIL 4.5 to 5.5 0.8 V High-level output voltage VOH V Low-level output voltage 3-state output OFF-state leakage current VOL VIN = VIH or VIL VIN = VIH or VIL IOH = -50 A 4.5 4.4 IOH = -8 mA 4.5 3.70 IOL = 50 A 4.5 0.1 IOL = 8 mA 4.5 0.55 10.0 A V IOZ VIN = VIH or VIL VOUT = VCC or GND 5.5 Input leakage current IIN VIN = 5.5 V or GND 0 to 5.5 2.0 A Quiescent supply current ICC VIN = VCC or GND 5.5 80.0 A Quiescent supply current ICCT Per input: VIN = 3.4 V Other input: VCC or GND 5.5 1.50 mA Output leakage current (Power-OFF) IOPD VOUT = 5.5 V 0 20.0 A (c)2017 Toshiba Corporation 5 2017-02-22 Rev.5.0 74VHCT245AFT 11.4. AC Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns) Characteristics Symbol Propagation delay time tPLH,tPHL 3-state output enable time 3-state output disable time Output skew Note tPZL,tPZH Test Condition VCC (V) CL (pF) Min Typ. Max Unit 5.0 0.5 15 4.9 7.7 ns 50 5.4 8.7 15 9.4 13.8 50 9.9 14.8 5.0 0.5 50 10.1 15.4 ns 5.0 0.5 50 1.0 ns RL = 1 k tPLZ,tPHZ 5.0 0.5 RL = 1 k tosLH,tosHL (Note 1) ns Input capacitance CIN DIR, G 4 10 pF Bus I/O capacitance CI/O An, Bn 13 pF Power dissipation capacitance CPD 16 pF (Note 2) Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|) Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per bit) 11.5. AC Characteristics (Unless otherwise specified, Ta = -40 to 85 , Input: tr = tf = 3 ns) Characteristics Symbol Note Test Condition VCC (V) CL (pF) Min Max Unit 5.0 0.5 15 1.0 8.5 ns 50 1.0 9.5 15 1.0 15.0 Propagation delay time tPLH,tPHL 3-state output enable time tPZL,tPZH RL = 1 k 5.0 0.5 50 1.0 16.0 3-state output disable time tPLZ,tPHZ RL = 1 k 5.0 0.5 50 1.0 16.5 5.0 0.5 50 1.0 ns 10 pF Output skew tosLH,tosHL (Note 1) Input capacitance CIN DIR, G ns ns Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|) 11.6. AC Characteristics (Unless otherwise specified, Ta = -40 to 125 , Input: tr = tf = 3 ns) Characteristics Symbol Note Test Condition VCC (V) CL (pF) Min Max Unit 5.0 0.5 15 1.0 10.0 ns 50 1.0 11.0 15 1.0 17.0 Propagation delay time tPLH,tPHL 3-state output enable time tPZL,tPZH RL = 1 k 5.0 0.5 50 1.0 17.5 3-state output disable time tPLZ,tPHZ RL = 1 k 5.0 0.5 50 1.0 18.0 5.0 0.5 50 1.0 ns 10 pF Output skew tosLH,tosHL (Note 1) Input capacitance CIN DIR, G ns ns Note 1: Parameter guaranteed by design. (tosLH = |tPLHm-tPLHn|, tosHL = |tPHLm-tPHLn|) 11.7. Noise Characteristics (Unless otherwise specified, Ta = 25 , Input: tr = tf = 3 ns) Characteristics Symbol Test Condition VCC (V) Typ. Limit Unit Quiet output maximum dynamic VOL VOLP CL = 50 pF 5.0 1.1 1.5 V Quiet output minimum dynamic VOL VOLV CL = 50 pF 5.0 -1.1 -1.5 V Minimum high-level dynamic input voltage VIHD CL = 50 pF 5.0 2.0 V Maximum low-level dynamic input voltage VILD CL = 50 pF 5.0 0.8 V (c)2017 Toshiba Corporation 6 2017-02-22 Rev.5.0 74VHCT245AFT Package Dimensions Unit: mm Weight: 0.071 g (typ.) Package Name(s) Nickname: TSSOP20B (c)2017 Toshiba Corporation 7 2017-02-22 Rev.5.0 74VHCT245AFT RESTRICTIONS ON PRODUCT USE * Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. * This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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