General Description
The MAX8811 2-phase gate driver controls power
MOSFETs in multiphase synchronous step-down con-
verter applications, providing up to 30A output current
per phase. The MAX8811 and MAX8810A (multiphase
power-supply controller) combine to provide an efficient,
low-cost solution for a wide range of multiphase power-
supply applications. The MAX8811 handles system input
voltages up to 26V. Each MOSFET driver is capable of
driving 3000pF capacitive loads with 11ns typical rise
and fall times.
Adaptive shoot-through protection circuitry is imple-
mented to prevent shoot-through currents for the “high-
side off to low-side on” transition. A programmable
delay is provided for the “low-side off to high-side on”
transition. This maximizes overall converter efficiency
while supporting operation with a variety of MOSFETs.
The MAX8811 provides an easy upgrade path from the
MAX8523 dual driver. Integrated bootstrap diodes
reduce external component count, while an enable
input provides flexibility for power sequencing. The
MAX8811 is available in a space-saving, 16-pin QSOP.
Applications
Processor Core Voltage Regulators
Multiphase Buck Converters
Voltage-Regulator Modules (VRMs)
Switching Power Supplies
DC-DC Converter Modules
Features
Dual-Phase Synchronous Buck Driver
Integrated Bootstrap Diodes
Up to 26V System Input Voltage
6A Peak Gate Drive Current
Capable of 30A per Phase
0.4Ω/0.9ΩLow-Side, 0.7Ω/1.0ΩHigh-Side
Drivers (typ)
Typical 11ns Rise/Fall Times with 3000pF Load
Adaptive Dead-Time Control
User-Programmable Delay Time
Enable Function with 0.04µA (typ) Quiescent
Current in Shutdown
Space-Saving, Lead-Free, 16-Pin QSOP
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
________________________________________________________________ Maxim Integrated Products 1
19-3974; Rev 1; 4/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
BST1 BST2
DH2
LX2
VL2
DL2
PGND2
PWM2
PWM1
TOP VIEW
MAX8811
QSOP
DH1
LX1
PGND1
VL1
DL1
EN
DLY
+
Pin Configuration
Ordering Information
DH1VL2 2
13
DLY
8
EN
7
PWM1
9
PWM2
10
VL1
4
1
3
5
6
DL1
LX1
BST1
OUTPUT
PGND1
MAX8811
DH2 15
16
14
12
11
DL2
LX2
BST2
PGND2
+
POWER INPUT
UP TO 26V
GATE-DRIVE SUPPLY
4.5V TO 7V
OFF
ON
PWM CONTROL
SIGNALS
Typical Operating Circuit
PART TEMP RANGE PIN-
PACKAGE
PKG
CODE
MAX8811EEE+ -40°C to +85°C 16 QSOP E16-4
+Denotes a lead-free package.
EVALUATION KIT
AVAILABLE
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DLY, EN, PWM_, DL_ to PGND_.................-0.3V to (VVL_+ 0.3V)
BST_ to PGND_ ............................................-0.3V to (VLX_ + 8V)
BST_ to VL_ ...............................................................-1V to +30V
LX_ to PGND_............................................................-1V to +28V
DH_ to PGND_.........................................-0.3V to (VBST_ + 0.3V)
DH_, BST_ to LX_ .....................................................-0.3V to +8V
VL_ to PGND_ ..........................................................-0.3V to +8V
DH_, DL_ Current ................................................. ±200mA RMS
VL_ to BST_ Internal Diode Current .........................±50mA RMS
PGND1 to PGND2 .................................................-0.3V to +0.3V
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.3 mW/°C above +70°C)......666.7 mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VDLY = VEN = VBST_ = VVL_ = 6.5V, VPGND_ = VLX_ = VPWM_ = 0V, TA= -40°C to +85°C, unless otherwise noted. Typical values are
at TA= +25°C.) (Note 1)
PARAMETER CONDITIONS MIN TYP MAX UNITS
GENERAL
VL_ Input Voltage Range 4.5 7 V
LX Operating Range 26 V
VL_ Undervoltage Lockout
(UVLO) VVL_ rising, 250mV hysteresis (typ) 3.25 3.8 V
VPWM__= 0V 0.7 1.5
Supply Current (per Channel)
IBST_ + IVL_ VPWM__ = VDLY = VVL_ 1.4 2 mA
Shutdown Supply Current
(per Channel) IBST_ + IVL_ VEN = 0V, VPWM_ = 0V or VVL_ 0.04 1 µA
PWM_
Input Leakage VPWM_ = 0V or 7.0V, VEN = 0V or 7.0V 0.01 µA
Input Voltage High Threshold 3.5 V
Input Voltage Low Threshold 1.2 V
Input Threshold Hysteresis 20 %
EN
Input Leakage VPWM_ = 0V or 7.0V, VEN = 0V or 7.0V 0.01 µA
Input Voltage High Threshold 2.6 V
Input Voltage Low Threshold 0.8 V
Input Voltage Hysteresis 0.5 V
DLY
Delay Disable Threshold
VVL_ - VDLY 0.8 1.2 V
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDLY = VEN = VBST_ = VVL_ = 6.5V, VPGND_ = VLX_ = VPWM_ = 0V, TA= -40°C to +85°C, unless otherwise noted. Typical values are
at TA= +25°C.) (Note 1)
PARAMETER CONDITIONS MIN TYP MAX UNITS
GATE DRIVER SPECIFICATIONS
VPWM_ = VVL_,
sourcing current VBST_ = 6.5V, IDH_ = -0.1A 1.0 1.6
DH_ Driver Resistance
VPWM_ = 0V,
sinking current VBST_ = 6.5V, IDH_ = 0.1A 0.7 1.1
VPWM_ = 0V,
sourcing current VVL_ = 6.5V, IDL_= -0.1A 0.9 1.5
DL_ Driver Resistance
VPWM_ = VVL_,
sinking current VVL_= 6.5V, IDL_= 0.1A 0.4 0.7
Ω
DH_ Rise Time (trDH)V
PWM_ = VVL_ VBST_ = 6.5V, 3000pF load 14 ns
DH_ Fall Time (tfDH)V
PWM_ = 0V VBST_ = 6.5V, 3000pF load 9 ns
DL_ Rise Time (trDL)V
PWM_ = 0V VVL_ = 6.5V, 3000pF load 11 ns
DL_ Fall Time (tfDL)V
PWM_ = VVL_ VVL_ = 6.5V, 3000pF load 8 ns
VPWM_ falling
(tpDHf)20
DH_ Propagation Delay
VPWM_ = VVL _ ,
VDL _ falling (t
p
DHr)
VBST_ = 6.5V
14
ns
VPWM_ rising
(tpDLf)12
DL_ Propagation Delay
VPWM_ = GND,
LX falling (tpDLr)
VBST_ - VLX_ = 6.5V
16
ns
INTERNAL BOOST DIODE SPECIFICATIONS
On-Resistance IBST_ = 40mA 6 Ω
THERMAL SHUTDOWN
Thermal Shutdown Rising temperature, hysteresis = 15°C (typ) +165 °C
Note 1: Specifications at -40°C guaranteed by design.
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
4 _______________________________________________________________________________________
Typical Operating Characteristics
(VVL1 = VVL2 = VEN = VDLY = 6.5V, 3000pF capacitive load, TA= +25°C, unless otherwise noted.)
0
200
100
400
300
600
500
700
0400200 600 800 1000
VL_ POWER DISSIPATION vs. PER-PHASE
SWITCHING FREQUENCY
MAX8811toc01
fS (kHz)
VL_ POWER DISSIPATION (mW)
0
150
50
100
250
200
350
300
400
1000 3000 5000 7000
VL_ POWER DISSIPATION
vs. LOAD CAPACITANCE
MAX8811toc02
DH/DL LOAD CAPACITANCE (pF)
VL_ POWER DISSIPATION (mW)
fSW = 200kHz
0
15
5
10
20
25
30
1000 3000 5000 7000
DL RISE/FALL
vs. LOAD CAPACITANCE
MAX8811toc03
LOAD CAPACITANCE (pF)
RISE/FALL TIME (ns)
fSW = 200kHz
DL RISE
DL
0
15
5
10
20
25
30
0 2000 60004000 8000
DH RISE/FALL TIME
vs. LOAD CAPACITANCE
MAX8811toc04
LOAD CAPACITANCE (pF)
RISE/FALL TIME (ns)
DH RISE
DH FALL
0
4
2
8
6
12
10
14
16
-40 10-15 35 60 85
RISE AND FALL TIMES
vs. TEMPERTURE
MAX8811toc05
TEMPERATURE (°C)
TIME (ns)
DH RISE
DL RISE
DL FALL
DH FALL
3000pF LOAD
0
60
20
40
80
100
120
0 400200 600 800 1000
VL_ SUPPLY CURRENT vs. PER-PHASE
SWITCHING FREQUENCY
MAX8811toc06
fS (kHz)
VL_ SUPPLY CURRENT (mA)
0
20
10
5
15
25
-40 10-15 35 60 85
PROPAGATION DELAY
vs. TEMPERATURE
MAX8811toc07
TEMPERATURE (°C)
TIME (ns)
tpDHf
tpDLr
tpDLf
tpDHr
0
60
40
20
80
100
120
0403010 20 50 60 70 80 90 100
PROGRAMMABLE DELAY
vs. RDLY
MAX8811toc11
RDLY (kΩ)
DELAY (ns)
MAX8811
High-Speed, Dual-Phase Driver with
Integrated Boost Diodes
_______________________________________________________________________________________ 5
SWITCHING WAVEFORMS
MAX8811toc09
VLX
10V/div
VDH
5V/div
VDL
5V/div
VPWM
5V/div
100ns/div
VBST_ AND VL_ WAVEFORMS
MAX8811toc10
VL (AC-COUPLED)
500mV/div
VLX
10div
VBST (AC-COUPLED)
200mV/div
1μs/div
fSW = 250kHz
Typical Operating Characteristics (continued)
(VVL1 = VVL2 = VEN = VDLY = 6.5V, 3000pF capacitive load, TA= +25°C, unless otherwise noted.)
Pin Description
PIN NAME FUNCTION
1 BST1 Boost Capacitor Connection for Phase 1. Connect a 0.22µF ceramic capacitor between BST1 and LX1.
2 DH1 High-Side Gate-Driver Output for Phase 1. DH1 is pulled low during shutdown and UVLO.
3 LX1 Inductor Connection for Phase 1
4 VL1
Gate-Drive Supply for DL1. Connect VL1 to a 4.5V to 7V supply. VL1 must be connected to VL2
externally. Bypass the VL1/VL2 connection with a 2.2µF or larger ceramic capacitor to the power ground
plane.
5 DL1 Low-Side Gate-Driver Output for Phase 1. DL1 is pulled low during shutdown and UVLO.
6 PGND1 Power Ground for DL1. Connect PGND1 and PGND2 to the power ground plane at the IC.
7 EN Enable Input. Drive EN high for normal operation, or low for shutdown.
8 DLY Delay Time Setting Input. Connect a resistor from DLY to PGND1 to set the dead time between DL falling
and DH rising, or connect DLY to VL1 to use the default delay.
9 PWM1 PWM Logic Input for Phase 1. DH1 is high when PWM1 is high; DL1 is high when PWM1 is low.
10 PWM2 PWM Logic Input for Phase 2. DH2 is high when PWM2 is high; DL2 is high when PWM2 is low.
11 PGND2 Power Ground for DL2. Connect PGND1 and PGND2 to the power ground plane at the IC.
12 DL2 Low-Side Gate-Driver Output for Phase 2. DL2 is pulled low during shutdown and UVLO.
13 VL2
Gate-Drive Supply for DL2. Connect VL2 to a 4.5V to 7V supply. VL1 must be connected to VL2
externally. Bypass the VL1/VL2 connection with a 2.2µF or larger ceramic capacitor to the power ground
plane.
14 LX2 Inductor Connection for Phase 2
15 DH2 High-Side Gate-Driver Output for Phase 2. DH2 is pulled low during shutdown and UVLO.
16 BST2 Boost Capacitor Connection for Phase 2. Connect a 0.22µF ceramic capacitor between BST2 and LX2.
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
6 _______________________________________________________________________________________
PWM
DL
LX
DH
tpDLf tpDHf
tfDL tpDHr tpDLr trDL
trDH tfDH
*WHEN RDLY IS USED, tpDHr BECOMES THE USER-PROGRAMMABLE TIME DELAY, tDLY. DRAWING IS NOT TO SCALE.
(tDLY)*
MAX8811
PHASE 2
PHASE 1
UVLO
EN
LOGIC
EN
VL1
VL2
PWM2
PWM1
BST1
DH1
LX1
VL1
DL1
PGND1
DHON
DHLO
DLON
DLLO
LX1 LOW
DETECT
BST2
DH2
LX2
VL2
DL2
PGND2
DHON
DHLO
DLON
DLLO
LX2 LOW
DETECT
Figure 1. Functional Diagram
Figure 2. Driver Timing Diagram
Detailed Description
Principles of Operation
MOSFET Gate Drivers (DH_, DL_)
DH_ is driven high when the PWM_ is high; DL_ is dri-
ven high when PWM_ is low. PWM pulsewidths under
20ns (typ) are rejected, and no switching occurs.
The low-side drivers (DL_) have typical 0.9Ωsourcing
resistance and 0.4Ωsinking resistance, and are capable
of driving 3000pF capacitive loads with 11ns typical rise
and 8ns typical fall times. The high-side drivers (DH_)
have typical 1.0Ωsourcing resistance and 0.7Ωsinking
resistance, and are capable of driving 3000pF capaci-
tive loads with 14ns typical rise and 9ns typical fall times.
This facilitates fast switching, reducing switching losses,
and makes the MAX8811 ideal for both high-frequency
and high-output current applications.
Shoot-Through Protection
Adaptive shoot-through protection is incorporated for
the switching transition after the high-side MOSFET is
turned off and before the low-side MOSFET is turned
on. The low-side driver is turned on when the LX volt-
age falls below 2.5V, or after 135ns typical delay,
whichever occurs first. Furthermore, the delay time
between the low-side MOSFET turn-off and high-side
MOSFET turn-on can be adjusted by selecting the
value of R1 (see the Setting the Dead Time section).
Undervoltage Lockout (UVLO)
When the voltage at the VL1/VL2 connection is below
the UVLO threshold, all driver outputs are held low. This
prevents switching when the supply voltage is too low
for proper operation.
Thermal Protection
Thermal-overload protection limits total power dissipa-
tion in the MAX8811. When the junction temperature
exceeds +165°C, all driver outputs are held low. The IC
resumes normal operation after the junction tempera-
ture cools by 15°C (typ).
Boost Capacitor Selection
The MAX8811 uses a bootstrap circuit to generate the
supply voltages for the high-side drivers (DH_). The select-
ed high-side MOSFET determines the appropriate boost
capacitance values, according to the following equation:
where QGATE is the total gate charge of the high-side
MOSFET and ΔVBST is the voltage variation allowed on
the high-side MOSFET drive. Choose ΔVBST = 0.1V to
0.2V when determining CBST. Low-ESR ceramic capaci-
tors should be used.
VL_ Decoupling
VL1 and VL2 provide the supply voltage for the low-side
drivers. The decoupling capacitors at VL_ also charge the
BST capacitors during the time period when DL_ is high.
Therefore, the decoupling capacitor C3 for VL_ should be
large enough to minimize the ripple voltage during
switching transitions. Choose the VL capacitor approxi-
mately 10 times the value of the BST capacitor value.
CQ
V
BST GATE
BST
=Δ
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
_______________________________________________________________________________________ 7
DESIGNATION DESCRIPTION MANUFACTURER
C1
2 x 10µF ±20%, X7R
25V capacitor
12103D106MAT2W
AVX
C2
2 x 10µF ±20%, X7R
25V capacitor
12103D106MAT2W
AVX
C3
2.2µF ±20%, 10V X5R
capacitor
GRM39X5R225K10
Murata
C4, C5
0.22µF ±20%, 10V
X7R capacitors
GRM39X7R224K10
Murata
C6–C9
100µF ±20%, 6.3V
X5R capacitors
C3225X5R0J107M
TDK
L1, L2
0.2µH, 28A inductors
FDV0630-
R20M,1.9mΩ DCR
TOKO
Q1, Q3 HAT2168, 8mΩ, 30V
MOSFET Renesas
Q2 2 x HAT2164H, 3mΩ,
30V, MOSFET Renesas
Q4 2 x HAT2164H, 3mΩ,
30V MOSFET Renesas
R1
Dead-time delay
programming resistor;
see Programmable
Delay vs. RDLY in the
Typical Operating
Characteristics
Table 1. Components for Figure 3, 800kHz,
20A/Phase Typical Application Circuit
MAX8811
Setting the Dead Time
Connect DLY to VL_ for the default delay time, typically
14ns. To increase the delay between the low-side
MOSFET drive turn-off and the high-side MOSFET turn-
on, connect a resistor from DLY to PGND1. See the
Typical Operating Characteristics section for a plot of
the delay time vs. resistor value. The equation for this
resistor is:
tDLY = 14µs + (1pF) x RDLY
Avoiding dV/dt-Induced
Low-Side MOSFET Turn-On
At high input voltages, fast turn-on of the high-side
MOSFET could momentarily turn on the low-side MOS-
FET due to the high dV/dt appearing at the drain of the
low-side MOSFET. The high dV/dt causes a current flow
through the Miller capacitance (CRSS) and the input
capacitance (CISS) of the low-side MOSFET. Improper
selection of the low-side MOSFET that has a high ratio
of CRSS/CISS makes the problem more severe. To avoid
the problem, give special attention to the ratio of
CRSS/CISS when selecting the low-side MOSFET.
Adding a resistor between BST_ and the BST_ capaci-
tor slows the high-side MOSFET turn-on. Adding a
capacitor from the gate to the source of the high-side
MOSFET has the same effect. However, both methods
are at the expense of increasing the switching losses.
Applications Information
Power Dissipation
Power dissipation in the IC package comes mainly from
switching the MOSFETs. Therefore, it is a function of
both switching frequency and the total gate charge of
the selected MOSFETs. The total power dissipation
when both drivers are switching is given by:
where fSis the switching frequency, QG_TOTAL_HS is
the total gate charge of the selected high-side MOS-
FET, QG_TOTAL_LS is the total gate charge of the
selected low-side MOSFET, N is the total number of the
high-side MOSFETs in parallel, M is the total number of
the low-side MOSFETs in parallel, VVL is the voltage at
VL, RHS is the on-resistance of the high-side MOSFET,
and RG_LS is the gate resistance of the selected low-
side MOSFETs.
PfNQ
R
RR N
MxQ
R
RR M
VV I
IC S G TOTAL HS
HS
HS G HS G TOTAL LS
LS
LS G LS
PV VCC VCC
× × ×
+
+
()
×+ ×
2[
(/)
/]
__
___
_
_
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
8 _______________________________________________________________________________________
DESIGNATION DESCRIPTION MANUFACTURER
C1
2 x 10µF ±20%, X7R
25V capacitor
12103D106MAT2W
AVX
C2
2 x 10µF ±20%, X7R
25V capacitor
12103D106MAT2W
AVX
C3
2.2µF ±20%, 10V X5R
capacitor
GRM39X5R225K10
Murata
C4, C5
0.22µF ±20%, 10V
X7R capacitors
GRM39X7R224K10
Murata
C6, C7, C8
2700µF ±20%, 6.3V
capacitors
MFZ series, 7mΩ max
ESR
Rubycon
L1, L2
T50183, 250nH
inductors at 35A
±20%, 0.68mΩ DCR
Falco Electronics
Q1 2 x HAT2168, 8mΩ,
30V MOSFET Renesas
Q2 2 x HAT2164H, 3mΩ,
30V MOSFET Renesas
Q3 2 x HAT2168, 8mΩ,
30V MOSFET Renesas
Q4 2 x HAT2164H, 3mΩ,
30V MOSFET Renesas
Table 2. Components for Figure 4, 300kHz,
30A/Phase Typical Application Circuit
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
_______________________________________________________________________________________ 9
PCB Layout
The MAX8811 sources and sinks large currents to drive
MOSFETs at high switching speeds. The high di/dt can
cause unacceptable ringing if the trace lengths and
impedances are not well controlled. The following PCB
layout guidelines are recommended when designing
with the MAX8811:
1) Place all decoupling capacitors as close to their
respective pins as possible.
2) Minimize the high-current loops from the input capac-
itor, upper switching MOSFET, and low-side MOSFET
back to the input capacitor negative terminal.
3) Provide enough copper area at and around the
switching MOSFETs and inductors to aid in thermal
dissipation.
4) Connect PGND1 and PGND2 as close as possible
to the source of the low-side MOSFETs.
5) Keep LX1 and LX2 away from sensitive analog com-
ponents and nodes.
6) Gate drive traces should be at least 20 mils wide,
kept as short as possible, and tightly coupled to
reduce EMI and ringing induced by high-frequency
gate noise. Adjacent DH_ and LX_ traces should be
tightly coupled.
A sample evaluation layout is available in the MAX8811
Evaluation Kit.
Chip Information
PROCESS: BiCMOS
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
10 ______________________________________________________________________________________
DH1
DLY
VL2
EN
PWM1
PWM2
VL1
DL1
LX1
BST1
VOUT
PGND1
MAX8811
DH2
DL2
LX2
BST2
PGND2
VIN = 12V
GATE-DRIVE SUPPLY
4.5V TO 7V
OFF
ON
PWM CONTROL
SIGNALS
R1
C3
C4
C1
C6 C7 C8 C9
C5
Q4
Q3
Q2
Q1
L2
C2
L1
Figure 3. 800kHz, 20A/Phase Typical Application Circuit
DH1
DLY
VL2
EN
PWM1
PWM2
VL1
DL1
LX1
BST1
VOUT
PGND1
MAX8811
DH2
DL2
LX2
BST2
PGND2
VIN = 12V
GATE-DRIVE SUPPLY
4.5V TO 7V
OFF
ON
PWM CONTROL
SIGNALS
C3
C4
C1
C6 C7 C8
C5
Q4
Q3
Q2
Q1
L2
C2
L1
Figure 4. 300kHz, 30A/Phase Typical Application Circuit
MAX8811
High-Speed, Dual-Phase Driver
with Integrated Boost Diodes
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
aBobl
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QSOP.EPS
F
11
21-0055
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
Revision History
Pages changed at Rev 1: 1, 2, 7, 8, 11
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