Detailed Description
Principles of Operation
MOSFET Gate Drivers (DH_, DL_)
DH_ is driven high when the PWM_ is high; DL_ is dri-
ven high when PWM_ is low. PWM pulsewidths under
20ns (typ) are rejected, and no switching occurs.
The low-side drivers (DL_) have typical 0.9Ωsourcing
resistance and 0.4Ωsinking resistance, and are capable
of driving 3000pF capacitive loads with 11ns typical rise
and 8ns typical fall times. The high-side drivers (DH_)
have typical 1.0Ωsourcing resistance and 0.7Ωsinking
resistance, and are capable of driving 3000pF capaci-
tive loads with 14ns typical rise and 9ns typical fall times.
This facilitates fast switching, reducing switching losses,
and makes the MAX8811 ideal for both high-frequency
and high-output current applications.
Shoot-Through Protection
Adaptive shoot-through protection is incorporated for
the switching transition after the high-side MOSFET is
turned off and before the low-side MOSFET is turned
on. The low-side driver is turned on when the LX volt-
age falls below 2.5V, or after 135ns typical delay,
whichever occurs first. Furthermore, the delay time
between the low-side MOSFET turn-off and high-side
MOSFET turn-on can be adjusted by selecting the
value of R1 (see the Setting the Dead Time section).
Undervoltage Lockout (UVLO)
When the voltage at the VL1/VL2 connection is below
the UVLO threshold, all driver outputs are held low. This
prevents switching when the supply voltage is too low
for proper operation.
Thermal Protection
Thermal-overload protection limits total power dissipa-
tion in the MAX8811. When the junction temperature
exceeds +165°C, all driver outputs are held low. The IC
resumes normal operation after the junction tempera-
ture cools by 15°C (typ).
Boost Capacitor Selection
The MAX8811 uses a bootstrap circuit to generate the
supply voltages for the high-side drivers (DH_). The select-
ed high-side MOSFET determines the appropriate boost
capacitance values, according to the following equation:
where QGATE is the total gate charge of the high-side
MOSFET and ΔVBST is the voltage variation allowed on
the high-side MOSFET drive. Choose ΔVBST = 0.1V to
0.2V when determining CBST. Low-ESR ceramic capaci-
tors should be used.
VL_ Decoupling
VL1 and VL2 provide the supply voltage for the low-side
drivers. The decoupling capacitors at VL_ also charge the
BST capacitors during the time period when DL_ is high.
Therefore, the decoupling capacitor C3 for VL_ should be
large enough to minimize the ripple voltage during
switching transitions. Choose the VL capacitor approxi-
mately 10 times the value of the BST capacitor value.
Delay vs. RDLY in the