USER GUIDE | UG:306 PI3740-00-EVAL1 Cool-Power(R) ZVS Switching Regulators Buck-Boost Eval Board User Guide Contents Page Introduction 1 Output Voltage Setpoint Adjustment 1 Bill of Materials 2 Non-Populated Components 3 Typical Connections 5 VICOR PCB Edge Connector Description 6 PAD Numbering 6 Schematic Symbol 7 PAD Definitions 7 PCB Design Files 8 Figure 1 PI3740-00-EVAL1 Evaluation Board Introduction The PI3740-00-EVAL1 evaluation board demonstrates the features and benefits of Vicor's ZVS BuckBoost regulator; pre-configured for either a 12V or 24V output voltage and rated for up to 140W under certain input and output ranges with proper thermal management. The output is set to 12V by default and 24V when JGP is removed. Please refer to the corresponding PI3740-00-LGIZ data sheet for all power specifications. The PI3740-00-EVAL1 evaluation board is used with the following ZVS buck-boost products: PI3740-00-LGIZ. The evaluation board provides several options for applying input power (VIN and GND) and output load (VOUT and GND). The user can solder tab style banana jacks or wire, use threaded connectors with retaining nuts, or solder turret pins for clip-on connections. The evaluation board comes with most of the PI3740-00-LGIZ's features accessible to the user. LGH function is not accessible in this board and it can be evaluated with a dedicated evaluation board. See website or contact sales for further information. The current monitor function (IMON) is set-up to monitor the PI3740-00-LGIZ's output current, sensed across a 5m resistor. The general purpose amplifier (VDIFF) comes pre-set with a gain of 2, but can be easily re-configured for differential measurements by adding extra 0603 resistors. The I/O pins are brought out to the right edge of the evaluation board to allow for easy monitoring or for adding additional circuitry. The status of the PGD pin is indicated by a dual colored LED; red indicating a fault and green indicating no faults. The SYNCO (sync out) and SYNCI (sync in) pins are accessible to allow for paralleling or for synchronizing to an external clock. See PI3740-00-LGIZ data sheet for paralleling options. Shorting J5 between IMON and VSP on the board will connect the output of IMON to the positive input of the general purpose amplifier, allowing for user designed signal scaling and conditioning. The board is designed with an edge connector to facilitate testing at the factory, but this connection can also be used for board evaluation. The PCB is 4 layer FR-4 170Tg material with 2oz copper per layer, ENIG pad finish and a board thickness of 0.062". Output Voltage Setpoint Adjustment The error amplifier's output (EAO) is brought to a pin and in conjunction with the TRK pin can be used for paralleling converters. The error amplifier's input (EAIN) is not directly connected to a pin, but connects to the pin EXT_VREF via a 1.4k series resistor REA3. Applying a dc voltage from 0V to 2V maximum (over voltage could damage the module) to this pin will allow the user to change the regulated output voltage without changing the feedback network. Setting the trim voltage between 0 - 2V will set VOUT from 24V to 10V when JGP is installed, and set VOUT from 50V to 19.4V when JGP is not installed. The trim voltage must not be applied until after the unit has started up, otherwise the soft start time will be reduced and could lead to unsuccessful startup. The trim voltage adjustment slew rate should not exceed 1V/0.5S over the entire trim range to avoid triggering the output over voltage protection circuitry. UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 1 Bill of Materials Table 1 Bill of Materials Populated Components Vendor Name Vendor Part Number Ceramic Cap, X5R, 50V, 1206 TDK C3216X5R1H106K160AB [1] 2.2F Ceramic Cap, X7S, 100V, 1206 TDK C3216X7S2A225K160AB CCOMP 4.7nF Ceramic Cap, X7R, 50 V, 0603 Murata GRM188R71H472KA01D 1 D1 Fault Status Rohm SML-P24MUWT86 2 FT1, FT2 TEST 1, TEST 2 Keystone 5015 2 JGP, J6 Connector Header 2 Position 0.1" Pitch Samtec TSW-148-07-F-S 1 L1 65nH FP0404 Series Inductor Cooper FP0404R1-R065-R 1 LMAG 0.42H HCV1206 Inductor Cooper HCV1206-R42-R 1 PCB PI37xx-xx Edge Connector Eval Board VICOR PCB0175rD 1 PI3740 ZVS BuckBoost Low Voltage ZVS B-B SIP 10 x 14 mm VICOR PI3740-00-LGIZ 1 R5 1.00k Resistor, 1%, 0.1 W, 0603 Rohm MCR03EZPFX1001 5 RDIFF1, RDIFF2, RPGD, RSYNCI, REA1 10.0k Resistor, 1%, 0.1 W, 0603 Rohm MCR03EZPFX1002 1 REA3 1.4k Resistor, 1%, 0.1W, 0603 Yageo RC0603FR-071K4L 1 REA4 1.65k Resistor, 1%, 0.1W, 0603 Yageo RC0603FR-071K65L 1 RGP 11.7k Resistor, 1%, 0.1 W, 0603 Vishay Dale TNPW060311K7BEEA 1 RIN 0.51 Resistor, 1%, 0.25 W, 1206 Rohm MCR18EZHFLR510 1 RSENSE 0.005 Panasonic ERJ-M1WSF5M0U 3 RSDA, RSCL, RZ1 0 Resistor, 1%, 0.1 W, 0603 Rohm MCR03EZPJ000 1 U1 NC7WZ14EP6X Dual Schmidt trigger Inverter Fairchild NC7WZ14EP6X 1 CVDR 0.1F Capacitor, X7R Ceramic, 0.1F, 50V, 0603 Murata GRM188R71H104KA93D 1 JVOUT Johnson Jack Tektronix 131503100 1 CIN2 Capacitor Alum. 100V, 20%, Radial Nichicon UHE2A101MPD 1 J5 Connector Header 3 Position 0.1" Pitch Molex 22-28-4035 1 CEAO 47pF Ceramic Cap, 5%, 0603, 50V Murata GRM1885C1H470JA01D 1 CTRK 47nF Ceramic Cap, 0603, 25V, X7R Murata GRM188R71E473KA01D Qty Designator Value Description 8 C7, C8, C9, C10, C11, C12, C13, C14 10F 7 C1, C2, C3, C4, C5, C6, CIN1 1 100F 1 x 1 mm Dual Color SM LED SM Testpoint Resistor, 1%, 1 W, 2512 Note 1: For higher voltage outputs over 40V, the output capacitors C7-C14 should be changed to 2.2F or 4.7F 100V. UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 2 Non-Populated Components Table 2 Bill of Material Non-Populated Components Qty Designator 3 REA2, RIMON, RZ2 4 R1, R2, R3, R4 16 EAO, EXT_VREF, PGD, IMON, SGND1, SGND2, TRK, SYNCI, SYNCO, VDIFF, VDR, VSN, VSP, VIN_F, VOUT, GND 3 CEAIN1, CEAO, CTRK 1 JVIN 3 ENABLE, FT3, FT4 1 H1 UG:306 vicorpower.com Description Resistor, 1%, 0.1 W, 0603 Factory Use Only Thru-hole Testpoints, Vector K24C Ceramic Cap, 50 V, 0603 Johnson Jack, Tektronix 131503100 SM Testpoint, Keystone 5015 Factory Test Header Applications Engineering: 800 927.9474 Page 3 PGD 3 1 PCBNumber PCB0203 J4 J1 A2 A1 FT4 PGND CIN2 DNP VIN R3 DNP R1 DNP VDR Y2 Y1 4 6 R5 D1B PCBNumber U1 NC7WZ14 PG SENSE CIN1 VDR 1 1 5 VCC GND 2 C1 R4 DNP FT3 R2 DNP C2 RSDA PGD FT3 FT4 VDR 3 4 1 TOP VIEW 2 RPGD TRK K7 PGND G1 VIN H1 VIN J1 VIN K1 VIN K2 VIN Applications Engineering: 800 927.9474 F2 Fiducials F1 RSYNCI CVDR VDR PGD TRK A1 ADDR1 A2 ADDR0 D1 E1 A3 SCL A4 SDA A5 EN C6 VIN_FILT FT1 FT2 ENABLE C5 B1 SYNCI C1 SYNCO RSCL C4 SYNCI SYNCO C3 VIN_F DUAL LED ORIENTATION PGD FT3 FT4 VDR 4 SCL 3 SDA 2 EN 1 SGND SYNCI SYNCO D1A H1 Factory Test Header FP0404R1 L1 JVIN RZ1 CCOMP CTRK LMAG MECH PIN PI3740 HCV1206-R 2 3 1 DNP RZ2 CEAO EAO RIN 1 4 VSUPPLY 2 3 K4 VS1 K5 VS1 SGND B14 TRK A6 COMP A8 vicorpower.com A13 UG:306 VSN VSP A10 EAO VSP VSP VDIFF A11 A9 VSN VDIFF EAO EAIN A12 EAIN ISP ISN IMON K8 E14 IS+ D14 ISA14 IMON PGND G14 VOUT H14 VOUT J14 VOUT K13 VOUT K14 VOUT LGH A7 VS1 K10 VS2 K11 VS2 VS2 C7 C9 RDIFF2 RDIFF1 RIMON DNP C8 VSN C13 IMON ENABLE DAC DNP CEAIN1 C12 VSP J5 J6 RGP C14 Tie RSENSE SGND SGND EXT_VREF JGP Tie FT3 ENABLE FT1 FT2 VOUT Jumper J5 to connect IMON to VP for ATE Tesng. REA3 DNP VDIFF REA4 REA1 REA2 C11 IMON C10 JVOUT 13 14 15 16 17 18 19 20 21 22 23 24 P2 P4 SGND2 DNP SGND1 DNP 1 1 J3 J2 DAC EAO VDIFF VSN VSP SYNCO SYNCI PGD FT4 VDR ISN VIN_FILT VIN -VO SENSE 1 -VO SENSE +VO SENSE + VO SENSE 1 SAMTEC LPHS HORZ Edge Conn 1 2 3 4 5 6 7 8 9 10 11 12 P1 CN1 P3 VOUT SAMTEC LPHS-04-24 Figure 2 Evaluation Board Schematic COMP Page 4 Tie Figure 3 Evaluation Board Details Typical Connections Figure 4 illustrates the typical input supply and output load connections required to power the PI3740-00 evaluation board. The test points on the right side of the board provide access to key nodes used to assess the board's performance. The jumper "JGP" provides an change in the output voltage set. The output is set to 12V by default with JGP in place, and becomes 24V when JGP is removed. The jumper J5 will connect the IMON output signal to the positive input of the general purpose amplifier, allowing this signal to be scaled. The J6 jumper will disable the converter when connected. JVIN is an unpopulated "Johnson Jack" location that may be used to measure input ripple voltage. Figure 4 Typical Input and Output Connections UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 5 VICOR PCB Edge Connector Description SAMTEC Reference Mechanical Drawings: based on EXTreme LPHPowerTM Socket Assembly series, available from Samtec's website PCB Dimensions: "Recommended PCB layout for LPHS-XX-XX-X-VXX-XX PCB Layout.pdf" Right Angle Socket: "LPHS-XX-XX-X-RTX-XX-MKT.pdf" Vertical Socket: "LPHS-XX-XX-X-VXX-XX-MKT.pdf" Figure 5 Edge Connector Details PAD Numbering Figure 6 Top (Component) View Figure 7 Bottom View UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 6 Schematic Symbol Figure 8 Schematic of edge connector P3 ENABLE FT1 FT2 FT3 P4 P1 P2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 SAMTEC LPHS-04-24 VOUT CN1 VIN DAC EAO VDIFF VSN VSP SYNCO SYNCI FLT FT4 VDR ISN VIN SAMTEC LPHS HORZ Edge Conn PAD Definitions PAD Name Description P1,P2 PGND Power ground connection for the input supply and output load P3 VOUT Output voltage connection P4 VIN 1, 2, 6, 7, 8, 10 SGND Signal ground used as reference for I/O measurements 11, 12 PGND Power ground used as reference for input and output voltage measurements 3 ENABLE 4 FT1 Factory use only 5 FT2 Factory use only 9 FT3 Factory use only 13 DAC External voltage node to adjust regulated output voltage (EXT_VREF) 14 EAO Error amplifier output 15 VDIFF Differential amplifier output 16 VSN Differential amplifier inverting input 17 VPN Differential amplifier non-inverting input 18 SYNCO Sync output pin 19 SYNCI Sync input pin 20 PGD Power good status pin 21 FT4 Factory use only 22 VDR Internal generated 5.1V supply for gate drivers and internal logic 23 ISN Remote sensed output voltage, after the IMON resistor 24 VIN Input supply voltage measured at SIP's input UG:306 Input voltage connection Enable vicorpower.com Applications Engineering: 800 927.9474 Page 7 PCB Design Files ODB++ evaluation board design files are available for download on Vicor's website. www.vicorpower.com Design File Format Product PI3740-00-EVAL1 Rev 1.1 05/17 ODB++ vicorpower.com Link to Download http://www.vicorpower.com/files/live/sites/vicor/files/documents/ pcb_files/PI3740-00 Eval ODB++.zip Applications Engineering: 800 927.9474 Page 8