PI3740-00-EVAL1 - VICOR - Datasheet.Directory

UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 1

PI3740-00-EVAL1

Cool-Power® ZVS Switching Regulators

Buck-Boost Eval Board User Guide

Introduction

The PI3740-00-EVAL1 evaluation board demonstrates the features and beneﬁts of Vicor’s ZVS Buck-

Boost regulator; pre-conﬁgured for either a 12V or 24V output voltage and rated for up to 140W under

certain input and output ranges with proper thermal management. The output is set to 12V by default

and 24V when JGP is removed. Please refer to the corresponding PI3740-00-LGIZ data sheet for all

power speciﬁcations. The PI3740-00-EVAL1 evaluation board is used with the following ZVS buck-boost

products: PI3740-00-LGIZ.

The evaluation board provides several options for applying input power (VIN and GND) and output load

(VOUT and GND). The user can solder tab style banana jacks or wire, use threaded connectors with

retaining nuts, or solder turret pins for clip-on connections.

The evaluation board comes with most of the PI3740-00-LGIZ’s features accessible to the user. LGH

function is not accessible in this board and it can be evaluated with a dedicated evaluation board.

See website or contact sales for further information. The current monitor function (IMON) is set-up

to monitor the PI3740-00-LGIZ's output current, sensed across a 5mΩ resistor. The general purpose

ampliﬁer (VDIFF) comes pre-set with a gain of 2, but can be easily re-conﬁgured for differential

measurements by adding extra 0603 resistors.

The I/O pins are brought out to the right edge of the evaluation board to allow for easy monitoring

or for adding additional circuitry. The status of the PGD pin is indicated by a dual colored LED; red

indicating a fault and green indicating no faults. The SYNCO (sync out) and SYNCI (sync in) pins are

accessible to allow for paralleling or for synchronizing to an external clock. See PI3740-00-LGIZ data

sheet for paralleling options. Shorting J5 between IMON and VSP on the board will connect the output

of IMON to the positive input of the general purpose ampliﬁer, allowing for user designed signal

scaling and conditioning.

The board is designed with an edge connector to facilitate testing

at the factory, but this connection can also be used for board

evaluation. The PCB is 4 layer FR-4 170Tg material with 2oz copper

per layer, ENIG pad ﬁnish and a board thickness of 0.062".

Output Voltage Setpoint Adjustment

The error ampliﬁer’s output (EAO) is brought to a pin and

in conjunction with the TRK pin can be used for paralleling

converters. The error ampliﬁer’s input (EAIN) is not directly

connected to a pin, but connects to the pin EXT_VREF via a

1.4k series resistor REA3. Applying a dc voltage from 0V to 2V

maximum (over voltage could damage the module) to this pin will

allow the user to change the regulated output voltage without

changing the feedback network. Setting the trim voltage between

0 – 2V will set VOUT from 24V to 10V when JGP is installed, and

set VOUT from 50V to 19.4V when JGP is not installed. The trim

voltage must not be applied until after the unit has started up,

otherwise the soft start time will be reduced and could lead to

unsuccessful startup. The trim voltage adjustment slew rate should

not exceed 1V/0.5S over the entire trim range to avoid triggering

the output over voltage protection circuitry.

Contents Page

USER GUIDE | UG:306

Introduction 1

Output Voltage Setpoint

Adjustment 1

Bill of Materials 2

Non-Populated Components 3

Typical Connections 5

VICOR PCB Edge Connector

Description 6

PAD Numbering 6

Schematic Symbol 7

PAD Deﬁnitions 7

PCB Design Files 8

Figure 1

PI3740-00-EVAL1

Evaluation Board

UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 2

Qty Designator Value Description Vendor

Name Vendor Part Number

C7, C8, C9, C10,

C11, C12, C13,

C14

10µF Ceramic Cap, X5R, 50V,

1206 TDK C3216X5R1H106K160AB [1]

7C1, C2, C3, C4,

C5, C6, CIN1 2.2µF Ceramic Cap, X7S, 100V,

1206 TDK C3216X7S2A225K160AB

1CCOMP 4.7nF Ceramic Cap, X7R, 50 V,

0603 Murata GRM188R71H472KA01D

1D1 Fault Status 1 x 1 mm Dual Color SM

LED Rohm SML-P24MUWT86

2FT1, FT2 TEST 1, TEST 2 SM Testpoint Keystone 5015

2JGP, J 6 Connector Header 2

Position 0.1" Pitch Samtec TSW-148- 07-F-S

1L1 65nH FP0404 Series Inductor Cooper FP0404R1-R065-R

1LMAG 0.42µH HCV1206 Inductor Cooper HCV1206-R42-R

1PCB PI37xx-xx Edge

Connector Eval Board VICOR PCB0175rD

1PI3740ZVS Buck-

Boost

Low Voltage ZVS B-B

SIP 10 x 14 mm VICOR PI3740-00-LGIZ

1R5 1.00kΩResistor, 1%, 0.1 W,

0603 Rohm MCR03EZPFX1001

RDIFF1, RDIFF2,

RPGD, RSYNCI,

REA1

10.0kΩResistor, 1%, 0.1 W,

0603 Rohm MCR03EZPFX1002

1REA3 1.4kΩResistor, 1%, 0.1W, 0603 Yageo RC0603FR-071K4L

1REA4 1.65kΩResistor, 1%, 0.1W, 0603 Yageo RC0603FR-071K65L

1 RGP 11.7kΩResistor, 1%, 0.1 W,

0603

Vishay

Dale T N P W 0 6 0311K 7 BE E A

1RIN 0.51ΩResistor, 1%, 0.25 W,

1206 Rohm MCR18EZHFLR510

1RSENSE 0.005ΩResistor, 1%, 1 W, 2512 Panasonic ERJ-M1WSF5M0U

3RSDA, RSCL, RZ1 0ΩResistor, 1%, 0.1 W,

0603 Rohm MCR03EZPJ000

1U1 NC7W Z14EP6X Dual Schmidt trigger

Inverter Fairchild NC7WZ14EP6X

1CVDR 0.1µ F Capacitor, X7R Ceramic,

0.1µF, 50V, 0603 Murata GRM188R71H104KA93D

1JVOUT Johnson Jack Tektronix 131503100

1CIN2 100µF Capacitor Alum. 100V,

20%, Radial Nichicon UHE2A101MPD

1J5 Connector Header 3

Position 0.1" Pitch Molex 22-28-4035

1CEAO 47pF Ceramic Cap, ±5%,

0603, 50V Murata GRM1885C1H470JA01D

1CTRK 47nF Ceramic Cap, 0603, 25V,

X7R Murata GRM188R71E473KA01D

Note 1: For higher voltage outputs over 40V, the output capacitors C7–C14 should be changed to 2.2µF

or 4.7µF 100V.

Bill of Materials

Table 1

Bill of Materials

Populated Components

UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 3

Qty Designator Description

3 REA2, RIMON, RZ2 Resistor, 1%, 0.1 W, 0603

4 R1, R2, R3, R4 Factory Use Only

EAO, EXT_VREF, PGD, IMON,

SGND1, SGND2, TRK, SYNCI, SYNCO,

VDIFF, VDR, VSN, VSP, VIN_F, VOUT, GND

Thru-hole Testpoints, Vector K24C

3 CEAIN1, CEAO, CTRK Ceramic Cap, 50 V, 0603

1 JVIN Johnson Jack, Tektronix 131503100

3 ENABLE, FT3, FT4 SM Testpoint, Keystone 5015

1 H1 Factory Test Header

Table 2

Bill of Material

Non-Populated Components

UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 4

FT4

EAIN

SYNCO

SYNCI

EAO

+VO SENSE

PGD

Tie

VDR

-VO SENSE

VDR

SYNCO

SYNCI

PGD

ENABLE

COMP

TRK

FT1

FT2

VS1

VS2

EAO

TRK

SGND1

DNP

SGND2

DNP

PG SENSE

VIN_F

LGH

SYNCI

VDIFFA11

VS1K4

EAIN A12

VSPA10

VSNA9

COMP

SYNCO

SCL

ADDR0

A2 ADDR1

SDA

TRK

SGND

B14

EAO

A13

VDR

VS1K5

VOUT J14

VOUT K13

VIN

PGD

VIN

PGND

VIN

VS2K10

VIN

VOUT H14

VOUT G14

PGND K8

VOUT K14

VS2K11

IMON A14

IS+E14

IS-D14

PI3740

CTRK

CCOMP

CEAO

RPGD

FT4

FT3

CVDR

RSYNCI

C1 C2 C3 C4 C5 C7 C8 C9 C10C11C12

PGND

VINVOUT

VIN_FILT RSENSE

IMON

DNP

FT3

FT4

VDR

IMON

JVIN

JVOUT

VSP

VDIFF

VSN

VSP

ISN

C13C14

DNP

RIMON

RIN

ISP

Tie

VOUT VIN

FT4FT3

SYNCO

VDR

DAC

VIN_FILT

ISN

FT1

FT2

ENABLE

EAO

VSP

VDIFF

PGD

VSN

SYNCI

P1 P2

P3 P4

SAMTEC LPHS-04-24

CN1

SAMTEC LPHS HORZ Edge Conn

VSN

VDIFF

RDIFF1

RDIFF2

REA1

REA4

RGP

JGP

CEAIN1

DNP

EXT_VREF

REA3

DNP

REA2

DAC

PCBNumber

DNP

RZ2

RZ1

VSP

IMON

Jumper J5 to connect IMON to VP for ATE Tesng.

DNP

CIN2

SGNDENABLE

VSUPPLY

FP0404R1

CIN1

Tie

GND

3Y2 4

VCC5

Y1 6

NC7WZ14

D1A

D1B

VDR

TOP VIEW

DUAL LED ORIENTATION

PGD

PCBNumbe

MECH PIN

HCV1206-R

LMAG

F1 F2

Fiducials

PCB0203

-VO SENSE 1

+ VO SENSE 1

SGND 1

EN 2

SDA3

SCL4

Factory Test Header

SGND

RSCLRSDA

FT3

Figure 2

Evaluation Board

Schematic

UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 5

Figure 4

Typical Input and

Output Connections

Typical Connections

Figure 4 illustrates the typical input supply and output load connections required to power the

PI3740-00 evaluation board. The test points on the right side of the board provide access to key nodes

used to assess the board's performance. The jumper "JGP" provides an change in the output voltage

set. The output is set to 12V by default with JGP in place, and becomes 24V when JGP is removed. The

jumper J5 will connect the IMON output signal to the positive input of the general purpose ampliﬁer,

allowing this signal to be scaled. The J6 jumper will disable the converter when connected.

JVIN is an unpopulated "Johnson Jack" location that may be used to measure input ripple voltage.

Figure 3

Evaluation Board Details

UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 6

PAD Numbering

Figure 6

Top (Component) View

Figure 7

Bottom View

Figure 5

Edge Connector Details

VICOR PCB Edge Connector Description

SAMTEC Reference Mechanical Drawings: based on EXTreme LPHPower™

Socket Assembly series, available from Samtec’s website PCB Dimensions:

“Recommended PCB layout for LPHS-XX-XX-X-VXX-XX PCB Layout.pdf”

Right Angle Socket: “LPHS-XX-XX-X-RTX-XX-MKT.pdf”

Vertical Socket: “LPHS-XX-XX-X-VXX-XX-MKT.pdf”

UG:306 vicorpower.com Applications Engineering: 800 927.9474 Page 7

VOUT VIN

FT4

FT3

SYNCO

VDR

DAC

VIN

ISN

FT1

FT2

ENABLE

EAO

VSP

VDIFF

FLT

VSN

SYNCI

P1 P2

P3 P4

SAMTEC LPHS-04-24

CN1

SAMTEC LPHS HORZ Edge Conn

Schematic Symbol

PAD Deﬁnitions

PAD Name Description

P1,P2 PGND Power ground connection for the input supply and output load

P3 VOUT Output voltage connection

P4 VIN Input voltage connection

1, 2, 6, 7, 8, 10 SGND Signal ground used as reference for I/O measurements

11, 12 PGND Power ground used as reference for input and output

voltage measurements

3 ENABLE Enable

4 FT1 Factory use only

5 FT2 Factory use only

9 FT3 Factory use only

13 DAC External voltage node to adjust regulated output voltage

(EXT_VREF)

14 EAO Error ampliﬁer output

15 VDIFF Differential ampliﬁer output

16 VSN Differential ampliﬁer inverting input

17 VPN Differential ampliﬁer non-inverting input

18 SYNCO Sync output pin

19 SYNCI Sync input pin

20 PGD Power good status pin

21 FT4 Factory use only

22 VDR Internal generated 5.1V supply for gate drivers and internal logic

23 ISN Remote sensed output voltage, after the IMON resistor

24 VIN Input supply voltage measured at SIP’s input

Figure 8

Schematic of

edge connector

Rev 1.1 05/17 vicorpower.com Applications Engineering: 800 927.9474 Page 8

PCB Design Files

ODB++ evaluation board design ﬁles are available for download on Vicor’s website.

www.vicorpower.com

Product Design

File Format Link to Download

PI3740-00-EVAL1 ODB++ http://www.vicorpower.com/ﬁles/live/sites/vicor/ﬁles/documents/

pcb_ﬁles/PI3740-00 Eval ODB++.zip