September 2013 Doc ID 17606 Rev 2 1/28
1
VND810P-E
Double channel high-side driver
Features
■ECOPACK®: lead free and RoHS compliant
■Automotive Grade: compliance with AEC
Guidelines
■Very low standby current
■CMOS compatible input
■On-state open-load detection
■Off-state open-load detection
■Thermal shutdown protection and diagnosis
■Undervoltage shutdown
■Overvoltage clamp
■Output stuck to VCC detection
■Load current limitation
■Reverse battery protection
■Electrostatic discharge protection
Description
The VND810P-E is a monolithic device designed
in STMicroelectronics™ VIPower™ M0-3
technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protect the device
against overload.
The device detects open-load condition both in
on-state and off-state. Output shorted to VCC is
detected in the off-state. Device automatically
turns off in case of ground pin disconnection.
Type RDS(on) IOUT VCC
VND810P-E 160 mΩ(1)
1. Per each channel.
3.5 A(1) 36 V
SO-16
Table 1. Device summary
Package
Order codes
Tube Tape and reel
SO-16 VND810P-E VND810PTR-E
www.st.com
Contents VND810P-E
2/28 Doc ID 17606 Rev 2
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 17
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 18
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 20
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 SO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 SO-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3 SO-16 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
VND810P-E List of tables
Doc ID 17606 Rev 2 3/28
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Switching (VCC = 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 14. Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 15. Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. SO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
List of figures VND810P-E
4/28 Doc ID 17606 Rev 2
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. On-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 15. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Maximum turn-off current versus load inductance(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. SO-16 PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Thermal fitting model of a quad channel HSD in SO-16. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 31. SO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. SO-16 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. SO-16 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VND810P-E Block diagram and pin description
Doc ID 17606 Rev 2 5/28
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10KΩ
resistor
OVERTEMP. 1
Vcc
GND
INPUT1 OUTPUT1
OVERVOLTAGE
LOGIC
DRIVER 1
STATUS1
Vcc
CLAMP
UNDERVOLTAGE
CLAMP 1
OPEN LOAD ON 1
CURRENT LIMITER 1
OPEN LOAD OFF 1
OUTPUT2
DRIVER 2
CLAMP 2
OPEN LOAD ON 2
OPEN LOAD OFF 2
OVERTEMP. 2
INPUT2
STATUS2
CURRENT LIMITER 2
V
CC
V
CC
OUTPUT 2
OUTPUT 2
OUTPUT 1
V
CC
OUTPUT 1
V
CC
V
CC
INPUT 2
STATUS 2
STATUS 1
INPUT 1
V
CC
GND
N.C.
1
89
16
Electrical specifications VND810P-E
6/28 Doc ID 17606 Rev 2
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
- VCC Reverse DC supply voltage - 0.3 V
- IGND DC reverse ground pin current - 200 mA
IOUT DC output current Internally limited A
- IOUT Reverse DC output current - 6 A
IIN DC input current +/- 10 mA
ISTAT DC Status current +/- 10 mA
VESD
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
–INPUT
–STATUS
–OUTPUT
–V
CC
4000
4000
5000
5000
V
V
V
V
EMAX
Maximum switching energy
(L = 1.5mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150ºC; IL = 5A) 26 mJ
Ptot Power dissipation (per island) at Tlead = 25°C 8.3 W
TjJunction operating temperature Internally limited °C
TcCase operating temperature - 40 to 150
Tstg Storage temperature - 55 to 150 °C
VND810P-E Electrical specifications
Doc ID 17606 Rev 2 7/28
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless
otherwise stated.
Figure 3. Current and voltage conventions
1. VFn = VCCn - VOUTn during reverse battery condition.
Table 4. Thermal data (per island)
Symbol Parameter Value Unit
Rthj-lead Thermal resistance junction-lead 15 °C/W
Rthj-amb Thermal resistance junction-ambient 77(1)
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
57(2)
2. When mounted on a standard single-sided FR-4 board with 4 cm2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.
°C/W
IS
IGND
OUTPUT 2
VCC
GND
STATUS 2
INPUT 2 IOUT2
IIN2
ISTAT2
VSTAT2
VIN2
VCC
VOUT2
OUTPUT 1
IOUT1
VOUT1
INPUT 1
IIN1
STATUS 1
ISTAT1
VIN1
VSTAT1
V
F1 (1)
Electrical specifications VND810P-E
8/28 Doc ID 17606 Rev 2
Table 5. Power output
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC(1)
1. Per device.
Operating supply
voltage 5.5 13 36 V
VUSD(1) Undervoltage shutdown 3 4 5.5 V
VOV(1) Overvoltage shutdown 36 V
RON On-state resistance IOUT = 1 A; Tj = 25 °C
IOUT = 1 A; VCC > 8 V
160
320
mΩ
mΩ
IS(1) Supply current
Off-state; VCC = 13 V;
VIN = VOUT = 0 V 12 40 µA
Off-state; VCC = 13 V;
VIN = VOUT = 0 V;
Tj = 25 °C
12 25 µA
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A 57mA
IL(off1) Off-state output current VIN = VOUT = 0 V 0 50 µA
IL(off2) Off-state output current VIN = 0 V; VOUT = 3.5 V -75 0 µA
IL(off3) Off-state output current VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C 5µA
IL(off4) Off-state output current VIN = VOUT = 0 V; VCC = 13 V;
Tj =25°C 3µA
Table 6. Protections(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 °C
tSDL
Status delay in overload
conditions Tj > TTSD 20 µs
Ilim Current limitation VCC = 13 V 3.5 5 7.5 A
5.5 V < VCC < 36 V 7.5 A
Vdemag Turn-off output clamp voltage IOUT = 1 A; L = 6 mH VCC-41 VCC-48 VCC-55 V
VND810P-E Electrical specifications
Doc ID 17606 Rev 2 9/28
Table 7. VCC - output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage -IOUT = 0.5 A; Tj = 150 °C — — 0.6 V
Table 8. Status pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSTAT Status low output voltage ISTAT = 1.6 mA 0.5 V
ILSTAT Status leakage current Normal operation; VSTAT = 5 V 10 µA
CSTAT Status pin Input capacitance Normal operation; VSTAT = 5V 100 pF
VSCL Status clamp voltage ISTAT = 1mA 6 6.8 8 V
ISTAT = - 1mA -0.7 V
Table 9. Switching (VCC = 13V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL = 13 Ω from VIN rising edge
to VOUT = 1.3 V (see Figure 5)—30 —µs
td(off) Turn-off delay time
RL = 13 Ω from VIN falling
edge to VOUT = 11.7 V
(see Figure 5)
—30 —µs
dVOUT/dt(on) Turn-on voltage slope
RL = 13 Ω from VOUT = 1.3 V
to VOUT = 10.4 V (see
Figure 5)
—See
Figure 21 —V/µs
dVOUT/dt(off) Turn-off voltage slope RL = 13 Ω from VOUT = 11.7 V
to VOUT = 1.3 V (see Figure 5)—See
Figure 22 —V/µs
Table 10. Open-load detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
IOL Open-load on-state detection threshold VIN = 5 V 20 40 80 mA
tDOL(on) Open-load on-state detection delay IOUT = 0 A 200 µs
VOL
Open-load off-state voltage detection
threshold VIN = 0 V 1.5 2.5 3.5 V
tDOL(off) Open-load detection delay at turn-off 1000 µs
Electrical specifications VND810P-E
10/28 Doc ID 17606 Rev 2
Figure 4. Status timings
Figure 5. Switching time waveforms
Table 11. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level 1.25 V
IIL Low level input current VIN = 1.25 V 1 µA
VIH Input high level 3.25 V
IIH High level input current VIN = 3.25 V 10 µA
VI(hyst) Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN = 1 mA 6 6.8 8 V
IIN = -1 mA -0.7 V
V
INn
V
STATn
t
DOL(off)
OPEN LOAD STATUS TIMING (with external pull-up)
V
INn
V
STATn
OVER TEMP STATUS TIMING
t
SDL
t
SDL
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
TSD
VND810P-E Electrical specifications
Doc ID 17606 Rev 2 11/28
Table 12. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature L
H
L
L
H
L
Undervoltage L
H
L
L
X
X
Overvoltage L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Electrical specifications VND810P-E
12/28 Doc ID 17606 Rev 2
Table 13. Electrical transient requirements (part 1/3)
ISO T/R
7637/1
Test pulse
Test level
I II III IV Delays and impedance
1 - 25 V - 50 V - 75 V - 100 V 2 ms, 10 Ω
2 + 25 V + 50 V + 75 V + 100 V 0.2 ms, 10 Ω
3a - 25 V - 50 V - 100 V - 150 V 0.1 µs, 50 Ω
3b + 25 V + 50 V + 75 V + 100 V 0.1 µs, 50 Ω
4 - 4V - 5V - 6V - 7V 100ms, 0.01Ω
5 + 26.5 V + 46.5 V + 66.5 V + 86.5 V 400 ms, 2 Ω
Table 14. Electrical transient requirements (part 2/3)
ISO 7637-1:
Test pulse
Test level results
I II III IV
1CCCC
2CCCC
3a C C C C
3b C C C C
4CCCC
5CEEE
Table 15. Electrical transient requirements (part 3/3)
Class Contents
C All functions of the device performed as designed after exposure to disturbance.
EOne or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
VND810P-E Electrical specifications
Doc ID 17606 Rev 2 13/28
Figure 6. Waveforms
OPEN LOAD without external pull-up
STATUSn
INPUTn
NORMAL OPERATION
UNDERVOLTAGE
VCC
VUSD
VUSDhyst
INPUTn
OVERVOLTAGE
VCC
VCC > VOV
STATUSn
INPUTn
STATUSn
STATUSn
INPUTn
STATUSn
INPUTn
OPEN LOAD with external pull-up
undefined
OVERTEMPERATURE
INPUTn
STATUSn
TTSD
TR
Tj
OUTPUT VOLTAGEn
VCC<VOV
OUTPUT VOLTAGEn
OUTPUT VOLTAGEn
OUTPUT VOLTAGEn
OUTPUT VOLTAGEn
OUTPUT CURRENTn
VOUT > VOL
VOL
Electrical specifications VND810P-E
14/28 Doc ID 17606 Rev 2
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Status leakage current
Figure 11. Status low output voltage Figure 12. Status clamp voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.16
0.32
0.48
0.64
0.8
0.96
1.12
1.28
1.44
1.6
IL(off1) (uA)
Off state
Vcc=36V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Iih (uA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.01
0.02
0.03
0.04
0.05
Ilstat (uA)
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Vstat (V)
Istat=1.6mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vscl (V)
Istat=1mA
VND810P-E Electrical specifications
Doc ID 17606 Rev 2 15/28
Figure 13. On-state resistance vs Tcase Figure 14. On-state resistance vs VCC
Figure 15. Open-load on-state detection
threshold
Figure 16. Open-load off-state voltage
detection threshold
Figure 17. Input high level Figure 18. Input low level
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
50
100
150
200
250
300
350
400
Ron (mOhm)
Iout=0.5A
Vcc=8V; 13V & 36V
5 10152025303540
Vcc (V)
50
75
100
125
150
175
200
225
250
275
300
Ron (mOhm)
Iout=0.5A
Tc= - 40°C
Tc= 25°C
Tc= 150°C
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
10
15
20
25
30
35
40
45
50
55
60
Iol (mA)
Vcc=13V
Vin=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Vol (V)
Vin=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
Vil (V)
Electrical specifications VND810P-E
16/28 Doc ID 17606 Rev 2
Figure 19. Input hysteresis voltage Figure 20. Overvoltage shutdown
Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope
Figure 23. ILIM vs Tcase
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
900
1000
dVout/dt(on) (V/ms)
Vcc=13V
Rl=13Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
450
500
dVout/dt(off) (V/ms)
Vcc=13V
Rl=13Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
1
2
3
4
5
6
7
8
9
10
Ilim (A)
Vcc=13V
VND810P-E Application information
Doc ID 17606 Rev 2 17/28
3 Application information
Figure 24. Application schematic
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
Equation 1:
RGND ≤ 600 mV / IS(on)max
Equation 2
RGND ≥ (-VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
V
CC
OUTPUT2
D
ld
+5V
R
prot
OUTPUT1
STATUS1
INPUT1
+5V
STATUS2
INPUT2
GND
+5V
μ
CR
prot
R
prot
R
prot
D
GND
R
GND
V
GND
Application information VND810P-E
18/28 Doc ID 17606 Rev 2
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = (-VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with Equation 1 where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high-
side drivers sharing the same RGND.
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device is driving an
inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network produces a shift (≈600 mV) in the
input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift not varies if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
-VCCpeak / Ilatchup ≤ Rprot ≤ (VOHµC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = - 100 V
Ilatchup ≥ 20 mA
VOHµC ≥ 4.5 V
5kΩ ≤ Rprot ≤ 65 kΩ.
VND810P-E Application information
Doc ID 17606 Rev 2 19/28
Recommended values are:
Rprot = 10 kΩ
3.4 Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5 V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1. No false open-load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT = (VPU / (RL + RPU))RL < VOlmin.
2. No misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in Section 2.3: Electrical
characteristics.
Figure 25. Open-load detection in off-state
VOL
V batt. VPU
RPU
RL
R
DRIVER
+
LOGIC
+
-
INPUT
STATUS
VCC
OUT
GROUND
IL(off2)
Application information VND810P-E
20/28 Doc ID 17606 Rev 2
3.5 Maximum demagnetization energy (VCC = 13.5 V)
Figure 26. Maximum turn-off current versus load inductance(1)
1. Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
t
Demagnetization Demagnetization Demagnetization
A = single pulse at TJstart = 150 °C
B= repetitive pulse at TJstart = 100 °C
C= repetitive pulse at TJstart = 125 °C
1
10
0,1 1 10 100
L( mH)
ILM AX (A )
A
B
C
VND810P-E Package and PCB thermal data
Doc ID 17606 Rev 2 21/28
4 Package and PCB thermal data
4.1 SO-16 thermal data
Figure 27. SO-16 PC board(1)
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB
thickness = 1.6 mm, Cu thickness = 35 µm, Copper areas: 0.26 cm2, 4 cm2).
Figure 28. Rthj-amb vs PCB copper area in open box free air condition
40
45
50
55
60
65
70
75
80
85
012345
PCB Cu heatsink area (cm^2)
RTH j- am b
(°C/W)
Package and PCB thermal data VND810P-E
22/28 Doc ID 17606 Rev 2
Figure 29. Thermal impedance junction ambient single pulse
Equation 3: pulse calculation formula
Figure 30. Thermal fitting model of a quad channel HSD in SO-16
0.01
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
0.26 cm2
4 cm2
ZTHδRTH δZTHtp 1δ–()+⋅=
where
δtpT⁄=
T_amb
Pd1
C1
R4
C3 C4
R3R1 R6R5R2
C5 C6C2
Pd2
R2
C1 C2
R1
Tj_1
Tj_2
VND810P-E Package and PCB thermal data
Doc ID 17606 Rev 2 23/28
Table 16. Thermal parameters
Area / island (cm2)0.54
R1 (°C/W) 0.35
R2 (°C/W) 1.8
R3 (°C/W) 4.5
R4 (°C/W) 10
R5 (°C/W) 16
R6 (°C/W) 48 25
C1 (W.s/°C) 0.0001
C2 (W.s/°C) 7E-04
C3 (W.s/°C) 6E-03
C4 (W.s/°C) 0.2
C5 (W.s/°C) 0.7
C6 (W.s/°C) 2 4
Package and packing information VND810P-E
24/28 Doc ID 17606 Rev 2
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2 SO-16 package information
Figure 31. SO-16 package dimensions
VND810P-E Package and packing information
Doc ID 17606 Rev 2 25/28
Table 17. SO-16 mechanical data
DIM.
mm.
Min. Typ. Max.
A1.75
a1 0.1 0.2
a2 1.65
b 0.35 0.46
b1 0.19 0.25
C0.5
c1 45° (typ.)
D9.8 10
E5.8 6.2
e1.27
e3 8.89
F3.8 4.0
G4.6 5.3
L 0.5 1.27
M0.62
S8°
Package and packing information VND810P-E
26/28 Doc ID 17606 Rev 2
5.3 SO-16 packing information
Figure 32. SO-16 tube shipment (no suffix)
Figure 33. SO-16 tape and reel shipment (suffix “TR”)
C
B
A
All dimensions are in mm.
Base Q.ty 50
Bulk Q.ty 1000
Tube length (± 0.5) 532
A3.2
B6
C (± 0.1) 0.6
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
VND810P-E Revision history
Doc ID 17606 Rev 2 27/28
6 Revision history
Table 18. Document revision history
Date Revision Changes
20-Jul-2010 1 Initial release.
19-Sep-2013 2 Updated Disclaimer
VND810P-E
28/28 Doc ID 17606 Rev 2
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