May 2010
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
FSL206MR
Green Mode Fairchild Power Switch (FPS™)
Features
Internal Avalanche Rugged SenseFET: 650V
Precision Fixed Operating Frequency: 67kHz
No-Load <150mW at 265VAC without Bias
Winding; <25mW with Bias Winding
No Need for Auxiliary Bias Winding
Frequency Modulation for Attenuating EMI
Line Under-Voltage Protection (LUVP)
Pulse-by-Pulse Current Limiting
Low Under-Voltage Lockout (UVLO)
Ultra-Low Operating Current: 300µA
Built-In Soft-Start and Startup Circuit
Various Protections: Overload Protection (OLP),
Over-Voltage Protection (OVP), Thermal Shutdown
(TSD), Abnormal Over-Current Protection (AOCP),
Auto-Restart Mode for All Protections
Applications
SMPS for STB, DVD, and DVCD Player
SMPS for Auxiliary Power
Description
The FSL206MR integrated Pulse Width Modulator
(PWM) and SenseFET is specifically designed for high-
performance offline Switch Mode Power Supplies
(SMPS) with minimal external components. This device
is integrated high-voltage power regulators that
combine an avalanche-rugged SenseFET with a current
mode PWM control block.
The integrated PWM controller includes: 7.8V regulator
for no bias winding, Under-Voltage Lockout (UVLO)
Protection, Leading-Edge Blanking (LEB), an optimized
gate turn-on/turn-off driver, EMI attenuator, Thermal
Shutdown (TSD) protection, temperature- compensated
precision current sources for loop compensation, and
fault-protection circuitry such as Overload Protection
(OLP), Over-Voltage Protection (OVP), Abnormal Over-
Current Protection (AOCP) and Line Under-Voltage
Protection (LUVP). During startup, the FSL206MR
offers good soft-start performance.
The internal high-voltage startup switch and the burst-
mode operation with very low operating current reduce
the power loss in standby mode. As a result, it is
possible to reach power loss of 150mW with no-bias
winding and 25mW with bias winding at no-load
condition when the input voltage is 265VAC.
Related Resources
AN-4137 — Design Guidelines for Offline Flyback Converters Using FPS™
AN-4141 — Troubleshooting and Design Tips for Fairchild Power Switch (FPS™) Flyback Applications
AN-4147 — Design Guidelines for RCD Snubber of Flyback
AN-4150 — Design Guidelines for Flyback Converters Using FSQ-Series Fairchild Power Switch (FPS™)
Ordering Information
Part
Number Operating
Temperature Top
Mark PKG Packing
Method
Maximum Output Power Table(1)
Current
Limit RDS(ON),MAX
230VAC
± 15%(2) 85 ~
265VAC
Open
Frame(3) Open
Frame(3)
FSL206MRN -40 ~ 115°C FSL206MRN 8-DIP Rail 0.6A 19 12W 7W
FSL206MRL FSL206MRL 8-LSOP
Notes:
1. The junction temperature can limit the maximum output power.
2. 230VAC or 100/115VAC with doubler. The maximum power with CCM operation.
3. Maximum practical continuous power in an open-frame design at 50°C ambient.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 2
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Application Diagram
Drain
GND
VFB VCC
AC
IN DC
OUT
PWM
VSTR
LS
Drain
GND
VFB VCC
AC
IN DC
OUT
PWM
VSTR
LS
(a) With Bias Winding (b) Without Bias Winding
Figure 1. Typical Application
Internal Block Diagram
26,7,8
1
3
VREF
Internal
Bias
S
Q
Q
R
OSC
with EMI Attenuator
IDELAY IFB
VSD
TSD
VOVP
VCC VAOCP
S
Q
Q
R
VCC Drain
VFB
GND
Gate
Driver
5
VSTR
VBURL/VBURH
PWM
4
LS
VCC VREF
VCC Good
VCC Good
LEB
Soft-Start
7V/8V
7.8V
HVREG
HVREG Off
2V/1.5V
VFB
Line
Sense
4.5R
R
Hif VLS>2V
Lif VLS<1.5V
LUVP
OVP OLP
TSD
RSENSE
Figure 2. Internal Block Diagram
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 3
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin # Name Description
1 GND
Ground. Sense FET source terminal on primary side and internal control ground.
2 VCC
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (VSTR) via an internal switch during startup (see Internal Block
Diagram section). It is not until VCC reaches the UVLO upper threshold (8V) that the internal
startup switch opens and device power is supplied via the auxiliary transformer winding.
3 VFB
Feedback Voltage. Non-inverting input to the PWM comparator. With a 0.11mA current
source connected internally and a capacitor and opto-coupler typically connected externally.
There is a delay while charging external capacitor CFB from 2.4V to 5V using an internal 2.7A
current source. This delay prevents false triggering under transient conditions, but allows the
protection mechanism to operate under true overload conditions.
4 LS
Line Sense Pin. This pin is used to protect the set when the input voltage is lower than the
rated input voltage range. If this pin is not used, connect to the ground.
5 VSTR
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the VCC pin
and ground. Once VCC reaches 8V, all internal blocks are activated. After that, the internal
high-voltage regulator (HV REG) turns on and off irregularly to maintain VCC at 7.8V.
6, 7, 8 Drain Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the
transformer decreases leakage inductance.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 4
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only. TA = 25°C, unless otherwise specified.
Symbol Parameter Min. Max. Unit
VSTR V
STR Pin Voltage -0.3 650.0 V
VDS Drain Pin Voltage -0.3 650.0 V
VCC Supply Voltage 26 V
VLS LS Pin Voltage -0.3 Internally Clamped Voltage(4) V
VFB Feedback Voltage Range -0.3 Internally Clamped Voltage(4) V
IDM Drain Current Pulsed(5) 1.5 A
EAS Single Pulsed Avalanche Energy(6) 11 mJ
PD Total Power Dissipation 1.3 W
TJ Operating Junction Temperature -40 +150 °C
TA Operating Ambient Temperature -40 +125 °C
TSTG Storage Temperature -55 +150 °C
ESD Human Body Model, JESD22-A114 4 KV
Charged Device Model, JESD22-C101 2
Notes:
4. VFB is clamped by internal clamping diode (13V, ICLAMP_MAX < 100A). After shutdown, before VCC reaching
VSTOP, VSD < VFB < VCC.
5. Repetitive rating: Pulse width limited by maximum junction temperature.
6. L=21mH, starting TJ=25°C.
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol Parameter Package Value Unit
JA Junction-to-Ambient Thermal Impedance(7) 8-DIP 93 °C/W
Notes:
7. Referenced the JEDEC recommended environment, JESD51-2, bv and test board, JESD51-10, with minimum
land pattern.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 5
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
TA = 25°C unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Units
SenseFET Section
BVDSS Drain Source Breakdown Voltage VCC = 0V, ID = 250µA 650 V
IDSS Zero Gate Voltage Drain Current VDS = 650V, VGS = 0V 50 µA
VDS = 520V, VGS = 0V, TA = 125°C(8) 250 µA
RDS(ON) Drain-Source On-State Resistance(9) V
GS = 10V, ID = 0.3A 14 19
CiSS Input Capacitances VGS = 0V, VDS = 25V, f = 1MHz 162 pF
COSS Output Capacitance VGS = 0V, VDS = 25V, f = 1MHz 14.9 pF
CRSS Reverse Transfer Capacitance VGS = 0V, VDS = 25V, f = 1MHz 2.7 pF
tr Rise Time VDS = 325V, ID = 0.5A, RG=25 6.1 ns
tf Fall Time VDS = 325V, ID = 0.5A, RG=25 43.6 ns
Control Section
fOSC Switching Frequency VFB = 4V, VCC = 10V 61 67 73 KHz
fOSC Switching Frequency Variation -25°C < TJ < 85°C ±5 ±10 %
fM Frequency Modulation(8) ±3 KHz
DMAX Maximum Duty Cycle VFB = 4V, VCC = 10V 66 72 78 %
DMIN Minimum Duty Cycle VFB = 0V, VCC = 10V 0 0 0 %
VSTART UVLO Threshold Voltage VFB = 0V, VCC Sweep 7 8 9 V
VSTOP After Turn On 6 7 8 V
IFB Feedback Source Current VFB= 0V, VCC = 10V 90 110 130 µA
tS/S Internal Soft-Start Time VFB = 4V, VCC = 10V 10 15 20 ms
Burst Mode Section
VBURH Burst-Mode HIGH Threshold Voltage VCC = 10V, VFB Increase 0.66 0.83 1.00 V
VBURL Burst-Mode LOW Threshold Voltage VCC = 10V, VFB Decrease 0.59 0.74 0.89 V
HYSBUR Burst-Mode Hysteresis 90 mV
Protection Section
ILIM Peak Current Limit VFB = 4V, di/dt = 300mA/µs,
VCC = 10V 0.54 0.60 0.66 A
tCLD Current Limit Delay Time(8) 100 ns
VSD Shutdown Feedback Voltage VCC = 10V 4.5 5.0 5.5 V
IDELAY Shutdown Delay Current VFB = 4V 2.1 2.7 3.3 µA
tLEB Leading-Edge Blanking Time(8) 250 ns
VAOCP Abnormal Over-Current Protection(8) 0.7 V
VOVP Over-Voltage Protection VFB = 4V, VCC Increase 23.0 24.5 26.0 V
VLS_OFF Line-Sense Protection On to Off VFB = 3V, VCC = 10V, VLS Decrease 1.9 2.0 2.1 V
VLS_ON Line-Sense Protection Off to On VFB = 3V, VCC = 10V, VLS Increase 1.4 1.5 1.6 V
TSD Thermal Shutdown Temperature(8) +125 +135 +150 °C
HYSTSD TSD Hysteresis Temperature(8) +60 °C
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 0.0.1 6
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Electrical Characteristics (Continued)
TA = 25°C unless otherwise specified.
Symbol Parameter Conditions Min. Typ. Max. Units
High Voltage Regulator Section
VHVR HV Regulator Voltage VFB = 0V, VSTR = 40V 7.8 V
Total Device Section
IOP1 Operating Supply Current
(Control Part Only, without Switching) VCC = 15V, 0V<VFB<VBURL 0.3 0.5 mA
IOP2 Operating Supply Current
(Control Part Only, without Switching) VCC = 8V, 0V<VFB<VBURL 0.25 0.45 mA
IOP3 Operating Supply Current(8)
(While Switching) VCC = 15V, VBURL<VFB<VSD 1.3 mA
ICH Startup Charging Current VCC = 0V, VSTR > 40V 1.6 1.9 2.2 mA
ISTART Startup Current VCC = before VSTART, VFB = 0V 100 150 µA
VSTR Minimum VSTR Supply Voltage VCC = VFB = 0V, VSTR Increase 26 V
Notes:
8. Though guaranteed by design, not 100% tested in production.
9. Pulse test: pulse width=300ms, duty cycle=2%.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 7
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40Ԩ‐25Ԩ0Ԩ25Ԩ50Ԩ75Ԩ90Ԩ110Ԩ115Ԩ
OperatingFrequency(f
OSC
)
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40Ԩ‐25Ԩ0Ԩ25Ԩ50Ԩ75Ԩ90Ԩ110Ԩ
HVRegulatorVoltage(V
HVR
)
Figure 4. Operating Frequency vs. Temperature Figure 5. HV Regulator Voltage vs. Temperature
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40℃‐25℃0℃25℃50℃75℃90℃110℃
StartThesholdVoltage(V
START
)
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40℃‐25℃0℃25℃50℃75℃90℃110℃
StopThesholdVoltage(VSTOP)
Figure 6. Start Threshold Voltage
vs. Temperature Figure 7. Stop Threshold Voltage
vs. Temperature
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40℃‐25℃0℃25℃50℃75℃90℃110℃
FeedbackSourceCurrent(I
FB
)
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40℃‐25℃0℃25℃50℃75℃90℃110℃
PeakCurrentLimit(I
LIM
)
Figure 8. Feedback Source Current
vs. Temperature Figure 9. Peak Current Limit vs. Temperature
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 8
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics (Continued)
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40Ԩ‐25Ԩ0Ԩ25Ԩ50Ԩ75Ԩ90Ԩ110Ԩ
StartupChargingCurrent(I
CH
)
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40℃‐25℃0℃25℃50℃75℃90℃110℃
OperatingSupplyCurrent(Iop1)
Figure 10. Startup Charging Current
vs. Temperature Figure 11. Operating Supply Current 1
vs. Temperature
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40℃‐25℃0℃25℃50℃75℃90℃110℃
OperatingSupplyCurrent(Iop2)
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40Ԩ‐25Ԩ0Ԩ25Ԩ50Ԩ75Ԩ90Ԩ110Ԩ
Over‐VoltageProtection(V
OVP
)
Figure 12. Operating Supply Current 2
vs. Temperature Figure 13. Over-Voltage Protection Voltage
vs. Temperature
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
‐40℃‐25℃0℃25℃50℃75℃90℃110℃
SuntdownDelayCurrent(I
DELAY
)
Figure 14. Shutdown Delay Current
vs. Temperature
© 2010 Fairchild Semiconductor Corporation
FSL206MR • Rev. 1.0.0 www.fairchildsemi.com
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Functional Description
Startup
At startup, an internal high-voltage current source
supplies the internal bias and charges the external
capacitor (CA) connected to the VCC pin, as illustrated in
Figure 15. An internal high-voltage regulator (HV/REG)
located between the VSTR and VCC pins regulates the
VCC to be 7.8V and supplies operating current.
Therefore, FSL206MR needs no auxiliary bias winding.
VREF UVLO
HV/REG
7.8V
2
VSTR
3
VCC
C
A
VDC,link
ICH
ISTART
Figure 15. Startup Block
Oscillator Block
The oscillator frequency is set internally and the FPS™
has a random frequency fluctuation function.
Fluctuation of the switching frequency of a switched
power supply can reduce EMI by spreading the energy
over a wider frequency range than the bandwidth
measured by the EMI test equipment. The amount of
EMI reduction is directly related to the range of the
frequency variation. The range of frequency variation is
fixed internally; however, its selection is randomly
chosen by the combination of external feedback voltage
and internal free-running oscillator. This randomly
chosen switching frequency effectively spreads the EMI
noise nearby switching frequency and allows the use of
a cost-effective inductor instead of an AC input line filter
to satisfy world-wide EMI requirements.
Figure 16. Frequency Fluctuation Waveform
Feedback Control
FSL206MR employs current-mode control, as shown in
Figure 17. An opto-coupler (such as the FOD817A) and
shunt regulator (such as the KA431) are typically used
to implement the feedback network. Comparing the
feedback voltage with the voltage across the RSENSE
resistor makes it possible to control the switching duty
cycle. When the shunt regulator reference pin voltage
exceeds the internal reference voltage of 2.5V; the
opto-coupler LED current increases, feedback voltage
VFB is pulled down, and the duty cycle is reduced. This
typically occurs when input voltage is increased or
output load is decreased.
Figure 17. Pulse-Width-Modulation (PWM) Circuit
Leading-Edge Blanking (LEB)
At the instant the internal SenseFET is turned on, the
primary-side capacitance and secondary-side rectifier
diode reverse recovery typically causes a high-current
spike through the SenseFET. Excessive voltage across
the RSENSE resistor leads to incorrect feedback
operation in the current mode PWM control. To counter
this effect, the FPS employs a leading-edge blanking
(LEB) circuit (see Figure 17). This circuit inhibits the
PWM comparator for a short time (tLEB) after the
SenseFET is turned on.
Protection Ci rcuits
The FSL206MR protective functions, include Overload
Protection (OLP), Over-Voltage Protection (OVP),
Under-Voltage Lockout (UVLO), Line Under-Voltage
Protection (LUVP), Abnormal Over-Current Protection
(AOCP), and thermal shutdown (TSD). Because these
protection circuits are fully integrated inside the IC
without external components, reliability is improved
without increasing cost. Once a fault condition occurs,
switching is terminated and the SenseFET remains off.
This causes VCC to fall. When VCC reaches the UVLO
stop voltage VSTOP (7V), the protection is reset and the
internal high-voltage current source charges the VCC
capacitor via the VSTR pin. When VCC reaches the UVLO
start voltage VSTART (8V), the FPS resumes normal
operation. In this manner, the auto-restart can
alternately enable and disable the switching of the
power SenseFET until the fault condition is eliminated.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 10
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Figure 18. Auto-Restart Protection Waveforms
Overload Protection ( O LP)
Overload is defined as the load current exceeding a
pre-set level due to an unexpected event. In this
situation, the protection circuit should be activated to
protect the SMPS. However, even when the SMPS is
operating normally, the overload protection (OLP) circuit
can be activated during the load transition or startup. To
avoid this undesired operation, the OLP circuit is
activated after a specified time to determine whether it
is a transient situation or a true overload situation. The
current-mode feedback path limits the current in the
SenseFET when the maximum PWM duty cycle is
attained. If the output consumes more than this
maximum power, the output voltage (VO) decreases
below its rating voltage. This reduces the current
through the opto-coupler LED, which also reduces the
opto-coupler transistor current, thus increasing the
feedback voltage (VFB). If VFB exceeds 2.4V, the
feedback input diode is blocked and the 2.7µA current
source (IDELAY) starts to charge CFB slowly up. In this
condition, VFB increases until it reaches 5V, when the
switching operation is terminated, as shown in Figure
19. The shutdown delay time is the time required to
charge CFB from 2.4V to 5V with 2.7µA current source.
Figure 19. Overload Protection (OLP)
Figure 20. Abnormal Over-Current Protection
Abnormal Over-Current Protection (AOCP)
When the secondary rectifier diodes or the transformer
pin are shorted, a steep current with extremely high
di/dt can flow through the SenseFET during the LEB
time. Even though the FPS has overload protection, it is
not enough to protect the FPS in that abnormal case,
since severe current stress is imposed on the
SenseFET until OLP triggers. The FPS includes the
internal AOCP (Abnormal Over-Current Protection)
circuit shown in Figure 20. When the gate turn-on signal
is applied to the power sense, the AOCP block is
enabled and monitors the current through the sensing
resistor. The voltage across the resistor is compared
with a preset AOCP level. If the sensing resistor voltage
is greater than the AOCP level, the set signal is applied
to the latch, resulting in the shutdown of the SMPS.
Thermal Shutdown (TSD)
The SenseFET and the control IC are integrated,
making it easier to detect the temperature of the
SenseFET. When the junction temperature exceeds
approximately 135°C, thermal shutdown is activated
and the FPS is restarted after decreasing temperature
reaches 60°C.
Over-Voltage Protect i on (OVP)
In the event of a malfunction in the secondary-side
feedback circuit or an open feedback loop caused by a
soldering defect, the current through the opto-coupler
transistor becomes almost zero (refer to Figure 17).
Then, VFB climbs up in a similar manner to the overload
situation, forcing the preset maximum current to be
supplied to the SMPS until the overload protection is
activated. Because excess energy is provided to the
output, the output voltage may exceed the rated voltage
before the overload protection is activated, resulting in
the breakdown of the devices in the secondary side. To
prevent this situation, an over-voltage protection (OVP)
circuit is employed. In general, VCC is proportional to the
output voltage and the FPS uses VCC instead of directly
monitoring the output voltage. If VCC exceeds 24.5V,
OVP circuit is activated, resulting in termination of the
switching operation. To avoid undesired activation of
OVP during normal operation, VCC should be properly
designed to be below 24.5V.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 11
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Line Under-Volt age Prot ection (LUVP)
If the input voltage of the converter is lower than the
minimum operating voltage, the converter input current
increases too much, causing components failure. If the
input voltage is low, the converter should be protected.
In the FSL206MR, the LUVP circuit senses the input
voltage using the LS pin and, if this voltage is lower
than 1.5V, the LUVP signal is generated. The
comparator has 0.5V hysteresis. If the LUVP signal is
generated, the output drive block is shut down and the
output voltage feedback loop is saturated.
+
−
Figure 21. Line UVP Circuit
Soft-Start
The FSL206MR has an internal soft-start circuit that
slowly increases the feedback voltage, together with the
SenseFET current, after it starts up. The typical soft-
start time is 15ms, as shown in Figure 22, where
progressive increments of the SenseFET current are
allowed during the startup phase. The pulse width to the
power switching device is progressively increased to
establish the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps prevent transformer saturation and reduce
the stress on the secondary diode.
Figure 22. Internal Soft-Start
Burst Operation
To minimize power dissipation in standby mode, the
FPS enters burst mode. As the load decreases, the
feedback voltage decreases. As shown in Figure 23,
the device automatically enters burst mode when the
feedback voltage drops below VBURH. Switching
continues until the feedback voltage drops below VBURL.
At this point, switching stops and the output voltages
start to drop at a rate dependent on the standby current
load. This causes the feedback voltage to rise. Once it
passes VBURH, switching resumes. The feedback
voltage then falls and the process repeats. Burst mode
alternately enables and disables switching of the
SenseFET and reduces switching loss in standby mode.
Figure 23. Burst-Mode Operation
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 12
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Physical Dimensions
5.08 MAX
0.33 MIN
2.54
7.62
0.56
0.355
1.65
1.27
3.683
3.20
3.60
3.00
6.67
6.096
9.83
9.00
7.62
9.957
7.87
0.356
0.20
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BA
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M-1994
8.255
7.61
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
(0.56)
Figure 24. 8-Lead, Dual In-Line Package (DIP)
Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner
without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 13
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
Physical Dimensions (Continued)
MKT-MLSOP08ArevA
Figure 25. 8-Lead, .300" Wide, Surface Mount Package (LSOP)
Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner
without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSL206MR • Rev. 1.0.0 14
FSL206MR — Green Mode Fairchild Power Switch (FPS™)
