Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9S08SE8
Rev. 4, 4/2015
© Freescale Semiconductor, Inc., 2008-2009, 2015. All rights reserved.
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
MC9S08SE8
Features:
• 8-Bit HCS08 Central Processor Unit (CPU)
– 20 MHz HCS08 CPU (central processor unit)
– 10 MHz internal bus frequency
– HC08 instruction set with added BGND
– Support for up to 32 interrupt/reset sources
•On-Chip Memory
– Up to 8 KB of on-chip in-circuit programmable flash
memory with block protection and security options
– Up to 512 bytes of on-chip RAM
• Power-Saving Modes
– Wait plus two stops
• Clock Source Options
– Oscillator (XOSC) — Loop-control Pierce oscillator;
crystal or ceramic resonator range of 31.25 kHz to
38.4 kHz or 1 MHz to 16 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage;
supports bus frequencies from 1 MHz to 10 MHz.
• System Protection
– Optional computer operating properly (COP) reset with
option to run from independent 1 kHz internal clock
source or the bus clock
– Low voltage detection
– Illegal opcode detection with reset
– Illegal address detection with reset
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
• Peripherals
–SCI — Full duplex non-return to zero (NRZ); LIN
master extended break generation; LIN slave extended
break detection; wakeup on active edge
–ADC — 10-channel, 10-bit resolution; 2.5 μs
conversion time; automatic compare function;
1.7 mV/°C temperature sensor; internal bandgap
reference channel; runs in stop3
–TPMx — One 2-channel (TPM1) and one 1-channel
(TPM2) 16-bit timer/pulse-width modulator (TPM)
modules; selectable input capture, output compare, and
edge-aligned PWM capability on each channel; timer
module may be configured for buffered, centered PWM
(CPWM) on all channels
–KBI — 8-pin keyboard interrupt module
–RTC — Real-time counter with binary- or
decimal-based prescaler
• Input/Output
– Software selectable pullups on ports when used as inputs
– Software selectable slew rate control on ports when used
as outputs
– Software selectable drive strength on ports when used as
outputs
– Master reset pin and power-on reset (POR)
– Internal pullup on RESET, IRQ, and BKGD/MS pins to
reduce customer system cost
• Package Options
– 28-pin PDIP
– 28-pin SOIC
– 16-pin TSSOP
MC9S08SE8 Series
Covers: MC9S08SE8
MC9S08SE4
28-Pin SOIC
Case 751F
16-Pin TSSOP
Case 948F-01
28-Pin PDIP
Case 710-02
TBD
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor2
Table of Contents
1 MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3.1 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . . .6
3.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . .6
3.3 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .7
3.4 ESD Protection and Latch-Up Immunity . . . . . . . . . . . . .8
3.5 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.6 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .15
3.7 External Oscillator (XOSC) Characteristics . . . . . . . . .19
3.8 Internal Clock Source (ICS) Characteristics . . . . . . . . 20
3.9 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.10 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.10.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.10.2 TPM/MTIM Module Timing. . . . . . . . . . . . . . . . 26
3.11 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.1 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.2 Mechanical Drawings. . . . . . . . . . . . . . . . . . . . . . . . . . 28
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to: freescale.com
The following revision history table summarizes changes contained in this document.
Revision Date Description of Changes
1 10/8/2008 Initial public released.
2 1/16/2009 In Ta bl e 8 , added the Max. of S2IDD and S3IDD in 0–105 °C; changed the Max. of S2IDD and
S3IDD in 0–85 °C; changed the typical of S2IDD and S3IDD; changed the S23IDDRTI to P.
3 4/7/2009 Added |IOZTOT| in the Ta bl e 7 .
Changed VDDAD to VDDA, VSSAD to VSSA.
Updated Ta b l e 9 , Ta b l e 1 0 , Ta b l e 1 1 , and Ta bl e 1 2.
Updated Figure 13 and Figure 14.
4 4/10/2015 Updated Ta b l e 9 .
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com
Reference Manual (MC9S08SE8RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
MCU Block Diagram
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 3
1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9S08SE8 series MCUs.
Figure 1. MC9S08SE8 Series Block Diagram
USER FLASH
USER RAM
HCS08 CORE
CPU
BDC
PTB7/EXTAL
PORT B
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP LVD
PTB6/XTAL
PTB5
PTB4/TPM2CH0
PTB3/KBIP7/ADP9
PTB2/KBIP6/ADP8
VOLTAGE REGULATOR
PORT A
PTA1/KBIP1/TPM1CH1/ADP1
LOW-POWER OSCILLATOR
20 MHz INTERNAL CLOCK
SOURCE (ICS)
31.25 kHz to 38.4 kHz
1 MHz to 16 MHz
(XOSC)
VSS
VDD
ANALOG-TO-DIGITAL
CONVERTER (ADC)
10-CHANNEL, 10-BIT
PTB1/KBIP5/TxD/ADP7
PTB0/KBIP4/RxD/ADP6
PORT C
PTC7
PTC6
PTC5
PTC4
(MC9S08SE8 = 8192 BYTES)
(MC9S08SE4 = 4096 BYTES)
(MC9S08SE8 = 512 BYTES)
(MC9S08SE4 = 256 BYTES)
PTA3/KBIP3/ADP3
PTA2/KBIP2/ADP2
PTA0/KBIP0/TPM1CH0/ADP0
PTA4/BKGD/MS
PTA5/IRQ/TCLK/RESET
IRQ
pins not available on 16-pin package
PTA7/TPM1CH1/ADP5
PTA6/TPM1CH0/ADP4
PTC3
PTC2
PTC1
PTC0
VSSA/VREFL
VDDA/VREFH
BKGD/MS
IRQ
EXTAL
XTAL
VREFL
VREFH
RxD
TxD
DEBUG MODULE (DBG)
ADP9–ADP0
TCLK
TPM2CH0
1-CHANNEL TIMER/PWM
MODULE (TPM2)
KEYBOARD INTERRUPT
MODULE (KBI)
KBIP7–KBIP0
VSSA
V
DDA
Notes:
When PTA4 is configured as BKGD, pin is bi-directional.
For the 16-pin package: VSSA/VREFL and VDDA/VREFH are double bonded to VSS and VDD respectively.
INTERFACE MODULE (SCI)
SERIAL COMMUNICATIONS
TCLK
TPM1CH1–TPM1CH0
2-CHANNEL TIMER/PWM
MODULE (TPM1)
REAL-TIME COUNTER (RTC)
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Pin Assignments
Freescale Semiconductor4
2 Pin Assignments
This chapter shows the pin assignments in the packages available for the MC9S08SE8 series.
Table 1. Pin Availability by Package Pin-Count
Pin Number
(Package) <-- Lowest Priority --> Highest
28
(SOIC/PDIP)
16
(TSSOP) Port Pin Alt 1 Alt 2 Alt 3
1—PTC5
2—PTC4
3 1 PTA5 IRQ TCLK RESET
4 2 PTA4 BKGD MS
53 V
DD
6— V
DDA VREFH
7— V
SSA VREFL
84 V
SS
9 5 PTB7 EXTAL
10 6 PTB6 XTAL
11 7 PTB5
12 8 PTB4 TPM2CH0
13 — PTC3
14 — PTC2
15 — PTC1
16 — PTC0
17 9 PTB3 KBIP7 ADP9
18 10 PTB2 KBIP6 ADP8
19 11 PTB1 KBIP5 TxD ADP7
20 12 PTB0 KBIP4 RxD ADP6
21 — PTA7 TPM1CH11
1TPM1 pins can be remapped to PTA7, PTA6 and PTA1,PTA0
ADP5
22 — PTA6 TPM1CH01ADP4
23 13 PTA3 KBIP3 ADP3
24 14 PTA2 KBIP2 ADP2
25 15 PTA1 KBIP1 TPM1CH11ADP1
26 16 PTA0 KBIP0 TPM1CH01ADP0
27 — PTC7
28 — PTC6
Pin Assignments
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 5
Figure 2. MC9S08SE8 Series in 28-Pin PDIP/SOIC Package
Figure 3. MC9S08SE8 in 16-Pin TSSOP Package
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PTC0
PTC7
PTC6
PTB3/KBIP7/ADP9
PTB2/KBIP6/ADP8
PTA6/TPM1CH0/ADP4
PTA7/TPM1CH1/ADP5
PTA3/KBIP3/ADP3
PTA2/KBIP2/ADP2
PTB1/KBIP5/TxD/ADP7
PTB0/KBIP4/RxD/ADP6
PTC4
PTC3
VDD
VDDA/VREFH
VSSA/VREFL
PTB6/XTAL
PTB5
PTB4/TPM2CH0
PTC5
PTC1
PTA0/KBIP0/TPM1CH0/ADP0
PTA1/KBIP1/TPM1CH1/ADP1
PTC2
PTA4/BKGD/MS
PTA5/IRQ/TCLK/RESET
VSS
PTB7/EXTAL
Pins in bold are lost in the next lower pin count package.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PTB3/KBIP7/ADP9
PTB2/KBIP6/ADP8
PTA3/KBIP3/ADP3
PTA2/KBIP2/ADP2
PTB1/KBIP5/TxD/ADP7
PTB0/KBIP4/RxD/ADP6
VDD
PTB6/XTAL
PTB5
PTB4/TPM2CH0
PTA0/KBIP0/TPM1CH0/ADP0
PTA1/KBIP1/TPM1CH1/ADP1
PTA4/BKGD/MS
PTA5/IRQ/TCLK/RESET
VSS
PTB7/EXTAL
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor6
3 Electrical Characteristics
This chapter contains electrical and timing specifications.
3.1 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the
customer a better understanding, the following classification is used and the parameters are tagged
accordingly in the tables where appropriate:
NOTE
The classification is shown in the column labeled “C” in the parameter
tables where appropriate.
3.2 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not
guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent
damage to the device. For functional operating conditions, refer to the remaining tables in this section.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (for instance, either VSS or VDD) or the programmable
pull-up resistor associated with the pin is enabled.
Table 2. Parameter Classifications
P Those parameters are guaranteed during production testing on each individual device.
CThose parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
T
Those parameters are achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted. All values shown in the typical column are within this
category.
D Those parameters are derived mainly from simulations.
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 7
3.3 Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in
on-chip logic and voltage regulator circuits, and it is user-determined rather than being controlled by the
MCU design. To take PI/O into account in power calculations, determine the difference between actual pin
voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of unusually high
pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very small.
Table 3. Absolute Maximum Ratings
Rating Symbol Value Unit
Supply voltage VDD –0.3 to 5.8 V
Maximum current into VDD IDD 120 mA
Digital input voltage VIn –0.3 to VDD +0.3 V
Instantaneous maximum current
Single pin limit (applies to all port pins)1, 2, 3
1 Input must be current limited to the value specified. To determine the value of the required
current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp
voltages, then use the larger of the two resistance values.
2All functional non-supply pins are internally clamped to VSS and VDD.
3Power supply must maintain regulation within operating VDD range during instantaneous and
operating maximum current conditions. If positive injection current (VIn > VDD) is greater than
IDD, the injection current may flow out of VDD and could result in external power supply going
out of regulation. Ensure external VDD load will shunt current greater than maximum injection
current. This will be the greatest risk when the MCU is not consuming power. Examples are: if
no system clock is present, or if the clock rate is very low (which would reduce overall power
consumption).
ID±25 mA
Storage temperature range Tstg –55 to 150 °C
Table 4. Thermal Characteristics
Rating Symbol Value Unit
Operating temperature range (packaged)
C
V
M
TA
TL to TH
–40 to 85
–40 to 105
–40 to 125
°C
Maximum junction temperature TJM 135 °C
Thermal resistance
single-layer board
28-pin SOIC
θJA
70
°C/W28-pin PDIP 68
16-pin TSSOP 129
Thermal resistance four-layer
board
28-pin SOIC 48
°C/W28-pin PDIP 49
16-pin TSSOP 85
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor8
The average chip-junction temperature (TJ) in °C can be obtained from:
TJ = TA + (PD × θJA)Eqn. 1
Where:
TA = Ambient temperature, °C
θJA = Package thermal resistance, junction-to-ambient, °C/W
PD = Pint + PI/O
Pint = IDD × VDD, Watts — chip internal power
PI/O = Power dissipation on input and output pins — user-determined
For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ
(if PI/O is neglected) is:
PD = K ÷ (TJ + 273°C) Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD × (TA + 273°C) + θJA × (PD)2Eqn. 3
Where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving Equation 1 and Equation 2 iteratively for any value of TA.
3.4 ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
During the device qualification ESD stresses were performed for the human body model (HBM), the
machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Table 5. ESD and Latch-up Test Conditions
Model Description Symbol Value Unit
Human
body
Series resistance R1 1500 Ω
Storage capacitance C 100 pF
Number of pulses per pin — 3 —
Machine
Series resistance R1 0 Ω
Storage capacitance C 200 pF
Number of pulses per pin — 3 —
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 9
3.5 DC Characteristics
This section includes information about power supply requirements and I/O pin characteristics.
Latch-up Minimum input voltage limit — –2.5 V
Maximum input voltage limit — 7.5 V
Table 6. ESD and Latch-up Protection Characteristics
No. Rating1
1Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol Min Max Unit
1 Human body model (HBM) VHBM ±2000 — V
2 Machine model (MM) VMM ±200 — V
3 Charge device model (CDM) VCDM ±500 — V
4 Latch-up current at TA = 125 °CI
LAT ±100 — mA
Table 7. DC Characteristics
Num C Parameter Symbol Min Typical1Max Unit
1 — Operating voltage — 2.7 — 5.5 V
2P
Output high voltage — Low drive (PTxDSn = 0)
5 V, ILoad = –2 mA
3 V, ILoad = –0.6 mA
5 V, ILoad = –0.4 mA
3 V, ILoad = –0.24 mA VOH
VDD – 1.5
VDD – 1.5
VDD – 0.8
VDD – 0.8
—
—
—
—
—
—
—
—V
Output high voltage — High drive (PTxDSn = 1)
5 V, ILoad = –10 mA
3 V, ILoad = –3 mA
5 V, ILoad = –2 mA
3 V, ILoad = –0.4 mA
VDD – 1.5
VDD – 1.5
VDD – 0.8
VDD – 0.8
—
—
—
—
—
—
—
—
3P
Output low voltage — Low drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 0.6 mA
5 V, ILoad = 0.4 mA
3 V, ILoad = 0.24 mA VOL
1.5
1.5
0.8
0.8
—
—
—
—
—
—
—
—V
Output low voltage — High drive (PTxDSn = 1)
5 V, ILoad = 10 mA
3 V, ILoad = 3 mA
5 V, ILoad = 2 mA
3 V, ILoad = 0.4 mA
1.5
1.5
0.8
0.8
—
—
—
—
—
—
—
—
4P
Output high current — Max total IOH for all ports
5 V
3 V
IOHT —
—
—
—
100
60
mA
Table 5. ESD and Latch-up Test Conditions (continued)
Model Description Symbol Value Unit
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor10
5P
Output low current — Max total IOL for all ports
5 V
3 V
IOLT —
—
—
—
100
60
mA
6 P Input high voltage; all digital inputs VIH 0.65 × VDD ——
V
P Input low voltage; all digital inputs VIL — — 0.35 × VDD
7
P Input hysteresis; all digital inputs Vhys 0.06 × VDD ——mV8
9 C Input leakage current; input only pins2|IIn|— 0.1 1μA
10 P High impedance (off-state) leakage current2|IOZ|— 0.1 1μA
11 C Total leakage combined for all inputs and Hi-Z pins
— All input only and I/O2|IOZTOT|— — 2 μA
12 P Internal pullup resistors3RPU 20 45 65 kΩ
13 P Internal pulldown resistors4RPD 20 45 65 kΩ
14 D
DC injection current 5, 6, 7
VIN < VSS, VIN > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
IIC –0.2
–5
—
—
0.2
5
mA
15 C Input capacitance; all non-supply pins CIn —— 8pF
16 C RAM retention voltage VRAM 0.6 1.0 — V
17 P POR re-arm voltage8VPOR 0.9 1.4 2.0 V
18 D POR re-arm time tPOR 10 — — μs
19 P
Low-voltage detection threshold —
high range
VDD falling
VDD rising
VLVD1 3.9
4.0
4.0
4.1
4.1
4.2
V
P
Low-voltage detection threshold —
low range
VDD falling
VDD rising
VLVD0 2.48
2.54
2.56
2.62
2.64
2.70
V20
C
Low-voltage warning threshold —
high range 1
VDD falling
VDD rising
VLVW3 4.5
4.6
4.6
4.7
4.7
4.8
V21
P
Low-voltage warning threshold —
high range 0
VDD falling
VDD rising
VLVW2 4.2
4.3
4.3
4.4
4.4
4.5
V22
P
Low-voltage warning threshold
low range 1
VDD falling
VDD rising
VLVW1 2.84
2.90
2.92
2.98
3.00
3.06
V23
C
Low-voltage warning threshold —
low range 0
VDD falling
VDD rising
VLVW0 2.66
2.72
2.74
2.80
2.82
2.88
V24
Table 7. DC Characteristics (continued)
Num C Parameter Symbol Min Typical1Max Unit
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 11
25 T
Low-voltage inhibit reset/recover hysteresis
5 V
3 V
Vhys —
—
100
60
—
—
mV
26 P Bandgap voltage reference9VBG 1.18 1.20 1.21 V
1Typical values are measured at 25 °C. Characterized, not tested.
2Measured with VIn = VDD or VSS.
3Measured with VIn = VSS.
4Measured with VIn = VDD.
5All functional non-supply pins are internally clamped to VSS and VDD.
6Input must be current-limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive and negative clamp voltages, then use the larger of the two values.
7Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum
current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of
VDD and could result in external power supply going out of regulation. Ensure external VDD load will shunt current
greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power.
Examples are: if no system clock is present, or if clock rate is very low (which would reduce overall power
consumption).
8Maximum is highest voltage that POR is guaranteed.
9Factory trimmed at VDD = 5.0 V, Temp = 25 °C.
Table 7. DC Characteristics (continued)
Num C Parameter Symbol Min Typical1Max Unit
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor12
Figure 4. Typical VOL vs. IOL for High Drive Enabled Pad (VDD = 5 V)
Figure 5. Typical VOL vs. IOL for High Drive Enabled Pad (VDD = 3 V)
VOL vs IOL at VDD = 5.0 V, High Drive
0
100
200
300
400
500
600
700
11.522.53 99.51010.511
IOL/mA
VDD
/mV
-40C
0C
25C
70C
95C
125C
135C
VOL vs IOL at VDD = 3.0 V, High Drive
0
50
100
150
200
250
300
350
0.2 0.3 0.4 0.5 0.6 2 2.5 3 3.5 4
IOL/mA
VDD
/mV
-40C
0C
25C
70C
95C
125C
135C
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 13
Figure 6. Typical VOL vs. IOL for Low Drive Enabled Pad (VDD = 5 V)
Figure 7. Typical VOL vs. IOL for Low Drive Enabled Pad (VDD = 3 V)
VOL vs IOL at VDD = 5.0 V, Low Drive
0
100
200
300
400
500
600
0.2 0.3 0.4 0.5 0.6 1 1.5 2 2.5 3
IOL/mA
VDD
/mV
-40C
0C
25C
70C
95C
125C
135C
VOL vs IOL at VDD = 3.0 V, Low Drive
0
50
100
150
200
250
160 200 240 280 320 400 500 600 700 800
IOL/mA
VDD
/mV
-40C
0C
25C
70C
95C
125C
135C
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor14
Figure 8. Typical VOH vs. IOH for High Drive Enabled Pad (VDD = 5 V)
Figure 9. Typical VOH vs. IOH for High Drive Enabled Pad (VDD = 3 V)
VOH vs IOH at VDD = 5.0 V, High Drive
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
5
5.1
-1 -1.5 -2 -2.5 -3 -9 -9.5 -10 -10.5 -11
IOH/mA
VOH
/mV
-40C
0C
25C
70C
95C
125C
135C
VOH vs IOL at VDD = 3.0 V, High Drive
2.5
2.55
2.6
2.65
2.7
2.75
2.8
2.85
2.9
2.95
3
3.05
-200 -300 -400 -500 -600 -2 -2.5 -3 -3.5 -4
IOH/mA
VOH
/mV
-40C
0C
25C
70C
95C
125C
135C
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 15
Figure 10. Typical VOH vs. IOH for Low Drive Enabled Pad (VDD = 5 V)
Figure 11. Typical VOH vs. IOH for Low Drive Enabled Pad (VDD = 3 V)
3.6 Supply Current Characteristics
This section includes information about power supply current in various operating modes.
VOH vs IOH at VDD = 5.0 V, Low Drive
3.8
4
4.2
4.4
4.6
4.8
5
5.2
-200 -300 -400 -500 -600 -1 -1.5 -2 -2.5 -3
IOH/mA
VOH
/mV
-40C
0C
25C
70C
95C
125C
135C
VOH vs IOH at VDD = 3.0 V, Low Drive
2.55
2.6
2.65
2.7
2.75
2.8
2.85
2.9
2.95
3
-160 -200 -240 -280 -320 -400 -500 -600 -700 -800
IOH/mA
VOH
/mV
-40C
0C
25C
70C
95C
125C
135C
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor16
Table 8. Supply Current Characteristics
Num C Parameter Symbol VDD
(V) Typical1
1Typical values are based on characterization data at 25 °C unless otherwise stated. See Figure 12 through Figure 13 for typical
curves across voltage/temperature.
Max Unit Temp
(°C)
1C
Run supply current2 measured at
(CPU clock = 4 MHz, fBus = 2 MHz)
2All modules except ADC active, ICS configured for FBE, and does not include any dc loads on port pins.
RIDD
5 2.4 2.72 mA –40 to 125
3 2.18 2.26
2P
Run supply current2 measured at
(CPU clock = 20 MHz, fBus = 10 MHz) RIDD
5 6.35 7.29 mA –40 to 125
3 5.79 6.42
3P
Wait supply current2 measured at
fBus = 2 MHz WIDD
5 1.4 1.56 mA –40 to 125
3 1.36 1.53
4 P Stop2 mode supply current S2IDD
51.4
19
28
45.8
μA
–40 to 85
–40 to 105
–40 to 125
31.3
15
22
37.2
μA
–40 to 85
–40 to 105
–40 to 125
5 P Stop3 mode supply current S3IDD
51.61
23
43
76.1
μA
–40 to 85
–40 to 105
–40 to 125
31.44
19
38
66.4
μA
–40 to 85
–40 to 105
–40 to 125
6 P RTC adder to stop2 or stop33
3Most customers are expected to find that auto-wakeup from stop2 or stop3 can be used instead of the higher current wait
mode. Wait mode typical is 220 μA at 5 V with fBus = 1 MHz.
S23IDDRTI
5300500
500 nA –40 to 85
–40 to 125
3300500
500 nA –40 to 85
–40 to 125
7 C LVD adder to stop3 (LVDE = LVDSE = 1) S3IDDLVD
5122180μA –40 to 125
3110160μA –40 to 125
8C
Adder to stop3 for oscillator enabled4
(OSCSTEN =1)
4Values given under the following conditions: low range operation (RANGE = 0) with a 32.768 kHz crystal and low power mode
(HGO = 0).
S3IDDOSC 5,3 5 8 μA –40 to 125
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 17
Figure 12. Typical Run IDD Curves
Figure 13. Typical Stop2 IDD Curves
Run IDD at 10 MHz vs Temp
0
1
2
3
4
5
6
7
8
-40C 0C 25C 70C 95C 125C 135C
Temp (C)
RIDD (mA)
5.5V
5.0V
4.5V
3.3V
3.0V
2.7V
Stop2 IDD vs Temp
0
2
4
6
8
10
12
14
16
18
20
-40C 0C 25C 70C 95C 125C 135C
Temp (C)
S2IDD (uA)
5.5V
5.0V
4.5V
3.3V
3.0V
2.7V
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor18
Figure 14. Typical Stop3 IDD Curves
3.7 External Oscillator (XOSC) Characteristics
Table 9. Oscillator electrical specifications (Temperature Range = –40 to 125°C Ambient)
Num C Characteristic Symbol Min. Typical1Max. Unit
1C
Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1)
Low range (RANGE = 0)
High range (RANGE = 1), high gain (HGO = 1)2
High range (RANGE = 1), low power (HGO = 0)2
flo
fhi-hgo
fhi-lp
32
1
1
—
—
—
38.4
16
8
kHz
MHz
MHz
2 — Load capacitors C1,C2See crystal or resonator
manufacturer’s recommendation
3—Feedback resistor
Low range (32 kHz to 100 kHz)
High range (1 MHz to 16 MHz)
RF—
—
10
1
—
—
MΩ
4
—
Series resistor
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0) RS
—
—
—
0
100
0
—
—
—
kΩ
High range, high gain (RANGE = 1, HGO = 1)
≥ 8 MHz
4 MHz
1 MHz
—
—
—
0
0
0
0
10
20
Stop3 IDD vs Temp
0
5
10
15
20
25
30
35
-40C 0C 25C 70C 95C 125C 135C
Temp (C)
S3IDD (uA)
5.5V
5.0V
4.5V
3.3V
3.0V
2.7V
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 19
Figure 15. Typical Crystal or Resonator Circuit: High Range and Low Range/High Gain
Figure 16. Typical Crystal or Resonator Circuit: Low Range/Low Power
5T
Crystal start-up time3
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0)4
High range, high gain (RANGE = 1, HGO = 1)4
tCSTL-LP
tCSTH-HGO
tCSTH-LP
tCSTH-HGO
—
—
—
—
200
400
5
15
—
—
—
—
ms
6T
Square wave input clock frequency (EREFS = 0, ERCLKEN = 1)
FEE or FBE mode 2
FBELP mode
fextal 0.03125
0
—
—
20
20
MHz
MHz
1Typical column was characterized at 5.0 V, 25 °C or is recommended value.
2The input clock source must be divided using RDIV to within the range of 31.25 kHz to 39.0625 kHz.
3This parameter is characterized and not tested on each device. Proper PC board layout procedures must be followed to achieve
specifications. This data will vary based upon the crystal manufacturer and board design. The crystal should be characterized
by the crystal manufacturer.
44 MHz crystal.
Table 9. Oscillator electrical specifications (Temperature Range = –40 to 125°C Ambient)
Num C Characteristic Symbol Min. Typical1Max. Unit
XOSCVLP
EXTAL XTAL
Crystal or Resonator
R
S
C2
RF
C1
XOSCVLP
EXTAL XTAL
Crystal or Resonator
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor20
3.8 Internal Clock Source (ICS) Characteristics
Table 10. ICS Frequency Specifications (Temperature Range = –40 to 85°C Ambient)
Num C Characteristic Symbol Min. Typical1
1Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value.
Max. Unit
1P
Average internal reference frequency — factory trimmed
at VDD = 5 V and temperature = 25 °Cfint_t — 39.0625 — kHz
2P
Internal reference frequency — user trimmed fint_ut 31.25 — 39.06 kHz
3T
Internal reference start-up time tIRST — 60 100 μs
4D
DCO output frequency range —
trimmed2
2The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.
Low range
(DRS = 00) fdco_t 16 — 20 MHz
5D
DCO output frequency2
Reference = 32768 Hz and DMX32 = 1 fdco_DMX32 — 59.77 — MHz
6C
Resolution of trimmed DCO output frequency at fixed
voltage and temperature (using FTRIM) Δfdco_res_t —±0.1 ±0.2 %fdco
7C
Resolution of trimmed DCO output frequency at fixed
voltage and temperature (not using FTRIM) Δfdco_res_t —± 0.2 ± 0.4 %fdco
8C
Total deviation of DCO output from trimmed frequency3
Over full voltage and temperature range
Over fixed voltage and temperature range of 0 to 70 °C
3This parameter is characterized and not tested on each device.
Δfdco_t —–1.0 to 0.5
±0.5
± 2
± 1
%fdco
10 C FLL acquisition time4
4This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or
changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used
as the reference, this specification assumes it is already running.
tAcquire —— 1ms
11 C Long term jitter of DCO output clock (averaged over 2-ms
interval)5
5Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage
for a given interval.
CJitter —0.020.2
%fdco
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 21
Figure 17. Deviation of DCO Output from Trimmed Frequency (20 MHz, 3.0 V)
3.9 ADC Characteristics
Table 11. 10-Bit ADC Operating Conditions
Characteristic Conditions Symb Min Typ1Max Unit Comment
Supply voltage
Absolute VDDA 2.7 — 5.5 V
Delta to VDD (VDD – VDDA)2ΔVDDA –100 0 100 mV
Ground voltage Delta to VSS (VSS – VSSA)2ΔVSSA –100 0 100 mV
Input voltage VADIN VREFL —V
REFH V
Input capacitance CADIN —4.55.5pF
Input resistance RADIN —3 5kΩ
Analog source
resistance
10-bit mode
fADCK > 4MHz
fADCK < 4MHz RAS
—
—
—
—
5
10 kΩExternal to
MCU
8-bit mode (all valid fADCK)——10
ADC conversion
clock frequency
High speed (ADLPC = 0)
fADCK
0.4 — 8.0
MHz
Low power (ADLPC = 1) 0.4 — 4.0
-2.00%
-1.50%
-1.00%
-0.50%
0.00%
0.50%
1.00%
-60 -40 -20 0 20 40 60 80 100 120
Temperature
Deviation (%)
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor22
Figure 18. ADC Input Impedance Equivalency Diagram
1Typical values assume VDDA = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2DC potential difference.
Table 12. 10-Bit ADC Characteristics (VREFH = VDDA, VREFL = VSSA)
Characteristic Conditions C Symb Min Typ1Max Unit Comment
Supply Current
ADLPC = 1
ADLSMP = 1
ADCO = 1
TI
DDA — 133 — μA
Supply Current
ADLPC = 1
ADLSMP = 0
ADCO = 1
TI
DDA — 218 — μA
Supply Current
ADLPC = 0
ADLSMP = 1
ADCO = 1
TI
DDA — 327 — μA
Supply Current
ADLPC = 0
ADLSMP = 0
ADCO = 1
DI
DDA —0.582 1 mA
Supply Current Stop, Reset, Module Off D IDDA —0.011 1 μA
+
–
+
–
V
AS
R
AS
C
AS
V
ADIN
Z
AS
Pad
leakage
due to
input
protection
Z
ADIN
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
R
ADIN
ADC SAR
ENGINE
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
INPUT PIN
R
ADIN
C
ADIN
INPUT PIN
R
ADIN
INPUT PIN
R
ADIN
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 23
ADC
Asynchronous
Clock Source
High Speed (ADLPC = 0)
Df
ADACK
23.35
MHz tADACK =
1/fADACK
Low Power (ADLPC = 1) 1.25 2 3.3
Conversion
Time (Including
sample time)
Short Sample (ADLSMP =
0) Dt
ADC
—20—
ADCK
cycles See SE8
reference
manual for
conversion
time variances
Long Sample (ADLSMP = 1) — 40 —
Sample Time
Short Sample (ADLSMP =
0) Dt
ADS
—3.5—
ADCK
cycles
Long Sample (ADLSMP = 1) — 23.5 —
Temp Sensor
Slope
–40°C– 25°C
Dm
—3.266—
mV/°C
25°C– 125°C — 3.638 —
Temp Sensor
Voltage 25°CDV
TEMP25 —1.396— mV
Characteristics for 28-pin packages only
Tot al
Unadjusted
Error
10-bit mode P
ETUE
—±1±2.5
LSB3Includes
quantization
8-bit mode P — ±0.5 ±1.0
Differential
Non-Linearity
10-bit mode2P
DNL
—±0.5 ±1.0
LSB3
8-bit mode3P—±0.3 ±0.5
Integral
Non-Linearity
10-bit mode T
INL
—±0.5 ±1.0
LSB3
8-bit mode T — ±0.3 ±0.5
Zero-Scale
Error
10-bit mode P
EZS
—±0.5 ±1.5
LSB3VADIN = VSSA
8-bit mode P — ±0.5 ±0.5
Full-Scale
Error
10-bit mode T
EFS
—±0.5 ±1
LSB3VADIN = VDDA
8-bit mode T — ±0.5 ±0.5
Quantization
Error
10-bit mode
DE
Q
——±0.5
LSB3
8-bit mode — — ±0.5
Input Leakage
Error
10-bit mode
DE
IL
—±0.2 ±2.5
LSB3Pad leakage4 *
RAS
8-bit mode — ±0.1 ±1
Characteristics for 16-pin package only
Tot al
Unadjusted
Error
10-bit mode P
ETUE
—±1.5 ±3.5
LSB3Includes
quantization
8-bit mode P — ±0.7 ±1.5
Table 12. 10-Bit ADC Characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Characteristic Conditions C Symb Min Typ1Max Unit Comment
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor24
Differential
Non-Linearity
10-bit mode3P
DNL
—±0.5 ±1.0
LSB3
8-bit mode3P—±0.3 ±0.5
Integral
Non-Linearity
10-bit mode T
INL
—±0.5 ±1.0
LSB3
8-bit mode T — ±0.3 ±0.5
Zero-Scale
Error
10-bit mode P
EZS
—±1.5 ±2.1
LSB3VADIN = VSSA
8-bit mode P — ±0.5 ±0.7
Full-Scale
Error
10-bit mode T
EFS
—±1±1.5
LSB3VADIN = VDDA
8-bit mode T — ±0.5 ±0.5
Quantization
Error
10-bit mode
DE
Q
——±0.5
LSB3
8-bit mode — — ±0.5
Input Leakage
Error
10-bit mode
DE
IL
—±0.2 ±2.5
LSB3Pad leakage4 *
RAS
8-bit mode — ±0.1 ±1
1Typical values assume VDDA = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference
only and are not tested in production.
2Monotonicity and No-Missing-Codes guaranteed in 10-bit and 8-bit modes
31 LSB =(VREFH – VREFL)/2N
4Based on input pad leakage current. Refer to pad electricals.
Table 12. 10-Bit ADC Characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Characteristic Conditions C Symb Min Typ1Max Unit Comment
Electrical Characteristics
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 25
3.10 AC Characteristics
This section describes ac timing characteristics for each peripheral system.
3.10.1 Control Timing
Figure 19. Reset Timing
Table 13. Control Timing
Num C Rating Symbol Min Typical1
1Typical values are based on characterization data at VDD = 5.0 V, 25 °C unless otherwise stated.
Max Unit
1 D Bus frequency (tcyc = 1/fBus)f
Bus DC — 10 MHz
2 D Internal low power oscillator period tLPO 700 — 1300 μs
3 D External reset pulse width2
2This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to
override reset requests from internal sources.
textrst 100 — — ns
4 D Reset low drive3
3When any reset is initiated, internal circuitry drives the reset pin (if enabled, RSTPE = 1) low for about 34 cycles of tcyc.
trstdrv 34 × tcyc ——ns
5D
BKGD/MS setup time after issuing background
debug force reset to enter user or BDM modes tMSSU 500 — — ns
6D
BKGD/MS hold time after issuing background debug
force reset to enter user or BDM modes4
4To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of tMSH after VDD
rises above VLVD.
tMSH 100 — — μs
7D
IRQ pulse width
Asynchronous path2
Synchronous path5
5This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
tILIH, tIHIL
100
1.5 × tcyc
——
ns
8D
Pin interrupt pulse width
Asynchronous path2
Synchronous path5tILIH, tIHIL
100
1.5 × tcyc
——
ns
9C
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)6
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
6Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40 °C to 125 °C.
tRise, tFall —40
75
—ns
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
tRise, tFall —11
35
—ns
textrst
RESET PIN
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor26
Figure 20. IRQ/Pin Interrupt Timing
3.10.2 TPM/MTIM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that
can be used as the optional external source to the timer counter. These synchronizers operate from the
current bus rate clock.
Figure 21. Timer External Clock
Figure 22. Timer Input Capture Pulse
Table 14. TPM Input Timing
Num C Rating Symbol Min Max Unit
1 D External clock frequency fTPMext DC fBus/4 MHz
2 D External clock period tTPMext 4—t
cyc
3 D External clock high time tclkh 1.5 — tcyc
4 D External clock low time tclkl 1.5 — tcyc
5 D Input capture pulse width tICPW 1.5 — tcyc
tIHIL
IRQ/Pin Interrupts
tILIH
IRQ/Pin Interrupts
tTCLK
tclkh
tclkl
TCLK
tICPW
TPMCHn
tICPW
TPMCHn
Ordering Information
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 27
3.11 Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash
memory.
Program and erase operations do not require any special power sources other than the normal VDD supply.
For more detailed information about program/erase operations, see the Memory section in the reference
manual.
4 Ordering Information
This chapter contains ordering information for the device numbering system.
Example of the device numbering system:
Table 15. Flash Characteristics
Num C Characteristic Symbol Min Typical Max Unit
1 D Supply voltage for program/erase Vprog/erase 2.7 — 5.5 V
2 D Supply voltage for read operation VRead 2.7 — 5.5 V
3 D Internal FCLK frequency1
1 The frequency of this clock is controlled by a software setting.
fFCLK 150 — 200 kHz
4D Internal FCLK period (1/FCLK) tFcyc 5 — 6.67 μs
5 P Byte program time (random location)2
2These values are hardware state machine controlled. User code does not need to count cycles. This information supplied for
calculating approximate time to program and erase.
tprog 9t
Fcyc
6 P Byte program time (burst mode)2tBurst 4t
Fcyc
7 P Page erase time2tPage 4000 tFcyc
8 P Mass erase time2tMass 20,000 tFcyc
9C
Program/erase endurance3
TL to TH = –40 °C to 125 °C
T = 25 °C
3Typical endurance for flash was evaluated for this product family on the 9S12Dx64. For additional information on how
Freescale defines typical endurance, please refer to Engineering Bulletin EB619/D, Typical Endurance for Nonvolatile
Memory.
nFLPE 10,000 —
100,000
— cycles
10 C Data retention4
4Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25 °C using the Arrhenius equation. For additional information on how Freescale defines typical data retention, please refer
to Engineering Bulletin EB618/D, Typical Data Retention for Nonvolatile Memory.
tD_ret 15 100 — years
MC
Temperature range
Family
Memory
Status
Core
(C = –40 °C to 85 °C)
(9 = Flash-based)
E9 S08 SE XX
RoHS compliance indicator (E = yes)
(MC = Fully Qualified)
C
Package designator (see Ta bl e 1 6 )
8
Memory Size (in KB)
(V = –40 °C to 105 °C)
(M = –40 °C to 125 °C)
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Ordering Information
Freescale Semiconductor28
4.1 Package Information
4.2 Mechanical Drawings
The following pages are mechanical drawings for the packages described in Table 16.
Table 16. Package Descriptions
Pin Count Package Type Abbreviation Designator Case No. Document No.
28 Plastic Dual In-line Pin PDIP RL 710 98ASB42390B
28 Small Outline Integrated Circuit SOIC WL 751F 98ASB42345B
16 Thin Shrink Small Outline Package TSSOP TG 948F 98ASH70247A
Ordering Information
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 29
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Ordering Information
Freescale Semiconductor30
Ordering Information
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 31
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Ordering Information
Freescale Semiconductor32
Ordering Information
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor 33
MC9S08SE8 Series MCU Data Sheet, Rev. 4
Ordering Information
Freescale Semiconductor34
Document Number: MC9S08SE8
Rev. 4
4/2015
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