MCP73842-820IUN - Microchip Technology, Inc.

 2004 Microchip Technology Inc. DS21823C-page 1

MCP73841/2/3/4

Features

• Linear Charge Management Controllers

• High-Accuracy Preset Voltage Regulation:

0.5% (max)

• Four Preset Voltage Regulation Options:

- 4.1V - MCP73841-4.1, MCP73843-4.1

- 4.2V - MCP73841-4.2, MCP73843-4.2

- 8.2V - MCP73842-8.2, MCP73844-8.2

- 8.4V - MCP73842-8.4, MCP73844-8.4

• Programmable Charge Current

• Programmable Safety Charge Timers

• Preconditioning of Deeply Depleted Cells

• Automatic End-of-Charge Control

• Optional Continuous Cell Temperature

Monitoring (MCP73841 and MCP73842)

• Charge Status Output for Direct LED Drive

• Automatic Power-Down when Input Power

Removed

• Temperature Range: -40°C to 85°C

• Packaging: MSOP-10 - MCP73841, MCP73842

MSOP-8 - MCP73843, MCP73844

Applications

• Lithium-Ion/Lithium-Polymer Battery Chargers

• Per sonal Data Assistants

• Cellu lar Telephon es

• Hand-Held Instruments

• Cradle Chargers

•Digital Cameras

• MP3 Players

Typical Application Circuit

Description

The MCP7384X family of devices are highly advanced

linear charge management controllers for use in

space-limited, cost-sensitive applications. The

MCP73841 and MCP73842 combine high accuracy,

constant-volt age, constant-current regulation, cell pre-

conditioning, cell temperature monitoring, advanced

safety timers, automatic charge termination and

charge status indication in space-saving, 10-pin

MSOP packages. The MCP73841 and MCP73842

provide complete, fully-functional, stand-alone charge

management solutions.

The MCP73843 and MCP73844 employ all the

features of the MCP73841 and MCP73842, with the

exception of the cell temperature monitor. The

MCP73843 and MCP73 844 are of fe red in 8-pin MSOP

packages.

The MCP73841 and MCP73843 are designed for

applications utilizing single-cell Lithium-Ion or Lithium-

Polymer battery packs. Two preset voltage regulation

options are available (4.1V and 4.2V) f or use with either

coke or graphite anodes. The MCP73841 and

MCP738 43 operate wi th an input volt age range of 4.5V

to 12V.

The MCP73842 and MCP73844 are designed for

applications utilizing dual series cell Lithium-Ion or

Lithium-Polymer battery packs. Two preset voltage

regulation options are available (8.2V and 8.4V). The

MCP73842 and MCP73844 operate with an input

voltage range of 8.7V to 12V.

The MCP7384X family of devices are fully specified

over the amb ient temperature rang e of -40°C to +8 5°C.

Package Types

VSS

DRV

SENSE

VDD VBAT

STAT1

MCP73843

10 µF

100 kΩ

100 mΩ

5V Single

Lithium-Ion

Cell

NDS8434

MA2Q705

1A Lithium-Ion Battery Charger

EN 5

TIMER

40.1 µF

10-Pin MSOP

SENSE

VDD

STAT1

DRV

VBAT

VSS

TIMER

MCP73843

MCP73844

8-Pin MSOP

VDD

STAT1

THREF

VBAT

VSS

TIMER

THERM

MCP73841

MCP73842

SENSE DRV

110

Advanced Single or Dual Cell Lithium-Ion/

Lithium-Polymer Charge Management Controllers

MCP73841/2/3/4

DS21823C-page 2  2004 Microchip Technology Inc.

Functional Block Diagram

Charge

Termination

Comparator

Voltage Control

Amplifier

VREF

IREG/10 Precondition

Control Charge_ok

Precon

VDD

Charge Current

Control Amplifier

–

VREF

Precondition

Comp.

VBAT

VSS

DRV

90 kΩ

10 kΩ

–

Charge

Current

Amplifier

VDD

SENSE

MCP 73841 and MCP73842 Only

300 kΩ

(825 kΩ)

12 kΩ

1kΩ

UVLO

Comparator

VUVLO

Temperature

Comparators

Bias and

Reference

Generator

VUVLO

VREF (1.2V)

Power-On

Delay VREF

Oscillator

Constant-Voltage/

Recharge Comp.

Charge Control,

Charge Timers,

And

Status Logic

Drv Stat 1

Charge_ok

IREG/10

THERM

TIMER

STAT1

THREF

100 kΩ

50 kΩ

74.21 kΩ

0.79 kΩ

150.02 kΩ

5.15 kΩ

(4.29 kΩ)

 2004 Microchip Technology Inc. DS21823C-page 3

MCP73841/2/3/4

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

VDD.................................................................................13.5V

All inputs and outputs w.r.t. VSS ................ -0.3 to (VDD+0.3)V

Current at DRV Pin ......................................................±4 m A

Current at STAT1 Pin .................................................±30 mA

Maximum Junction Temperature, TJ.............................150°C

Storage temperature ............... .. .. .. .. ..... .... .. .. .-65°C to +150°C

ESD protection on all pins:

Human Body Model (1.5 kΩ in Series with 100 pF).......≥ 2kV

Machine Model (200 pF, No Series Resistance).............200V

*Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied. Expo-

sure to max imum rati ng conditions for extended periods may

affect device reliability.

DC CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(Typ)+0.3V] to 12V, TA = -40°C to +85°C.

Typical values are at +25°C, VDD = [VREG(Typ) + 1V].

Parameters Sym Min Typ Max Units Conditions

Supply Input

Supply Voltage VDD

MCP73841, MCP73843 4.5 – 12 V

MCP73842, MCP73844 8.7 – 12 V

Supply Current ISS –

–0.25

0.75 4

4µA

mA Disabled

Operating

VDD =VREG(Typ)+1V

UVLO Start Threshold VSTART

MCP73841, MCP73843 4.25 4.45 4.60 V VDD Low-to-High

MCP73842, MCP73844 8.45 8.65 8.90 V VDD Low-to-High

UVLO Stop Threshold VSTOP

MCP73841, MCP73843 4.20 4.40 4.55 V VDD High-to-Low

MCP73842, MCP73844 8.40 8.60 8.85 V VDD High-to-Low

Voltage Regulation (Constant-Voltage Mode)

Regulated Output Voltage VREG

MCP73841-4.1,

MCP73843-4.1 4.079 4.1 4.121 V VDD = [VREG(T yp)+1V], IOUT = 10 mA,

TA = -5°C to +55°C

MCP73841-4.2,

MCP73843-4.2 4.179 4.2 4.221 V VDD = [VREG(T yp)+1V], IOUT = 10 mA,

TA = -5°C to +55°C

MCP73842-8.2,

MCP73844-8.2 8.159 8.2 8.241 V VDD = [VREG(T yp)+1V], IOUT = 10 mA,

TA = -5°C to +55°C

MCP73842-8.4,

MCP73844-8.4 8.358 8.4 8.442 V VDD = [VREG(T yp)+1V], IOUT = 10 mA,

TA = -5°C to +55°C

Line Regulation |(∆VBAT/

VBAT)|/∆VDD

– 0.025 0.25 %/V VDD = [VREG(Typ)+1V] to 12V,

IOUT = 10 mA

Load Regulation |∆VBAT|/VBAT – 0.01 0.25 % IOUT = 10 mA to 150 mA,

VDD = [VREG(Typ)+1V]

Supply Ripple Attenuation PSRR – -58 – dB IOUT = 10 mA, 100 Hz

–-42– dBI

OUT = 10 mA, 1 kHz

–-30– dBI

OUT = 10 mA , 10 kHz

Output Reverse Leakage

Current IDISCHARGE –0.41 µAV

DD Floating, VBAT = VREG(Typ)

Current Regulation (Fast Charge Constant-Current Mode)

Fast Charge Current

Regulation Threshold VFCS 100 110 120 mV VDD – VSENSE,

TA = -5 °C to +55°C

MCP73841/2/3/4

DS21823C-page 4  2004 Microchip Technology Inc.

Preconditioning Current Regulation (Trickle Charge Constant-Current Mode)

Precondition Current

Regulation Threshold VPCS 51015mVV

DD – VSENSE,

TA = -5 °C to +55°C

Precondition Threshold Voltage VPTH

MCP73841-4.1,

MCP73843-4.1 2.70 2.80 2.90 V VBAT Low-to-High

MCP73841-4.2,

MCP73843-4.2 2.75 2.85 2.95 V VBAT Low-to-High

MCP73842-8.2,

MCP73844-8.2 5.40 5.60 5.80 V VBAT Low-to-High

MCP73842-8.4,

MCP73844-8.4 5.50 5.70 5.90 V VBAT Low-to-High

Charge Termination

Charge Termination Threshold VTCS 4710mVV

DD – VSENSE,

TA = -5°C to +55°C

Automatic Recharge

Recharge Threshold Voltage VRTH

MCP73841,

MCP73843 VREG-

300 mV VREG-

200 mV VREG-

100 mV VV

BAT High-to-Low

MCP73842,

MCP73844 VREG-

600 mV VREG-

400 mV VREG-

200 mV VV

BAT High-to-Low

External MOSFET Gate Drive

Gate Drive Current IDRV – 2 – mA Sink, CV Mode

– -0.5 – m A Source, CV Mode

Gate Drive Minimum Voltage VDRVMIN ––1.0VV

DD = 4.5V

Gate - Source Clamp Voltage VGS -7.0 – -4.5 V VDD = 12.0V

Thermistor Reference - MCP73841, MCP73842

Thermistor Reference Output

Voltage VTHREF 2.475 2.55 2.625 V TA = +25°C, VDD = VREG(Typ)+1V,

ITHREF = 0 mA

Temperature Coefficient TCTHREF –+50 – ppm/°C

Thermistor Reference Sourc e

Current ITHREF 200 – – µA

Thermistor Reference Line

Regulation |(∆VTHREF/

VTHREF)|/

∆VDD

– 0.1 0.25 %/V VDD=[VREG(Typ)+1V] to 12V

Thermistor Reference Load

Regulation ∆VTHREF/

VTHREF

– 0.01 0.10 % ITHREF = 0 mA to 0.20 mA

Thermistor Comparator - MCP73841, MCP73842

Upper Trip Threshold VT1 1.18 1.25 1.32 V

Upper Trip Point Hysteresis VT1HYS –-50– mV

Lower Trip Threshold VT2 0.59 0.62 0.66 V

Lower Trip Point Hysteresis VT2HYS –80–mV

Input Bias Current |IBIAS|––2µA

Status Indicator

Sink Current ISINK 4712mA

Low Output Voltage VOL – 200 400 mV ISINK = 1 mA

Input Leakage Current ILK –0.011 µAI

SINK = 0 mA, VSTAT1 = 12V

DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(Typ)+0.3V] to 12V, TA = -40°C to +85°C.

Typical values are at +25°C, VDD = [VREG(Typ) + 1V].

Parameters Sym Min Typ Max Units Conditions

 2004 Microchip Technology Inc. DS21823C-page 5

MCP73841/2/3/4

AC CHARACTERISTICS

TEMPERATURE SPECIFICATIONS

Enab le In p ut

Input High-Voltage Level VIH 1.4 - – V

Input Low-Voltage Level VIL –-0.8V

Input Leakage Current ILK –0.011 µAV

ENABLE = 12V

Electrical Specifications: Unless otherwise indicated, all limits apply f or VDD= [VREG(T yp)+0.3V] to 12V, T A = -40°C to +85°C. Typ-

ical values are at +25°C, VDD= [VREG(Typ)+1V].

Parameters Sym Min Typ Max Units Conditions

UVLO Start Delay tSTART ––5msecV

DD Low-to-High

Current Regulation

Transition T ime Out of

Preconditioning tDELAY ––1msecV

BAT< VPTH to VBAT > VPTH

Current Rise Time Out of

Preconditioning tRISE ––1msecI

OUT Rising to 90% of IREG

Fast Charge Safety Timer Period tFAST 1.1 1.5 1.9 Hours CTIMER = 0.1 µF

Preconditioning Current Regulation

Preconditioning Charge Safety

Timer Period tPRECON 45 60 75 Minutes CTIMER = 0.1 µF

Charge Termination

Elapsed T ime Termination Period tTERM 2.2 3.0 3.8 Hours CTIMER = 0.1 µF

Status Indicators

Stat us Output turn-off tOFF – – 200 µsec ISINK = 10 m A to 0 mA

Stat us Output turn-on tON – – 200 µsec ISINK = 0 mA to 1 0 mA

Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typ)+0.3V] to 12V.

Typical values are at +25°C, VDD= [VREG(Typ)+1.0V].

Parameters Sym Min Typ Max Units Conditions

Temperature Ranges

Specified Temperature Range TA-40 +85 °C

Operating Temperature Range TA-40 +125 °C

Storage Temperature Range T A-65 +150 °C

Thermal Package Resistances

Thermal Resistance, MSOP-10 θJA 113 °C/W 4-Layer JC51-7 Standard Board,

Natural Convection

Thermal Resistance, MSOP-8 θJA 206 °C/W Single-Layer SEMI G42-88 Board,

Natural Convection

DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(Typ)+0.3V] to 12V, TA = -40°C to +85°C.

Typical values are at +25°C, VDD = [VREG(Typ) + 1V].

Parameters Sym Min Typ Max Units Conditions

MCP73841/2/3/4

DS21823C-page 6  2004 Microchip Technology Inc.

2.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C.

FIGURE 2-1: Battery Regulation Voltage

(VBAT) vs. Charge Current (IOUT).

FIGURE 2-2: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-3: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-4: Supply Current (ISS) vs.

Charge Cur rent (IOUT).

FIGURE 2-5: Supply Current (ISS) vs.

Supply Voltage (VDD).

FIGURE 2-6: Supply Current (ISS) vs.

Supply Voltage (VDD).

Note: The g r ap hs and t ables prov id ed fol low i ng thi s n ote are a st atistic al s umm ar y based on a l im ite d number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

4.196

4.197

4.198

4.199

4.200

4.201

4.202

4.203

10 100 1000

IOUT (mA)

VBAT (V)

+55°C

+25°C

-5°C

MCP73841-4.2V

VDD = 5.2 V

4.196

4.197

4.198

4.199

4.200

4.201

4.202

4.203

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

VBAT (V)

+55°C

+25°C

-5°C

MCP73841-4.2V

IOUT = 1000 mA

4.196

4.197

4.198

4.199

4.200

4.201

4.202

4.203

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

VBAT (V)

MCP73841-4.2V

IOUT = 10 mA

+55°C

+25°C

-5°C

0.00

0.20

0.40

0.60

0.80

1.00

1.20

1.40

10 100 1000

IOUT (mA)

ISS (mA)

+25°C

+85°C

-45°C

MCP73841-4.2V

VDD = 5.2 V

0.00

0.20

0.40

0.60

0.80

1.00

1.20

1.40

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

ISS (mA)

+25°C

+85°C

-45°C

MCP73841-4.2V

IOUT = 1000 mA

0.00

0.20

0.40

0.60

0.80

1.00

1.20

1.40

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

ISS (mA)

MCP73841-4.2V

IOUT = 10 mA

-45°C

+25°C

+85°C

 2004 Microchip Technology Inc. DS21823C-page 7

MCP73841/2/3/4

Note: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C.

FIGURE 2-7: Battery Regulation Voltage

(VBAT) vs. Charge Current (IOUT).

FIGURE 2-8: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-9: Battery Regulation Voltage

(VBAT) vs. Supply Voltage (VDD).

FIGURE 2-10: Supply Current (ISS) vs.

Charge Cur rent (IOUT).

FIGURE 2-11: Supply Current (ISS) vs.

Supply Voltage (VDD).

FIGURE 2-12: Supply Current (ISS) vs.

Supply Voltage (VDD).

8.390

8.392

8.394

8.396

8.398

8.400

8.402

8.404

8.406

8.408

10 100 1000

IOUT (mA)

VBAT (V)

+55°C

+25°C

-5°C

MCP73842-8.4V

VDD = 9.4 V

8.390

8.392

8.394

8.396

8.398

8.400

8.402

8.404

8.406

8.408

8.8 9.2 9.6 10 10.4 10.8 11.2 11.6 12

VDD (V)

VBAT (V)

+55°C

+25°C

-5°C

MCP73842-8.4V

IOUT = 1000 mA

8.390

8.392

8.394

8.396

8.398

8.400

8.402

8.404

8.406

8.408

8.8 9.2 9.6 10.0 10.4 10.8 11.2 11.6 12.0

VDD (V)

VBAT (V)

MCP73842-8.4V

IOUT = 10 mA +55°C

+25°C

-5°C

0.00

0.20

0.40

0.60

0.80

1.00

1.20

1.40

10 100 1000

IOUT (mA)

ISS (mA)

+25°C+85°C

-45°C

MCP73842-8.4V

VDD = 9.4 V

0.00

0.20

0.40

0.60

0.80

1.00

1.20

1.40

8.8 9.2 9.6 10.0 10.4 10.8 11.2 11.6 12.0

VDD (V)

ISS (mA)

+25°C

+85°C

-45°C

MCP73842-8.4V

IOUT = 1000 mA

0.00

0.20

0.40

0.60

0.80

1.00

1.20

1.40

8.8 9.2 9.6 10.0 10.4 10.8 11.2 11.6 12.0

VDD (V)

ISS (mA)

MCP73842-8.4V

IOUT = 10 mA

-45°C

+25°C

+85°C

MCP73841/2/3/4

DS21823C-page 8  2004 Microchip Technology Inc.

Note: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C.

FIGURE 2-13: Output Reverse Leakage

Current (IDISCHARGE) vs. Battery Voltage (VBAT).

FIGURE 2-14: Thermistor Reference

Voltage (VTHREF) vs. Thermistor Bias Current

(ITHREF).

FIGURE 2-15: Thermistor Reference

Voltage (VTHREF) vs. Supply Voltage (VDD).

FIGURE 2-16: Output Reverse Leakage

Current (IDISCHARGE) vs. Battery Voltage (VBAT).

FIGURE 2-17: Thermistor Reference

Voltage (VTHREF) vs. Thermistor Bias Current

(ITHREF).

FIGURE 2-18: Thermistor Reference

Voltage (VTHREF) vs. Supply Voltage (VDD).

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2

VBAT (V)

IDISCHARGE (µA)

+25°C

+85°C

-45°C

MCP73841-4.2V

VDD = Float

2.540

2.542

2.544

2.546

2.548

2.550

2.552

2.554

2.556

2.558

2.560

0 25 50 75 100 125 150 175 200

ITHREF (µA)

VTHREF (V)

+85°C

+25°C

-45°C

MCP73841-4.2V

VDD = 5.2 V

2.540

2.544

2.548

2.552

2.556

2.560

2.564

2.568

4.5 6.0 7.5 9.0 10.5 12.0

VDD (V)

VTHREF (V)

+85°C

+25°C

-45°C

MCP73841-4.2V

ITHREF = 100 µA

0.00

0.10

0.20

0.30

0.40

0.50

0.60

0.70

0.80

0.90

4.0 4.4 4.8 5.2 5.6 6.0 6.4 6.8 7.2 7.6 8.0 8.4

VBAT (V)

IDISCHARGE (µA)

MCP73842-8.4V

VDD = Float

-45°C

+25°C

+85°C

2.540

2.542

2.544

2.546

2.548

2.550

2.552

2.554

2.556

2.558

2.560

0 25 50 75 100 125 150 175 200

ITHREF (µA)

VTHREF (V)

+25°C

+85°C

-45°C

MCP73842-8.4V

VDD = 9.4 V

2.540

2.544

2.548

2.552

2.556

2.560

2.564

2.568

8.8 9.2 9.6 10.0 10.4 10.8 11.2 11.6 12.0

VDD (V)

VTHREF (V)

MCP73842-8.4V

ITHREF = 100 µA

+85°C

+25°C

-45°C

 2004 Microchip Technology Inc. DS21823C-page 9

MCP73841/2/3/4

Note: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C.

FIGURE 2-19: Line Transient Response.

FIGURE 2-20: Load Transient Response.

FIGURE 2-21: Power Supply Ripple

Rejection.

FIGURE 2-22: Line Transient Response.

FIGURE 2-23: Load Transient Response.

FIGURE 2-24: Power Supply Ripple

Rejection.

VDD

VBAT

MCP73841-4.2V

VDD Stepped From 5.2V to 6.2V

IOUT = 10 mA

COUT = 10 µF, X7R, Ceramic

MCP73841-4.2V

VDD = 5.2V

COUT = 10 µF, X7R, Ceramic VBAT

IOUT

100 mA

10 mA

-80

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (kHz)

Attenuation (dB)

MCP73841-4.2V

VDD = 5.2 V

VAC = 100 mVp-p

IOUT = 10 mA

COUT = 10 µF, X7R, CERAMIC

VDD

VBAT

MCP73841-4.2V

VDD Stepped From 5.2V to 6.2V

IOUT = 500 mA

COUT = 10 µF, X7R, Ceramic

VBAT

MCP73841-4.2V

VDD = 5.2V

COUT = 10 µF, X7R, Ceramic

IOUT500 mA

10 mA

-80

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (kHz)

Attenuation (dB)

MCP73841-4.2V

VDD = 5.2 V

VAC = 100 mVp-p

IOUT = 100 mA

COUT = 10 µF, X7R, CERAMIC

MCP73841/2/3/4

DS21823C-page 10  2004 Microchip Technology Inc.

3.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN DESCRIPTION TABLE

3.1 Charge Current Sense Input

(SENSE)

Charge current is sensed via the voltage developed

across an ex terna l p r ec ision sens e res is tor. The s ens e

resistor must be placed between the supply voltage

(VDD) and the external pass transistor (Q1). A 220 mΩ

sense resistor produces a fast charge current of

500 mA, typically.

3.2 Battery Management I nput Supp ly

(VDD)

A supply voltage of [VREG(Typ) + 0.3V] to 12V is

recommended. Bypass to VSS with a minimum of

4.7 µF.

3.3 Charge Status Output (STAT1)

Current limited, open-drain drive for direct connection

to a LED for charge status indication. Alternatively, a

pull-up resistor can be applied for interfacing to a host

microcontroller.

3.4 Logic Enable (EN)

Input to force c ha rge termin ati on, in iti ate c harge, cl ear

faults or disable automatic recharge.

3.5 Cell Temperature Sensor Bias

(THREF)

Voltage reference to bias external thermistor for

continuous cell temperature monitoring and

prequalification.

3.6 Cell Temperature Sensor Input

(THERM)

Input for an external thermistor for continuous cell-

temperature monitoring and pre-qualification. Apply a

volt age e qual to 0.85V t o dis able tempe rature-sens ing.

3.7 T imer Set (TIMER)

All safety timers are scaled by CTIMER/0.1 µF.

3.8 Battery Management 0V Reference

(VSS)

Connect to negative terminal of battery.

3.9 Battery Voltage Sense (VBAT)

Voltage sense input. Connect to positive terminal of

battery. Bypass to VSS with a minimum of 4.7 µF to

ensure loop stability when the battery is disconnected.

A precision internal resistor divider regulates the final

voltage on this pin to VREG.

3.10 Drive Output (DRV)

Direct output drive of an external P-channel MOSFET

for current and voltage regulation.

MCP73841,

MCP73842

Pin No.

MCP73843,

MCP73844

Pin No. Name Function

1 1 SENSE Charge Current Sense Input

22V

DD Battery Management Input Supply

3 3 STAT1 Charge Status Output

4 4 EN Logic Enable

5 — THREF Cell Temperature Sensor Bias

6 — THERM Cell Temperature Sensor Input

75TIMERTimer Set

86V

SS Battery Management 0V Reference

97V

BAT Battery Voltage Sense

10 8 DRV Drive Outpu t

 2004 Microchip Technology Inc. DS21823C-page 11

MCP73841/2/3/4

4.0 DEVICE OVERVIEW

The MC P7384X fami ly of devic es are hig hly advance d,

linear charge management controllers. Figure 4-1

depicts the operational flow algorithm from charge

initiation to completion and automatic recharge.

4.1 Charge Qualification and

Preconditioning

Upon ins ertion of a battery or applic ation of an externa l

supply, the MCP7384X family of devices automatically

perfor m a seri es of sa fety ch ecks to quali fy th e charg e.

The input source voltage must be above the

undervo lta ge lockou t threshold , the enable pi n must be

above the logic-high level and the cell temperature

monitor must be within the upper and lower thresholds.

The cell temperature monitor applies to both the

MCP73841 and MCP73842, with the qualification

parameters being continuously monitored. Deviation

beyond the limits automatically suspends or terminates

the charge cycle.

Once the qualification parameters have been met, the

MCP7384X initiates a charge cycle. The charge status

output is pulled low throughout the charge cycle (see

Table 5-1 for charge status outputs). If the battery

voltage is below the preconditioning threshold (VPTH),

the MC P73 84X p rec ond iti ons th e ba tte ry w i th a tric kl e-

charge. The preconditioning current is set to

approximately 10% of the fast charge regulation

current. The preconditioning trickle-charge safely

replenishes deeply depleted cells and minimizes heat

dissipation in the external pass transistor during the

initial charge cycle. If the battery voltage has not

exceeded the preconditioning threshold before the

preconditioning timer has expired, a fault is indicated

and the charge cycle is terminated.

4.2 Constant-Current Regulation –

Fast Charge

Preconditioning ends and fast charging begins, when

the battery voltage exceeds the preconditioning

threshold. Fast charge regulates to a constant-current,

IREG, based on the su ppl y v oltage minus the vol tage at

the SENSE input (VFCS) developed by the drop ac ros s

an external sense resistor (RSENSE). Fast charge

continues until the battery voltage reaches the

regulati on volt a ge (VREG); or until the fast charge tim er

expires . In this case, a fault is indicated and the charge

cycle is terminated.

4.3 Constant-Volt age Regulation

When the battery voltage reaches the regulation

voltage (VREG), constant-voltage regulation begins.

The MCP7384X monitors the battery voltage at the

VBAT pin. This input is tied directly to the positive

terminal of the battery. The MCP7384X is offered in

four fixed-voltage versions for single or dual series cell

battery packs with either coke or graphite anodes:

- 4.1V (MCP73841-4.1, MCP73843-4.1)

- 4.2V (MCP73841-4.2, MCP73843-4.2)

- 8.2V (MCP73842-8.2, MCP73844-8.2)

- 8.4V (MCP73842-8.4, MCP73844-8.4)

4.4 Charge Cycle Completion and

Auto mati c R e -Cha r g e

The MCP7384X monitors the charging current during

the constant-voltage regulation phase. The charge

cycle is considered complete when the charge current

has diminished below approximately 7% of the

regulation current (IREG) or the elapsed timer has

expired.

The MCP7384X automatically begins a new charge

cycle when t he bat tery v olt age fa lls b elow th e rec harge

threshold (VRTH), assuming all the qualification

param ete rs are met.

 2004 Microchip Technology Inc. DS21823C-page 12

MCP73841/2/3/4

FIGURE 4-1: Operational Flow Algorithm - MCP73841 and MCP73842.

Preconditioning Phase

Charge Current = IPREG

Reset Safety Timer Yes

Initialize

Yes

VBAT > VPTH STAT 1 = On

VBAT > VPTH

Yes

VDD < VUVLO

Safety Timer

Yes Temperature OK

STAT1 = Flashing

Safety Timer Suspended

Charge Current = 0

Fault

Charge Current = 0

Reset Safety Timer

or EN Low No

STAT1 = Flashing

Constant-Current

Charge Current = IREG

Reset Safety Tim e r

VBAT = VREG

Safety Timer

Yes Temperature OK

Constant-Voltage Phase

Output Voltage = VREG

IOUT < ITERM

Yes

VBAT < VRTH

Elapsed Timer Charge Termination

Charge Current = 0

Res e t Sa f e ty Time r

STAT1 = Off

Yes

Temperature OK

STAT1 = Flashing

Safety Timer Suspended

Charge Current = 0

Yes

VDD < VUVLO

or EN Low

Yes

Temperature OK No

STAT1 = Flashing

Charge Current = 0

Yes

STAT1 = Off

VDD > VUVLO

Phase

Expired

STAT1 = Flashing

Safety Timer Suspended

Charge Current = 0

EN High

Expired

Note: The qualification parameters are continuously

monitored throughout the charge cycle.

Note

 2004 Microchip Technology Inc. DS21823C-page 13

MCP73841/2/3/4

5.0 DETAILED DESCRIPTION

5.1 Analog Circuitry

5.1.1 CHARGE CURRENT SENSE INPUT

(SENSE)

Fast charge current regulation is maintained by the

voltage drop developed across an external sense

resistor (RSENSE) applied to the SENSE input pin. The

following formula calculates the value for RSENSE:

The preconditioning trickle-charge current and the

charge te rmina tion current are scale d to appro xima tely

10% and 7% of IREG, respectively.

5.1.2 BATTERY MANAGEMENT INPUT

SUPP LY (VDD)

The VDD input is the input supply to the MCP7384X.

The MCP7384X automatically enters a power-down

mode if the voltage on the VDD input falls below the

undervoltage lockout voltage (VSTOP). This feature

prevents draining the battery pack when the VDD

supply is not present.

5.1.3 CELL TEMPERATURE SENSOR

BIAS (THREF)

A 2.55V voltage reference is provided to bias an

external thermistor for continuous cell temperature

monitoring and pre-qualification. A ratio metric window

comparison is performed at threshold levels of

VTHREF/2 and VTHREF/4. Cell temperature monitoring

is provided by both the MCP73841 and MCP73842.

5.1.4 CELL TEMPERATURE SENSOR

INPUT (THERM)

The MCP73841 and MCP73842 continuously monitor

temperature by comparing the voltage between the

THERM input and VSS with the upper and lower

temperature thresholds. A negative or positive

temperature coefficient (NTC or PTC) thermistor and

an external voltage divider typically develop this

voltage. The temperature-sensing circuit has its own

reference, to which it performs a ratio metric

comparison. Therefore, it is immune to fluctuations in

the suppl y input (VDD). The temperature-sensing circuit

is removed from the system when VDD is not applied,

eliminating additional discharge of the battery pack.

Figure 6-1 depicts a typical application circuit with

connection of the THERM input. The resistor values of

RT1 and RT2 are calculated with the following

equations.

For NTC thermistors:

For PTC thermistor s:

Applying a voltage equal to 0.85V to the THERM input

disabl es tem perature moni tori ng.

5.1.5 TIMER SET INPUT (TIMER)

The TIMER input programs the period of the safety

timers by placing a timing capacitor (CTIMER) between

the TIMER input pin and VSS. Three safety timers are

programmed via the timing capacitor.

The preconditioning safety timer period:

The fast charge safety timer period:

The elapsed time termination period:

The preconditioning timer starts after qualification and

resets when the charge cycle transitions to the con-

stant-current, fast charge phase. The fast charge and

elapsed timers start once the MCP7384X transitions

from preconditioning. The fast charge timer resets

when the charge cycle transitions to the constant-volt-

age phase . The elaps ed timer will exp ire and termina te

the charge if the sensed current does not diminish

below the termination threshold.

RSENSE VFCS

IREG

------------

where:

IREG is the desired fast charge current in amps

RT12RCOLD RHOT

××

RCOLD RHOT

–

----------------------------------------------

RT22RCOLD RHOT

××

RCOLD 3R×HOT

–

----------------------------------------------

RT12RCOLD RHOT

××

RHOT RCOLD

–

----------------------------------------------

RT22RCOLD RHOT

××

RHOT 3R×COLD

–

----------------------------------------------

where:

values at the temperature window of interest.

RCOLD and RHOT are the thermistor resistance

tPRECON CTIMER

0.1µF

-------------------1.0Hour×s=

tFAST CTIMER

0.1µF

-------------------1.5Hours×=

tTERM CTIMER

0.1µF

-------------------3.0Hours×=

MCP73841/2/3/4

DS21823C-page 14  2004 Microchip Technology Inc.

5.1.6 BATTERY VOLTAGE SENSE (VBAT)

The MCP7384X monitors the battery voltage at the

VBAT pin. This input is tied directly to the positive

terminal of the battery. The MCP7384X is offered in

four fixed-voltage versions for single or dual series cell

battery packs, with either coke or graphite anodes:

- 4.1V (MCP73841-4.1, MCP73843-4.1)

- 4.2V (MCP73841-4.2, MCP73843-4.2)

- 8.2V (MCP73842-8.2, MCP73844-8.2)

- 8.4V (MCP73842-8.4, MCP73844-8.4)

5.1.7 DRIVE OUTPUT (DRV)

The MCP7384X controls the gate drive to an external

P-channel MOSFET. The P-channel MOSFET is

controlled in the linear region regulating current and

voltage supplied to the cell. The drive output is

automatically turned off when the voltage on the VDD

input falls below the undervoltage lockout voltage

(VSTOP).

5.2 Digital Circuitry

5.2.1 CHARGE STATUS OUTPUT (STAT1)

A status output provides information on the state-of-

charge. The current-limited, open-drain output can be

used to illuminate an external L ED. Optionally, a pull-up

resistor can be used on the output for communication

with a host microcontroller. Table 5-1 summarizes the

state of the status output during a charge cycle.

TABLE 5-1: STATUS OUTPUTS

The f lashin g rate ( 1 Hz) i s base d off a t imer capac itor

(CTIMER) of 0.1 µF. The rate will vary based on the

value of the timer capacitor.

5.2.2 LOGIC ENABLE (EN)

The logic-enable input pin (EN) can be used to

terminate a charge anytime during the charge cycle,

initiate a charge cycle or initiate a recharge cycle.

Applyin g a logic -high in put signa l to t he EN pin, o r tying

it to the input source, enables the device. Applying a

logic-low input signal disables the device and

terminat es a charge cycle. When d isabled, the d evice’ s

supply current is reduced to 0.25 µA, typically.

Charge Cycle State Stat1

Qualification OFF

Preconditioning ON

Constant-Current Fast

Charge ON

Constant-Voltage ON

Charge Complete OFF

Safety Timer Fault Flashing

(1 Hz, 50% duty cycle)

Cell Temperature Invalid Flashing

(1 Hz, 50% duty cycle)

Disabled - Sleep mode OFF

Battery Disconnected OFF

 2004 Microchip Technology Inc. DS21823C-page 15

MCP73841/2/3/4

6.0 APPLICATIONS

The MCP7384X is designed to operate in conjunction

with either a host microcontroller or in stand-alone

applications. The MCP7384X provides the preferred

charge algorithm for Lithium-Ion and Lithium-Polymer

cells: constant-current followed by constant-voltage.

Figure 6-1 depicts a typical stand-alone application

circuit, while Figure 6-2 depicts the accompanying

charge profile.

FIGURE 6-1: Typical App li ca tio n Circui t.

FIGURE 6-2: Typical Char ge Prof il e.

VDD VSS

VBAT

DRV

THERM

SENSE 1

MCP73841 TIMER

STAT1

Voltage

Battery

Pack

RSENSE

CTIMER

Optional

THREF

RT1

RT2

Reverse

Blocking

Diode

Regulated

Wall Cu be

Regulation Voltage

(VREG)

Regulation Current

(IREG)

Transition Threshold

(VPTH)

Precondition Current

(IPREG)

Precondition

Safety Timer Fast Charge

Safety Timer Elapsed Time

Termination Timer

Charge

Current

Charge

Voltage

Preconditioning

Phase Constant-Current

Phase Constant-Voltage

Phase

Termination Current

(ITERM)

MCP73841/2/3/4

DS21823C-page 16  2004 Microchip Technology Inc.

6.1 Application Circuit Design

Due to the low efficiency of linear charging, the most

important fa ctors are thermal design and cos t, which are

a direct function of the input voltage, output current and

thermal impedance between the external P-channel

pass transistor and the ambient cooling air. The worst-

case situation occurs when the device has transitioned

from the preconditioning phase to the constant-current

phase. In this situation, the P-channel pass transistor

has to dissipate the maximum power. A trade-off must

be made between the charge current, cost and thermal

requirements of the ch arger.

6.1.1 COMPONEN T SELECTION

Selection of the external components in Figure 6-1 are

crucial to the integrity and reliability of the charging

system. The following discussion is intended to be a

guide for the component selection process.

6.1.1. 1 Sense Resistor

The preferred fast charge current for Lithium-Ion cells

is at the 1C rate, with an absolute maximum current at

the 2C rate. For example, a 500 mAh battery pack has

a preferred fast charge current of 500 mA. Charging at

this rate provides the shortest charge cycle times

withou t degradatio n to the battery p ack perfo rmance or

life.

The curren t sense resistor ( RSENSE) is calculate d by:

For the 500 mAh battery pack example, a standard

value 220 mΩ, 1% resistor provides a typical fast

charge current of 500 m A and a maximum fast charge

current of 551 mA. Wors t-case power dissipati on in the

sense res ist or is:

A Panasonic® ERJ-6RQFR22V, 220 mW, 1%, 1/8W

resistor in a standard 0805 package is more than

sufficient for this application.

A larger value sense resistor will decrease the fast

charge cu rrent and powe r dissip ation in both the sense

resistor and external pass transistor, but will increase

charge cycle times. Design trade-offs must be

considered to minimize space while maintaining the

des ired performanc e.

6.1.1.2 External Pass Transistor

The externa l P-ch ann el MOSFET is de term in ed by the

gate-to-source threshold voltage, input voltage, output

voltage and fast charge current. Therefore, the

selec ted P-ch annel MOS FET mu st sati sfy the th ermal

and electrical design requirements.

Thermal Considerations

The worst-case power dissipation in the external pass

transistor occurs when the input voltage is at the

maximum and the device has transitioned from the

preconditioni ng phase to the constant-cu rrent phase. In

this case, the power dissipation is:

Power dissipation with a 5V, ±10% input voltage

source, 220 mΩ, 1% sense re sisto r is:

Utilizing a Fairchild™ NDS8434 or an International

Rectifier IRF7404 mounted on a 1in2 pad of 2 oz.

copper, the junction temperature rise is 75°C,

approximately. This would allow for a maximum

operating ambient temperature of 75°C.

By increasing the size of the copper pad, a higher ambi-

ent temperature can be realized, or a lower value

sense resistor could be utilized.

Alternatively, different package options can be utilized

for more or less power dissi pation. Agai n, design trade-

offs should be considered to minimize size while

maintaining the desired performance.

Electrical Considerations

The gate-to -source thresho ld voltag e and RDSON of the

external P-channel MOSFET must be considered in the

design phase.

The wors t-case VGS pro vided by the cont roller occu rs

when the input voltage is at the minimum and the fast

charge cu rrent regu lation thresho ld is at the maximum .

The worst-ca se VGS is:

RSENSE VFCS

IREG

------------

Where:

IREG is the desired fast charge current.

PowerDissipation 220mΩ551mA2

×66.8mW==

PowerDissipation VDDMAX VPTHMIN

–()IREGMAX

×=

Where:

VDDMAX is the maximum input voltage.

IREGMAX is the maximum fast charge current.

VPTHMIN is the minimum transition threshold voltage

PowerDissipation 5.5V2.75V–()551mA×1.52W==

VGS VDRVMAX VDDMIN VFCSMAX)–(–=

Where:

VDRVMAX is the maximum sink voltage at the

VDRV output

VDDMIN is the minimum input voltage source

VFCSMAX is the maximum fast charge current

regulation threshold

 2004 Microchip Technology Inc. DS21823C-page 17

MCP73841/2/3/4

Worst-case VGS with a 5V, ±10% input voltage source

and a maximum sink voltage of 1.0V is:

At this worst-case (VGS) the RDSON of the MOSFET

must b e l ow e no ugh as to n ot i mp ed e th e perf orm anc e

of the charging system. The maximum allowable

RDSON at the worst-case VGS is:

The Fairchild NDS8434 and International Rectifier

IRF740 4 both sat is fy thes e r equ irem en t s .

6.1.1.3 EXTERNAL CAPACITORS

The MCP7384X are stable with or without a battery

load. In order to maintain good AC stability in the

Constant-Voltage mode, a minimum capacitance of

4.7 µF is re co mm en ded to byp a ss t he V BAT pin to VSS.

This capacitance provides compensation when there is

no battery load. Additionally, the battery and

interconnections appear inductive at high frequencies.

These ele ments are in the control feedback loop during

Constant-Voltage mode. Therefore, the bypass

capacitance may be necessary to compensate for the

inductive nature of the battery pack.

Virtually any good quality output filter capacitor can be

used, independent of the capacitor’s minimum ESR

(Effective Series Resistan ce) value. The act ual value of

the capacitor and its associated ESR depends on the

forward transconductance (gm) and capacitance of the

external pass transistor. A 4.7 µF tantalum or aluminum

electrolytic capacitor at the output is usually sufficient

to ensure stability for up to a 1A output current.

6.1.1.4 REVERSE-BLOCKING PROTECTION

The optional reverse-blocking protection diode,

depicted in Figure 6-1, provides protection from a

faulted or shorted input, or from a reversed-polarity

input source. Without the protection diode, a faulted or

shorted input w ould dis charge the b attery p ack th rough

the body diode of the external pass transistor.

If a reverse-protection diode is incorporated into the

design, it should be chosen to handle the fast charge

current continuously at the maximum ambient

temperature. In addition, the reverse-leakage current

of the diode should be kept as small as possible.

6.1.1.5 ENABLE INTERFACE

In the stand-alone configuration, the enable pin is

generally tied to the input voltage. The MCP7384X

automatically enters a Low-power mode when voltage

on the VDD input falls below the undervoltage lockout

voltage (VSTOP), reducing the battery drain current to

0.4 µA, typically.

6.1.1.6 CHARGE STATUS INTERFACE

A status output provides information on the state of

charge. The current-limited, open-drain output can be

used to illuminate an external LED. Refer to Table 5-1

for a summ ary of the stat e of the st atus output du ring a

charge cycle.

6.2 PCB Layout Issues

For optimum vol t age regu la tion , pl ace the batte ry pac k

as clos e as possi ble to the de vice’ s VBAT and VSS pins.

This is recommended to minimize voltage drops along

the high current-carrying PCB traces.

If the PCB layout is used as a heatsink, adding many

vias around the external pass transistor can help

conduct more heat to the back plane of the PCB, thus

reducing the maximum junction temperature.

VGS 1.0V4.5V120mV–()–3.38V–==

RDSON VDDMIN VFCSMAX

–VBATMAX

–

IREGMAX

-------------------------------------------------------------------------------

RDSON 4.5V120 115()mV–4.221V–

551 581()mA

-------------------------------------------------------------------------288mΩ==

MCP73841/2/3/4

DS21823C-page 18  2004 Microchip Technology Inc.

7.0 PACKAGING INFORMATION

7.1 Package Marking Information

Legend: XX...X Customer specific information*

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Note: In the event th e full Mi crochi p pa rt numbe r cannot be ma rked on on e line, it will

be carried ov er to the ne xt li ne thus lim iti ng th e nu mb er of av ai lab le c hara ct ers

for customer specific information.

*Standard marking consists of Microchip part number, year code, week code, and traceability code.

8-Lead MSOP (MCP73843, MCP73844)Example:

XXXXX

YWWNNN

738431

0319256

10-Lead MSOP (MCP73841, MCP73842)Example:

XXXXX

YYWWNNN

738411

0319256

 2004 Microchip Technology Inc. DS21823C-page 19

MCP73841/2/3/4

8-Lead Plastic Micro Small Outline Package (MS) (MSOP)

(F)

n 1

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

.037 REFFFootprint (Reference)

exceed .010" (0.254mm) per side.

Notes:

Drawing No. C04-111

*Controlling Parameter

Mold Draft Angle Top

Mold Draft Angle Bottom

Foot Angle

Lead Width

Lead Thickness

.003

.009

.006

.012

Dimension Limits

Overall Height

Molded Package Thickness

Molded Package Width

Overall Length

Foot Length

Standoff

Overall Width

Number of Pins

Pitch

.016 .024

.118 BSC

.000

.030

.193 TYP.

.033

MIN

Units

.026 BSC

NOM

INCHES

0.95 REF

.009

.016

0.08

0.22

0°

0.23

0.40

8°

MILLIMETERS*

0.65 BSC

0.85

3.00 BSC

0.60

4.90 BSC

.043

.031

.037

.006

0.40

0.00

0.75

MIN

MAX NOM

1.10

0.80

0.15

0.95

MAX

15°5° -

JEDEC Equivalent: MO-187

0° - 8°

5°

5° -

15°

MCP73841/2/3/4

DS21823C-page 20  2004 Microchip Technology Inc.

10-Lead Plasti c Micro Smal l Outline Package (UN) (MSOP)

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

.037 REFFFootprint

exceed .010" (0.254mm) per side.

Notes:

Drawing No. C04-021

*Controlling Parameter

Mold Draft Angle Top

Mold Draft Angle Bottom

Foot Angle

Lead Width

Lead Thickness

.003

.006

.009

Dimension Limits

Overall Height

Molded Package Thickness

Molded Package Width

Overall Length

Foot Length

Standoff

Overall Width

Number of Pins

Pitch

.016 .024

.118 BSC

.000

.030

.193 BSC

.033

MIN

Units

.020 TYP

NOM

INCHES

0.95 REF

0.23

.009

.012

0.08

0.15

0.23

0.30

MILLIMETERS*

0.50 TYP.

0.85

3.00 BSC

0.60

4.90 BSC

.043

.031

.037

.006

0.40

0.00

0.75

MINMAX NOM

1.10

0.80

0.15

0.95

MAX

5° 15°

0° - 8°

5° -

15°

JEDEC Equivalent: MO-187

8°0°

(F)

 2004 Microchip Technology Inc. DS21823C-page 21

MCP73841/2/3/4

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Sales and Support

Device MCP73841: Single-cell charge controller with temperature

monitor

MCP73841T: Single-cell charge controller with temperature

monitor, Tape and Reel

MCP73842: Dual series cells charge controller with tem-

perature monitor

MCP73842T: Dual series cells charge controller with tem-

perature monitor, Tape and Reel

MCP7384 3: Single -ce ll charge contro l ler

MCP73843T: Single-cell charge controller, Tape and Reel

MCP73844: Dual series cells charge controller

MCP73844T: Dual series cells charge controller,

Tape and Reel

Preset Voltage

Regulation Options 410 = 4.1V

420 = 4.2V

820 = 8.2V

840 = 8.4V

Temper atu re R ang e I = -40°C to +85°C (Industrial)

Package MS = Plastic Micro Small Outline (MSOP), 8-lead

UN = Plastic Micro Small Outline (MSOP), 10-lead

PART NO. XXX

PackageTemperature

Range

Device

XXX

Preset

Voltage

Options

Examples:

a) MCP73841-410I/UN: 4.1V Preset Voltage

b) MCP73841T-410I/UN: 4.1V Preset Voltage,

Tape and Ree l

c) MCP73841-420I/UN: 4.2V Preset Voltage

d) MCP73841T-420I/UN: 4.2V Preset Voltage,

Tape and Ree l

a) MCP73842-820I/UN: 8.2V Preset Voltage

b) MCP73842T-820I/UN: 8.2V Preset Voltage,

Tape and Ree l

c) MCP73842-840I/UN: 8.4V Preset Voltage

d) MCP73842T-840I/UN: 8.4V Preset Voltage,

Tape and Ree l

a) MCP73843-410I/MS: 4.1V Preset Voltage

b) MCP73843T-410I/MS: 4.1V Preset Voltage,

Tape and Ree l

c) MCP73843-420I/MS: 4.2V Preset Voltage

d) MCP73843T-420I/MS: 4.2V Preset Voltage,

Tape and Ree l

a) MCP73844-820I/MS: 8.2V Preset Voltage

b) MCP73844T-820I/MS: 8.2V Preset Voltage,

Tape and Ree l

c) MCP73844-840I/MS: 8.4V Preset Voltage

d) MCP73844T-840I/MS: 8.4V Preset Voltage,

Tape and Ree l

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational diff erences and

recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Dat a Sheet (include Literature #) you are using.

Customer Notification System

MCP73841/2/3/4

DS21823C-page 22  2004 Microchip Technology Inc.

NOTES:

 2004 Microchip Technology Inc. DS21823C-page 23

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR WAR-

RANTIES OF ANY KIND WHETHER EXPR ESS OR IMPLIED,

WRITTEN OR ORAL, STATUTORY OR OTHERWISE,

RELATED TO THE INFORMATION, INCLUDING BUT NOT

LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,

MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and

its use. Use of Microchip’s products as critical compon ents in

life support systems is not authorized except with express

written approval by Microchip. No licenses are conveyed,

implicitly or otherwise, under any Microchip intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, microID, MPLAB, P IC, PI Cmic ro, PICST AR T,

PRO MATE, PowerSmart, rfPIC , and SmartShu nt are

registered trademarks of Microchip Technology Incorporated

in the U.S.A. and other countries.

AmpLab, FilterLab, MXD E V, MXLAB, PICMASTER, SEEV AL,

SmartSensor and The Embedded Control Solutions Company

are registered trademarks of Microchip Technology

Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,

dsPICDEM. n e t, dsPICworks, ECAN, ECONOMONITOR,

FanSense, FlexROM, fuzzy LAB , In-Circuit Serial

Programming, ICSP, ICEPIC, Migratable Memory, MPASM,

MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,

PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,

PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,

SmartTel and Total Endurance are trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip T echnology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner out side the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously impro ving the c ode pr otection feat ures of our

products. Attempt s to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping

devices, Serial EEPROMs, microperiph erals, nonvolat ile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21823C-page 24  2004 Microchip Technology Inc.

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09/20/04