© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 7 1Publication Order Number:
MJE13005/D
MJE13005
Preferred Device
SWITCHMODEt Series
NPN Silicon Power
Transistors
These devices are designed for high−voltage, high−speed power
switching inductive circuits where fall time is critical. They are
particularly suited for 115 and 220 V SWITCHMODE applications
such as Switching Regulators, Inverters, Motor Controls,
Solenoid/Relay drivers and Deflection circuits.
Features
VCEO(sus) 400 V
Reverse Bias SOA with Inductive Loads @ TC = 100_C
Inductive Switching Matrix 2 to 4 A, 25 and 100_C tc @ 3A,
100_C is 180 ns (Typ)
700 V Blocking Capability
SOA and Switching Applications Information
Pb−Free Package is Available*
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector−Emitter Voltage VCEO(sus) 400 Vdc
Collector−Emitter Voltage VCEV 700 Vdc
Emitter−Base Voltage VEBO 9 Vdc
Collector Current − Continuous
− Peak (Note 1) IC
ICM 4
8Adc
Base Current − Continuous
− Peak (Note 1) IB
IBM 2
4Adc
Emitter Current Continuous
− Peak (Note 1) IE
IEM 6
12 Adc
Total Device Dissipation @ TC = 25_C
Derate above 25°CPD2
16 W
W/_C
Total Device Dissipation @ TC = 25_C
Derate above 25°CPD75
600 W
W/_C
Operating and Storage Junction
Temperature Range TJ, Tstg 65 to
+150
_C
THERMAL CHARACTERISTICS
Characteristics Symbol Max Unit
Thermal Resistance, Junction−to−Ambient RqJA 62.5 _C/W
Thermal Resistance, Junction−to−Case RqJC 1.67 _C/W
Maximum Lead Temperature for Soldering
Purposes 1/8 from Case for 5 Seconds TL275 _C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
4 AMPERE
NPN SILICON
POWER TRANSISTOR
400 VOLTS − 75 WATTS
TO−220AB
CASE 221A−09
STYLE 11
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MARKING DIAGRAM
23
MJE13005G
AY WW
A = Assembly
Location
Y = Year
WW = Work Week
G = Pb−Free Pack-
age
Device Package Shipping
ORDERING INFORMATION
MJE13005 TO−220 50 Units / Rail
MJE13005G TO−220
(Pb−Free) 50 Units / Rail
Preferred devices are recommended choices for future use
and best overall value.
MJE13005
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2
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Characteristic
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎ
ÎÎÎÎ
Min
ÎÎÎ
ÎÎÎ
Typ
ÎÎÎÎ
ÎÎÎÎ
Max
ÎÎÎ
ÎÎÎ
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
OFF CHARACTERISTICS (Note 2)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Collector−Emitter Sustaining Voltage
(IC = 10 mA, IB = 0)
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
VCEO(sus)
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
400
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Collector Cutoff Current
(VCEV = Rated Value, VBE(off) = 1.5 Vdc)
(VCEV = Rated Value, VBE(off) = 1.5 Vdc, TC = 100_C)
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ICEV
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
1
5
ÎÎÎ
Î
Î
Î
ÎÎÎ
mAdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Emitter Cutoff Current
(VEB = 9 Vdc, IC = 0)
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
IEBO
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
1
ÎÎÎ
Î
Î
Î
ÎÎÎ
mAdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
SECOND BREAKDOWN
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Second Breakdown Collector Current with base forward biased
ÎÎÎÎ
ÎÎÎÎ
IS/b
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
See Figure 11
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Clamped Inductive SOA with Base Reverse Biased
ÎÎÎÎ
ÎÎÎÎ
RBSOA
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
See Figure 12
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ON CHARACTERISTICS (Note 2)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Current Gain
(IC = 1 Adc, VCE = 5 Vdc)
(IC = 2 Adc, VCE = 5 Vdc)
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
hFE
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
10
8
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
60
40
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Collector−Emitter Saturation Voltage
(IC = 1 Adc, IB = 0.2 Adc)
(IC = 2 Adc, IB = 0.5 Adc)
(IC = 4 Adc, IB = 1 Adc)
(IC = 2 Adc, IB = 0.5 Adc, TC = 100_C)
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
VCE(sat)
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎ
Î
Î
Î
Î
Î
Î
Î
Î
Î
ÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
0.5
0.6
1
1
ÎÎÎ
Î
Î
Î
Î
Î
Î
Î
Î
Î
ÎÎÎ
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Base−Emitter Saturation Voltage
(IC = 1 Adc, IB = 0.2 Adc)
(IC = 2 Adc, IB = 0.5 Adc)
(IC = 2 Adc, IB = 0.5 Adc, TC = 100_C)
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
VBE(sat)
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎ
Î
Î
Î
Î
Î
Î
ÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
1.2
1.6
1.5
ÎÎÎ
Î
Î
Î
Î
Î
Î
ÎÎÎ
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DYNAMIC CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Current−Gain − Bandwidth Product
(IC = 500 mAdc, VCE = 10 Vdc, f = 1 MHz)
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
fT
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
4
ÎÎÎ
Î
Î
Î
ÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎ
Î
Î
Î
ÎÎÎ
MHz
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
ÎÎÎÎ
ÎÎÎÎ
Cob
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
65
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
SWITCHING CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Resistive Load (Table 2)
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Delay Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
(VCC = 125 Vdc, IC = 2 A,
IB1 = IB2 = 0.4 A, tp = 25 ms,
Duty Cycle v 1%)
ÎÎÎÎ
ÎÎÎÎ
td
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
0.025
ÎÎÎÎ
ÎÎÎÎ
0.1
ÎÎÎ
ÎÎÎ
ms
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Rise Time
ÎÎÎÎ
ÎÎÎÎ
tr
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
0.3
ÎÎÎÎ
ÎÎÎÎ
0.7
ÎÎÎ
ÎÎÎ
ms
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Storage Time
ÎÎÎÎ
ÎÎÎÎ
ts
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
1.7
ÎÎÎÎ
ÎÎÎÎ
4
ÎÎÎ
ÎÎÎ
ms
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Fall Time
ÎÎÎÎ
ÎÎÎÎ
tf
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
0.4
ÎÎÎÎ
ÎÎÎÎ
0.9
ÎÎÎ
ÎÎÎ
ms
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Inductive Load, Clamped (Table 2, Figure 13)
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Voltage Storage Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎ
Î
Î
ÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
(IC = 2 A, Vclamp = 300 Vdc,
IB1 = 0.4 A, VBE(off) = 5 Vdc, TC = 100_C)
ÎÎÎÎ
ÎÎÎÎ
tsv
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
0.9
ÎÎÎÎ
ÎÎÎÎ
4
ÎÎÎ
ÎÎÎ
ms
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Crossover Time
ÎÎÎÎ
ÎÎÎÎ
tc
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
0.32
ÎÎÎÎ
ÎÎÎÎ
0.9
ÎÎÎ
ÎÎÎ
ms
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
Fall Time
ÎÎÎÎ
ÎÎÎÎ
tfi
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
0.16
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
ms
2. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
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3
C, CAPACITANCE (pF)
VCE(sat), COLLECTOR−EMITTER SATURATION
VOLTAGE (VOLTS)
VBE, BASE−EMITTER VOLTAGE (VOLTS)
VCE, COLLECTOR−EMITTER VOLTAGE (VOLT
IC, COLLECTOR CURRENT (AMP)IC, COLLECTOR CURRENT (AMP)
1.1
1.3
0.7
0.3
Figure 1. DC Current Gain
IC, COLLECTOR CURRENT (AMP)
0.1 0.4 2 4
10
Figure 2. Collector Saturation Region
0.03
IB, BASE CURRENT (AMP)
0.30.05
1.2
0.4
0
100
hFE, DC CURRENT GAIN
0.1 0.2 0.5 3
Figure 3. Base−Emitter Voltage Figure 4. Collector−Emitter Saturation Voltage
Figure 5. Collector Cutoff Region
2
0.8
0.1
VBE, BASE−EMITTER VOLTAGE (VOLTS)
0
TJ = 25°C
0.2 1
Figure 6. Capacitance
2 k
VR, REVERSE VOLTAGE (VOLTS)
Cib
Cob
0.3
, COLLECTOR CURRENT (A)μIC
−0.4 −0.2
70
50
300
1.6
0.5
IC = 1 A
TJ = −55°C
5
0.04 0.6
0.06 0.1 10.04 0.40.2 0.6
70
50
30
7
300
200
100
20
30
10050510.5
150°C
IC/IB = 4
+0.6
2 A
0.7 1 2
0.9 0.35
0.55
0.25
0.05
0.45
0.06
VCE = 2 V
VCE = 5 V
TJ = 150°C
25°C
−55 °C
2
0.15
+0.4+0.2
1
10
100
1 k
10 k
500
700
1 k
10 30
REVERSE FORWARD
VCE = 250 V
VBE(sat) @ IC/IB = 4
VBE(on) @ VCE = 2 V
20
3 A 4 A
4
25°C
25°C
0.06 0.1 10.04 0.40.2 0.6 2 4
3
TJ = −55°C
25°C
150°C
TJ = 150°C
125°C
100°C
75°C
50°C
25°C
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4
trv
TIME
IC
VCE
90% IB1
tsv
ICPK Vclamp
90% Vclamp 90% IC
10% Vclamp 10%
ICPK 2% IC
IB
tfi tti
tc
Figure 7. Inductive Switching Measurements
Table 1. Typical Inductive Switching Performance
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
IC
AMP
ÎÎÎ
Î
Î
Î
ÎÎÎ
TC
_C
ÎÎÎ
Î
Î
Î
ÎÎÎ
tsv
ns
ÎÎÎ
Î
Î
Î
ÎÎÎ
trv
ns
ÎÎÎ
Î
Î
Î
ÎÎÎ
tfi
ns
ÎÎÎ
Î
Î
Î
ÎÎÎ
tti
ns
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
tc
ns
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
2
ÎÎÎ
Î
Î
Î
ÎÎÎ
25
100
ÎÎÎ
Î
Î
Î
ÎÎÎ
600
900
ÎÎÎ
Î
Î
Î
ÎÎÎ
70
110
ÎÎÎ
Î
Î
Î
ÎÎÎ
100
240
ÎÎÎ
Î
Î
Î
ÎÎÎ
80
130
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
180
320
ÎÎÎÎ
Î
ÎÎ
Î
3
ÎÎÎ
Î
Î
Î
25
100
ÎÎÎ
Î
Î
Î
650
950
ÎÎÎ
Î
Î
Î
60
100
ÎÎÎ
Î
Î
Î
140
330
ÎÎÎ
Î
Î
Î
60
100
ÎÎÎÎ
Î
ÎÎ
Î
200
350
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
4
ÎÎÎ
Î
Î
Î
ÎÎÎ
25
100
ÎÎÎ
Î
Î
Î
ÎÎÎ
550
850
ÎÎÎ
Î
Î
Î
ÎÎÎ
70
110
ÎÎÎ
Î
Î
Î
ÎÎÎ
160
350
ÎÎÎ
Î
Î
Î
ÎÎÎ
100
160
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
220
390
NOTE: All Data rec orded in the induc ti ve Switching Circuit In Table 2.
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times
have been defined and apply to both current and voltage
waveforms since they are in phase. However , for inductive
loads which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage
waveforms are not in phase. Therefore, separate
measurements must be made on each waveform to
determine the total switching time. For this reason, the
following new terms have been defined.
tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp
trv = Voltage Rise Time, 1090% Vclamp
tfi = Current Fall Time, 9010% IC
tti = Current Tail, 102% IC
tc = Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching
waveforms is shown in Figure 7 to aid in the visual identity
of these terms.
For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained
using the standard equation from AN−222:
PSWT = 1/2 VCCIC(tc)f
In general, trv + tfi ] tc. However, at lower test currents
this relationship may not be valid.
As is common with most switching transistors, resistive
switching is specified at 25°C and has become a benchmark
for designers. However, for designers of high frequency
converter circuits, the user oriented specifications which
make this a “SWITCHMODE” transistor are the inductive
switching speeds (tc and tsv) which are guaranteed at 100_C.
t, TIME (s)μ
t, TIME (s)μ
Figure 8. Turn−On Time
IC, COLLECTOR CURRENT (AMP)
tr
td @ VBE(off) = 5 V
0.02
0.01
1
0.5
0.2
IC, COLLECTOR CURRENT (AMP)
0.4 4120.04
VCC = 125 V
IC/IB = 5
TJ = 25°C
0.2
0.05
0.1
0.1
Figure 9. Turn−Off Time
0.2
0.1
10
5
1
0.5 4120.04
VCC = 125 V
IC/IB = 5
TJ = 25°C
0.2
0.3
0.5
0.1
2
ts
tf
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5
REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING RESISTIVE
SWITCHING
OUTPUT WAVEFORMS
TEST CIRCUITS
CIRCUIT
VALUES
TEST WAVEFORMS
NOTE
PW and VCC Adjusted for Desired IC
RB Adjusted for Desired IB1
5 V
PW
DUTY CYCLE 10%
tr, tf 10 ns 68
1 k
0.001 mF
0.02 mF
1N493
3
270
+5 V
1 k
2N2905
47
1/2 W
100
−VBE(off)
MJE200
T.U.T.
IB
RB
1N4933
1N4933 33
33
2N222
2
1 k
MJE210
VCC
+5 V
L
IC
MR826*
Vclamp
*SELECTED FOR 1 kV
VCE
5.1 k
51
+125 V
RC
SCOPE
−4.0
V
D1
RB
TUT
t1 ADJUSTED TO
OBTAIN IC
t1
Lcoil (ICpk)
VCC
t2
Lcoil (ICpk)
Vclamp
+10 V 25 ms
0
−8 V
Coil Data:
Ferroxcube Core #6656
Full Bobbin (~16 Turns) #16
GAP for 200 mH/20 A
Lcoil = 200 mHVCC = 20 V
Vclamp = 300 Vdc
VCC = 125 V
RC = 62 W
D1 = 1N5820 or Equiv.
RB = 22 W
Test Equipment
Scope−Tektronics
475 or Equivalent
tr, tf < 10 ns
Duty Cycle = 1.0%
RB and RC adjusted
for desired IB and IC
t1
IC
VCE
TIME
IC(pk)
VCE or
Vclamp
t2
t
t
tf
tf CLAMPED
tf UNCLAMPED t2
Table 2. Test Conditions for Dynamic Performance
t, TIME (ms)
1
0.01
0.01
0.7
0.2
0.1
0.05
0.02
r(t), TRANSIENT THERMAL RESISTANCE
0.05 1 2 5 10 20 50 100 200 500
ZqJC(t) = r(t) RqJC
RqJC = 1.67°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TC = P(pk) ZqJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
D = 0.5
0.2
0.05
0.01
SINGLE PULSE
0.1 0.50.2
(NORMALIZED)
1 k
0.5
0.3
0.07
0.03
0.02
Figure 10. Typical Thermal Response [Zq
(t)]
0.1
0.02
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6
SAFE OPERATING AREA INFORMATION
The Safe Operating Area Figures 11 and 12 are specified ratings for these devices under the test conditions shown.
IC(pk), COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
5 ms 500 ms
1 ms
dc
10
7
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
0.02
10
400
2
1
5
0.5
0.1
0.05
30 50 70 100
Figure 11. Forward Bias Safe Operating Area Figure 12. Reverse Bias Switching Safe Operating Are
0.2
0.01
300 500
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4
0
800
1
100 300
TC 100°C
IB1 = 2.0 A
500 700
VBE(off) = 9 V
0
2
VCE, COLLECTOR−EMITTER CLAMP VOLTAGE (VOLTS)
3
200 400 600
5 V
MJE13005
3 V
200
1.5 V
FORWARD BIAS
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − V CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 11 is based on TC = 25_C; T J(pk) is
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
derated when TC 25_C. Second breakdown limitations do
not derate the same as thermal limitations. Allowable
current at the voltages shown on Figure 11 may be found at
any case temperature by using the appropriate curve on
Figure 13.
TJ(pk) may be calculated from the data in Figure 10. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn−off, in most cases,
with the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping, RC
snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage−current conditions during
reverse biased turn−off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 12 gives the complete RBSOA
characteristics.
Figure 13. Forward Bias Power Derating
TC, CASE TEMPERATURE (°C)
040 120 160
0.6
POWER DERATING FACTOR
SECOND BREAKDOWN
DERATING
1
0.8
0.4
0.2
60 100 14080
THERMAL
DERATING
20
MJE13005
http://onsemi.com
7
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.570 0.620 14.48 15.75
B0.380 0.405 9.66 10.28
C0.160 0.190 4.07 4.82
D0.025 0.035 0.64 0.88
F0.142 0.147 3.61 3.73
G0.095 0.105 2.42 2.66
H0.110 0.155 2.80 3.93
J0.018 0.025 0.46 0.64
K0.500 0.562 12.70 14.27
L0.045 0.060 1.15 1.52
N0.190 0.210 4.83 5.33
Q0.100 0.120 2.54 3.04
R0.080 0.110 2.04 2.79
S0.045 0.055 1.15 1.39
T0.235 0.255 5.97 6.47
U0.000 0.050 0.00 1.27
V0.045 −−− 1.15 −−−
Z−−− 0.080 −−− 2.04
B
Q
H
Z
L
V
G
N
A
K
F
123
4
D
SEATING
PLANE
−T−
C
S
T
U
R
J
TO−220AB
CASE 221A−09
ISSUE AA
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
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