T H AT Corporation InGenius High-CMRR Balanced Input Line Receiver ICs THAT 1200, 1203, 1206 FEATURES APPLICATIONS * High CMRR: typ. 90 dB at 60 Hz * Extremely high common-mode input * Balanced Audio Line Receivers impedance * Maintains balance under real-world * Instrumentation Amplifiers conditions * Transformer-like performance in an IC * Excellent audio performance * Wide bandwidth: typ. > 22 MHz * High slew rate: typ. 12 V/us * Low distortion: typ. 0.0005 % THD * Low noise: typ. -107 dBu * Several gains: 0 dB, -3 dB, & -6 dB * Differential Amplifiers * Transformer Front-End Replacements * ADC Front-Ends Description Developed by Bill Whitlock of Jensen Transformers, the patented InGenius input stage uses clever bootstrapping to raise its common-mode input impedance into the megohm range without the noise penalty from the obvious solution of using high-valued resistors. Like transformers, InGenius line receivers maintain their high CMRR over a wide range of source impedance imbalances -- even when fed from single-ended sources. But unlike transformers, these wide bandwidth solid state devices offer dc-coupling, low distortion, and transparent sound in a small package at reasonable cost. The THAT 1200-series InGenius balanced line receivers overcome a serious limitation of conventional balanced input stages: poor common mode rejection in real-world applications. While conventional input stages measure well in the lab and perform well on paper, they fail to live up to their CMRR specs when fed from even slightly unbalanced source impedances -- a common situation in almost any pro sound environment. This is because conventional stages have low common-mode input impedance, which interacts with imbalances in source impedance to unbalance common-mode signals, making them indistinguishable from desired, balanced signals. OA1 R6 IN- R1 R2 +1 OA4 R11 24K Vee OA3 - +1 R8 Vout + R3 R4 +1 IN+ R9 DIP Pin SO Pin Ref 1 1 2 Vcc R10 24K R7 Pin Name OA2 REF R5 24K CM IN CM OUT In- 2 In+ 3 3 Vee 4 4 CM In 5 5 Vout 6 6 Vcc 7 7 CM Out 8 8 Table 1. 1200-series pin assignments Cb Gain Plastic DIP Plastic SO 6 kU 0 dB 1200P 1200S 6 kU -3 dB 1203P 1203S -6 dB 1206P 1206S R6 , R9 R7 , R8 R1 , R3 R2 , R4 THAT1200 0 24 kU 6 kU THAT1203 7 kU 17 kU 6 kU THAT1206 7 kU 17 kU 7 kU 5 kU Part no. Figure 1. THAT1200-series equivalent circuit diagram Table 2. Ordering information Protected under U.S. Patent Numbers, 5,568,561 and 6,160,451. Additional patents pending. InGenius is a registered trademark of THAT Corporation. THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com 600033 Rev 00 Page 2 InGenius High-CMRR Balanced Input Line Receiver ICs SPECIFICATIONS 1 Absolute Maximum Ratings (T A = 25C) Positive Supply Voltage (VCC) +20 V Ja PDIP Pkg Negative Supply Voltage (VEE) -20 V Ja SO Pkg Storage Temperature Range (TST) -40 to +125C Output Short-Circuit Duration (tSH) Continuous Input Voltage (VIN) 0 to +85C Junction Temperature (TJ) 125C THAT1200 THAT1203 THAT1206 25 V 31 V 31 V 2,3,4 Symbol Conditions Min Typ Max Units Supply Current ICC No signal -- 4.7 8.0 mA Supply Voltage VCC, VEE 18 V Input Bias Current 3 IB No signal; Either input connected to GND -- 700 1,400 nA Input Offset Current IB-OFF No signal -- -- 300 nA Input Voltage Range VIN-CM VIN-DIFF 13.0 -- V 21.5 24.5 24.5 -- -- -- dBu dBu dBu Input Impedance Common mode 12.5 Differential (equal and opposite swing) THAT 1200 21.0 THAT 1203 24.0 THAT 1206 24.0 ZIN-DIFF ZIN-CM Common Mode Rejection Ratio CMRR1 5 Common Mode Rejection Ratio CMRRIEC Common Mode Rejection Ratio Power Supply Rejection Ratio6 1. 2. 3. 4. 104 C/W Operating Temperature Range (TOP) Electrical Characteristics Parameter 86 C/W CMRR2 PSRR Differential Common mode 60 Hz 20 kHz 48.0 with bootstrap 10.0 3.2 Matched source impedances; VCM = 10V DC 70 60 Hz 70 20 kHz -- 90 90 85 10 unmatched source impedances; VCM = 10V DC -- 90 60 Hz -- 90 20 kHz -- 85 600 unmatched source impedances; VCM = 10V 60 Hz -- 70 20 kHz -- 65 At 60 Hz, with VCC = -VEE THAT1200 THAT1203 THAT1206 All specifications are subject to change without notice. Unless otherwise noted, TA=25C, VCC = +15V, VEE = -15V See test circuit in Figure 2. 0 dBu = 0.775Vrms. -- -- -- 82 80 80 k M M -- -- -- dB dB dB -- -- -- dB dB dB -- -- dB dB -- -- -- dB dB dB 5. Per IEC Standard 60268-3 for testing CMRR of balanced inputs. 6. Defined with respect to the differential gain. THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com 600033 Rev 00 Page 3 Electrical Characteristics (Cont'd) Parameter Symbol Total Harmonic Distortion THD Output Noise Conditions VIN-DIFF = 10 dBu; BW = 20 kHz; f = 1 kHz RL =2 k -- en(OUT) Max Units 0.0005 -- % -- -- -- -106 -105 -107 -- -- -- dBu dBu dBu VOFF No signal -- -- 10 mV SR RL = 2 k; CL = 300 pF 7 12 -- V/s BW-3dB RL = 10 k; CL = 10 pF THAT1200 THAT1203 THAT1206 -- -- -- 22 27 34 -- -- -- MHz MHz MHz GER(OUT) f = 1 kHz; RL = 2 k -- 0 0.05 dB VO At max differential input THAT1200 THAT1203 THAT1206 21 21 18 21.5 21.5 18.5 -- -- -- dBu dBu dBu ISC ICMSC RL = RLcm = 0 At CM output -- -- 25 10 -- -- mA mA RLmin RLCMmin At CM output 2 10 -- -- -- -- k k CLmax CLCMmax At CM output -- -- -- -- 300 50 pF pF Slew Rate Small Signal Bandwidth Maximum Output Voltage Output Short Circuit Current Minimum Resistive Load Maximum Capacitive Load Cb In- Typ BW = 20 kHz THAT1200 THAT1203 THAT1206 Output Offset Voltage Output Gain Error Min CM Out R5 + 100R 220u Gnd R3 600R Vcc In+ 2 C4 C1 56p 8 7 100n CMout Vcc Out CMin Ref 6 Vee 3 1 In+ 4 U1 In- R6 5 R1 200k R2 200k 100R R4 2k Main Out Gnd THAT120x C3 C2 300p 100n Ext. DC Source Vee Gnd Figure 2. THAT1200-series test circuit THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com Page 4 InGenius High CMRR-Balanced Input Line Receiver IC Theory of Operation The InGenius concept was invented to overcome limitations of traditional approaches to active input stage design. Because of the many misconceptions about the performance of conventional input stages, and to set the stage for discussion of InGenius, we will begin by discussing conventional approaches. VinR1 R2 - The Impact of Driving Source Impedance However, in the real world, where sources have non-zero output impedance, the situation is more complicated. Figure 4 shows the equivalent circuit of a real-world differential application. In this case, the source connected to the differential receiver has source impedance of Rs+ in the positive side, and Rsin the negative side. Because these two resistive elements are in series with each other, they only serve to attenuate the signal Vdiff relative to the input impedance of the differential stage. Even if they (Rs+ and Rs-) are mismatched, this attenuation is the only consequence of non-zero source impedance. Vout + Vdiff R3 R4 Vin- Rs- Vin+ - R1 Vdiff + 2 + Figure 3. Basic differential amplifier - R2 - Vout + Vdiff 2 R3 R4 Vin+ Rs+ Traditional Balanced Input Stages The typical balanced input stage used in most professional audio products is shown in figure 3. It amplifies differential signals but rejects common-mode interference based on the precision of the match in the ratios R2/R1 and R4/R3. In this circuit, Vout = (Vin + )(1+ R2 R4 R1 ) ( R3 + R4 ) R + (Vin - ) R2 1 In modern integrated circuits (such as the THAT 1240 series), these resistor ratios are trimmed (usually with a laser) to extreme precision, resulting in typical match of 0.005%. So, one can assume that R2/R1=R4/R3. In this case, we can simplify this formula as follows: Vout = (Vin + )(1 + R2 R2 R1 )( R1 ) R2 1 R2 (1+ R ) Figure 4. Basic differential amplifier showing mismatched source impedances + (Vin - ) R 1 1 yielding: Vout = [(Vin + ) + (Vin - )] R R2 1 However, the same cannot be said for common-mode interference. Common-mode signals appear in phase between the two input terminals. For in-phase signals, the source impedances can have significant impact. As shown in Figure 5, this is because each leg of the source impedance forms a voltage divider when it interacts with the input impedance of its respective input of the differential amplifier. Because the + and - inputs of the operational amplifier are forced by feedback to maintain the same voltage, the individual common-mode impedances of each side of the differential stage are: ZCM + = R 3 + R 4 ; and CMRR Depends on Resistor Match When driven from a theoretical, true voltage source, the precisely matched resistor ratios deliver extremely high CMRR. With perfectly matched resistor ratios, for Vin+=-Vin- (this corresponds to a pure differential input signal), then Vout=2*(Vin+)*R2/R1. On the other hand, for Vin+=Vin- (this corresponds to a pure common mode signal), then Vout=0. This produces an infinite common mode rejection ratio. Any difference between the ratios R2/R1 and R4/R3 will lead to less than perfect CMRR. ZCM - = R3 + R4 R3 R1 . So long as R1=R3, these impedances, which form a load for common-mode input signals, are identical. (This is why, in discrete applications, it is wise to choose R1=R3, and why, in all integrated applications, these resistors are chosen to be the same value.) The total common-mode input impedance is THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com 600033 Rev 00 ZCM = Page 5 R3 + R4 R3 1+ R1 . In- Source Impedance Mismatches Ruin Good CMRR Even if R1 perfectly matches R3, any mismatch in the source impedances RS+ and RS- will cause the voltage dividers to be unequal between the two input legs. This means that Vin- and Vin+ in Figure 5 are no longer equal to each other. Essentially, imbalances in the two source impedances convert the common mode signal to a differential signal, which will not be rejected by the input stage no matter how high its theoretical CMRR is. To see how this plays out in practice, consider the case of a typical unity-gain conventional balanced line receiver with common-mode input impedance of 10 k. In such cases, a source impedance imbalance of only 10 can degrade CMRR to no better than 66 dB. A 10 mismatch could be caused by tolerances in coupling capacitors or output build-out resistors. The situation becomes much worse when a conventional balanced line receiver is driven from an unbalanced source, where it is common to use at least 100 in series with the output for protection. (With a 100 unbalanced output impedance, and a 10 k common-mode input impedance, even a perfect simple input stage can provide no more than 46 dB CMRR!) Vin- Rs- R1 R2 Zcm Vcm Vout Zcm+ R3 Rs+ R4 Vin+ Zcm+ Figure 5. Basic differential amplifier driven by common-mode input signal The best solution to this problem is to increase the line receiver's common-mode input impedance enough to minimize the unbalancing effect of the voltage divider. Preferably, this means achieving input impedances on the order of several megohms. However, in a conventional differential amplifier, this requires high-value resistances in the circuit. High resistance carries with it a high noise penalty, making this straightforward approach impractical for quality audio devices. Instrumentation Amplifiers Some designers prefer the more elaborate approach of an instrumentation amplifier, as shown in Figure 6. In this circuit, it is possible to raise the in- Ri1 + OA1 - In+ R1 R2 R3 OA3 + R4 - OA2 + - Out Ri2 Figure 6. Instrumentation amplifier put impedance (both common-mode and differential) of the stage because the load seen by the source is decoupled by OA1 and OA2 from the balanced stage (OA3 along with R1, R2, R3, and R4). In this circuit, ZCM- = Ri1, and ZCM+ = Ri2. To retain 90 dB CMRR in the face of a 10 mismatch in source impedance would require Ri1 and Ri2 to be > 317 k. Of course, any difference in the values of Ri1 and Ri2 themselves would further unbalance common mode signals as well, so these resistors would ideally be trimmed just like the resistors in the single opamp stage of Figure 3. Unfortunately for this approach, it is difficult and expensive to make precision trimmed resistors with such high values. Furthermore, since the input bias current for amplifiers OA1 and OA2 flows through these resistors, their input currents must be extremely low if they are not to cause significant offsets. Practically, this necessitates using FET input stages for OA1 and OA2. While FETs may be a viable alternative, it is difficult to achieve with them the low noise performance of modern bipolar input stages. Transformer Input Stages From the point of view of common mode input impedance, as well as that of electrical isolation, a transformer in front of the first active input stage is really the best possible solution. Transformers are the only approach of which we are aware that provides true electrical isolation with reasonable fidelity. Furthermore, their common-mode input impedance is easily extremely high (tens of Megohms), and almost completely decoupled from their differential input impedance. But, transformers have many other limitations. They do not offer dc coupling, and suffer from saturation at low frequencies unless they are physically large and carefully made. Again, unless they are carefully made (which usually equates to high cost), they introduce phase shift at high audio-band frequencies. Furthermore, they tend to be big and heavy and pick up external magnetic fields, some- THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com Page 6 InGenius High-CMRR Balanced Input Line Receiver ICs times making it difficult to locate transformer-coupled equipment to avoid interference. Fortunately, audio equipment usually does not require true electrical isolation. In most cases, transformers out-perform conventional input stages only because they excel at rejecting common-mode signals in real-world situations. It is no coincidence that the InGenius concept was developed by an individual responsible for manufacturing the world's premier line of audio transformers (Bill Whitlock, of Jensen Transformers). Bill's InGenius technology offers all the advantages of solid state input stages, including dc coupling, negligible phase shift from dc to beyond the edge of the audio band, and vanishingly low distortion, along with the primary advantage of a transformer: extremely high common-mode input impedance. The InGenius Approach The InGenius approach to balanced line receivers uses bootstrapping to increase common mode input impedance. With bootstrapping, we first create a replica of the common mode signal, and then feed it back appropriately to the inputs to increase the input impedance. Because doing this in a differential amplifier involves additional complications, it is useful to review the bootstrap concept with a single-ended design first. We will then show how Bill Whitlock applied that concept to the differential case. The cutoff frequency of the filter formed by Cb and Ra/Rb is determined primarily by the values of Cb and Rb. (Because so little current flows in Ra, it is hardly involved in this filter.) Input impedance Zin; at frequency f, is described the following equation: 1+( Zin = (R a + R b ) 1+(1- G) 2( However, for high-frequency AC signals (where Cb is effectively a short), amplifier A drives the junction of Ra and Rb through Cb to nearly the same AC voltage as Vin. As a result, practically no AC current flows through Ra. This effectively increases the input impedance seen at Zin. f 2 fD ) where fn = 1 R a R b ) Cb a + Rb 2 ( R fD= 2 R1 b Cb For example, if Ra and Rb are 10 k each, ZinDC is 20 k. This resistance provides a DC path for amplifier bias current. At higher frequencies, the bootstrap greatly increases the input impedance, limited ultimately by how close gain G approaches unity. R6 IN- OA1 R1 R2 OA4 OA3 +1 R10 24K R7 - +1 Bootstrapping: a Simple Single-Ended Example To illustrate the concept behind bootstrapping, consider the the single-ended bootstrap shown in Figure 7. In this circuit, amplifier A is configured for unity gain, and can be considered to have infinite input impedance. Capacitor Cb blocks DC, so at DC, the input impedance, Zin , is Ra+Rb. f 2 fn ) R11 24K R8 Vout + R3 R4 +1 IN+ R9 REF OA2 R5 24K CM IN CM OUT Cb Figure 8. THAT1200-series equivalent circuit diagram Common Mode Bootstrapping in an Instrumentation Amplifier = InGenius Vin Rs V Zin Ra [(R6+R7)||(R8+R9)] Cb A Rb [R5] G=1 Figure 7. Single-ended bootstrap topology The genius behind Bill Whitlock's invention was to recognize that in an instrumentation amplifier, it is possible bootstrap the common-mode signal to increase common-mode input impedance. This is the concept behind the InGenius patents. To see how this works, refer to the circuit of Figure 8. Like Figure 1, Figure 8 shows an equivalent circuit for the THAT 1200-series ICs. OA1 and OA2 are high input-impedance, unity-gain buffers feeding differential amplifier OA3 in an instrumentation amplifier configuration. OA4 is a third high input-impedance, unity-gain buffer. With R10 = R11, the voltage at the input to OA4 will be equal to the common-mode component of the input signal. OA4 buffers this signal, and feeds it back to both inputs via capacitor Cb and resistors R6, R7, R8, R9, and R5. Note that in most applications Cb is large (>100f). THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com 600033 Rev 00 Page 7 Similarly to the single-ended application above, at high frequencies, the junction of R7, R8, and R5 is driven through Cb to the same potential as the common-mode input voltage. Hence at high frequencies, no common-mode current flows in resistors R6 and R7, or R8 and R9. Since OA1 and OA2 have high input impedances, this effectively raises the input impedance seen at In+ and In- to high-frequency common-mode signals. Of course, for differential signals, the input impedance is (R6+R7+R8+R9). And, at DC, the common-mode input impedance is: ZCM DC = (R 6 + R7 )(R 8 + R 9 ) + R 5. R 6 + R7 + R 8 + R 9 DC bias for OA1 and OA2 is supplied through R5 and either R7 or R8. For the resistor values chosen for the 1200-series ICs, the input impedances ZCM and Zdiff, are described by the following equations: ZCM DC = 36 k ZCM ( f ) = 36 k 1+( 50240 Cb f ) 2 1+(73.8 Cb f ) 2 ; where f is the in- put frequency, Zdiff = R 6 + R7 + R 8 + R 9 = 48 k In order to get the most out of this topology, OA1 and OA2 must have high input impedance, and the common-mode gain loop (OA1, OA2, R10/R11 and OA4) must have precisely unity gain over the entire audio band. THAT Corporation integrated the InGenius parts in our complimentary dielectric isolation process because it offers very high bandwidth and low noise for relatively high-voltage applications like this one. This in turn makes it easier to meet these requirements, and typically, results in a maximum mid-audio-band ZinCM of > 20 M. Because OA1 and OA2 isolate the differential amplifier (OA3) from the effects of external source impedances, the CMRR of OA3 and its associated four resistors is determined solely by OA3's bandwidth and the precision of the resistor matching. Our complimentary DI process contributes to high bandwidth in OA3, and we use on-chip laser trimming to ensure extremely good matching, as well as precise gain, in those four thin-film resistors. Finally, perhaps the most common interfering signals that a good differential line receiver must reject is the power-line frequency: usually either 50 or 60 Hz and its harmonics. So, it is essential that the common-mode input impedance remain high down to 50 Hz, and up to at least to the edge of the audio band. While THAT's process and circuit design ensure the latter condition, the value of Cb will determine how low in frequency the common-mode input impedance will be increased. To maintain at least a 1 M common-mode input impedance, Cb should be at least 10 f. It is possible to solve the above equation for Cb in terms of the desired ZCM for a specific frequency. However, reaching a general closed-form solution is difficult and results in a very complex formula. The relatively simple formula below takes advantage of some approximation, and yields good results for ZCM between about 100 k and 10 M. Cb 0.553 x 10-3 Z CM f For additional information refer to: Balanced Lines in Audio Systems - Fact, Fiction, and Transformers, by Bill Whitlock, AES 97th Convention, Preprint 3917, October 1994 A New Balanced Audio Input Circuit for Maximum Common-mode Rejection in Real-world Environments, by Bill Whitlock, AES 101st Convention Preprint 4372, 1996. Common-Mode to Differential-Mode Conversion in Shielded Twisted-pair Cables (Shield-Current-Induced Noise), by Jim Brown & Bill Whitlock, AES 114th Convention, Preprint 5747, February 2003 THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com Page 8 InGenius High-CMRR Balanced Input Line Receiver ICs Applications 3 Basic Application RFI Protection At its most basic, THAT's 1200-series ICs need very little external support circuitry. As is shown in the basic application circuit of Figure 9, they need little else beyond positive and negative power supplies, a ground reference, the common-mode bootstrap capacitor, and input and output connections. Because all 1200-series ICs are wide bandwidth parts, it is important to provide bypass capacitors for both positive and negative supply rails within an inch or so of the part. Sharing supply bypass capacitors across several 1200-series ICs separated by several inches on a circuit board (as, for example, along the back panel of a multi-input product) is not recommended1. As an input stage, the 1200-series ICs are susceptible to RF interference (RFI). Like most semiconductor devices, if high levels of RF are permitted at the input pins of 1200-series parts, they may become nonlinear, which can create audible interference. Therefore, it is good design practice to filter unwanted high frequencies at the input of any product in which the 1200-series is used. The objective should be to prevent RF from entering the chassis, and especially, the circuit board of any devices using a 1200-series part. Generally, this is done by means of small capacitors connected between the signal inputs and chassis ground, with the capacitors located as physically close to the input connectors as possible. Cb + Vcc 220uF In- 8 2 7 IN- 5 C3 100nF CM IN CM OUT Vcc U1 120X OUT 6 OUT Vee In+ 3 REF IN+ 4 C4 100nF Figure 10 shows a basic, simple application circuit to protect the 1200 series against RFI. For many non-demanding applications, this simple circuit will suffice. C1 and C2 provide RF bypassing from pins 2 and 3 of the input XLR connector to chassis ground and the XLR connector's shell (which are tied together, ideally only at the XLR connector jack). RF picked up on the cable plugged into the connector is conducted by C1 and C2 to chassis ground. Chassis ground should connect to circuit ground through one (and only one) low inductance path, usually at the power supply connector. 1 Vee Cb 2 Figure 9. Basic 1200-series application circuit Bootstrap Capacitor Polarity Because the bootstrap capacitor, Cb, will usually be large (see formula on page 7) an electrolytic or tantalum capacitor is a logical choice. Such capacitors are normally polarized, though non-polarized types are available at higher cost. For the 1200-series, a polarized capacitor is appropriate, with the positive end towards CMout (pin 8), because of the direction of the input bias currents for internal opamps OA1 and OA2. Furthermore, because Cb never has much voltage across it2, it only needs to support a few tens of mV. Therefore, we recommend a 220 uF, 3V capacitor for Cb . 3 1 J1 XLR-F + 7 IN- C1 100pF NPO C2 100pF NPO 5 CM IN CM OUT Vcc U1 120X OUT Vee 3 C3 100nF 8 2 54 231 Vcc 220uF REF IN+ 4 6 OUT C4 100nF 1 Vee Figure 10. THAT1200 application with simple RFI protection 1 Lack of proper bypassing may not cause obvious problems at normal temperatures. We have seen cases in which improperly bypassed parts begin to draw excessive current when operated near their upper temperature limits. Close bypassing prevents this phenomenon. 2 Even at DC, C will not see much voltage, because the signal at the junction of R and R should closely equal the signal at the junction of R b 7 8 10 and R11. With OA4 configured for unity gain, both ends of Cb see the same signal - AC and DC - except for offsets. 3 Good practice to protect inputs against RFI is a science in itself, and it is beyond the scope of this data sheet to provide more than a glimpse of this complex subject. We refer the interested reader to: Considerations in Grounding and Shielding Audio Devices, by Stephan R. Macatee, JAES Volume 43, Number 6, pp.472-483; June 1995; Noise Susceptibility in Analog and Digital Signal Processing Systems, by Neil A. Muncy, AES 97th Convention Preprint 3930, October 1996. THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com 600033 Rev 00 Page 9 2 3 1 Cb 220uF + J1 XLR-F R1 5 423 1 Vcc (see text) 100R R2 2 C2 470pF 8 IN- C1 470pF R3 4k7 C3 100pF C4 100nF 5 CM IN 3 IN+ 7 CM OUT Vcc 120X REF 1 100R U1 OUT Vee OUT 6 C5 100nF 4 Vee Figure 11. THAT1200 application with recommended RFI protection. The one drawback to this circuit is that C1 and C2 will reduce the common-mode input impedance of the 1200 stage to ~ 80 k at 20 kHz. Of course, this figure drops by a factor of ten for each decade increase in frequency. Additionally, any mismatch between these capacitors can unbalance an interfering common-mode signal, thus making it impossible for the 1200 to reject it. Figure 11 shows a more elaborate and robust circuit for RFI protection. While more complex, it offers many improvements over the circuit of Figure 10 that make it worth serious consideration. First, C1 and C2 are larger than their counterparts in Figure 10. Because they are in series with each other, they act as a 235 pf capacitor across pins 2 and 3 of the XLR. This allows them to be effective at lower frequencies. Second, because their center point ties to chassis ground through a smaller, common capacitor (C3, 100 pf), any mismatch in their values has less tendency to unbalance common-mode signals compared to the circuit of figure 104. Third, because they are driven from the common-mode bootstrap circuit through R3, this common point gains the benefit of the InGenius common-mode bootstrapping. Finally, R1 and R2 provide some additional buildout impedance against which the bypass capacitors can work, making the entire network more effective against strong RF signals. products, they may be exposed to unpredictable and possibly extreme ESD. For ESD to affect the InGenius operation, it would have to be conducted via one of the input connectors to the device itself. This is unlikely, but certainly not impossible. Not surprisingly, THAT's own testing indicates that repeated exposure to high levels (above 1 kV) of ESD through pins 2 and/or 3 of the input XLR connector can adversely affect the device's CMRR, and may cause failure if the ESD reaches sufficiently high levels. If the application requires surviving such ESD incidents, THAT recommends the circuit of either Figure 13 or 14. Figure 13 is appropriate for the 1203 and 1206, both of which support input signals that swing higher than the supply rails. This arrangement of signal and Zener diodes permits the maximum allowable (audio) input signal to reach the IC's input Vcc Rc Vee Vcc ESD Protection All the 1200-series ICs contain internal over-voltage protection circuitry for the two input pins. Figure 12 is an equivalent circuit of this circuitry. These internal diodes provide modest protection against common low-voltage ESD incidents. However, because these ICs are intended to be connected directly to the input connectors of electronic 4 Ra IN+ CM IN Rd Rb IN- Vee Figure 12. Internal input protection circuitry For additional information refer to the publications listed on page 7. THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com Page 10 InGenius High-CMRR Balanced Input Line Receiver ICs Cb 220uF + Vcc 2 3 1 J1 XLR-F D5 12V 100R R2 D2 D1 R1 5 423 1 Vcc (see text) 2 8 IN- C1 470pF C2 470pF R3 5 4k7 C3 100pF 3 100R CM IN CM OUT 7 OUT REF IN+ 4 1 OUT 6 C5 100nF Vee D6 12V RFI protection U1 Vcc 1203 or 1206 Vee D4 D3 C4 100nF Vee ESD protection Figure 13. RFI and ESD protection for the 1203 and 1206 pins, but directs high-energy ESD impulses to the rails. So long as the supply rails are adequately decoupled and the diodes themselves are reasonably robust, all but the most drastic ESD events will not affect the 1203/6 IC itself. Figure 14, which works similarly, is appropriate for the 1200, which is limited to input signals up to about the supply rails. Please look to our web site for future application notes regarding this subject. D1 through D4 in figures 13 and 14 can be 1N4148 types, while the 12V Zener diodes should be 1/2 watt to allow them to support relatively high currents with 12V across them for the short duration of an ESD pulse. AC Coupling Inputs Note that we know of no circuit that will protect against really strong ESD, such as lightning, so please do not take this advice as suggesting that the circuits of Figures 13 and 14 are completely immune to ESD! It is not necessary to AC couple the 1200-series inputs. However, if desired, we recommend the circuit of Figure 15. In this circuit Resistors R1 and R2 benefit from the common-mode bootstrap via their connection to CMin. This reduces their impact on common-mode input impedance, preserving the ben- We will continue to work to find real world solutions to the often difficult problem of ESD protection. 2 3 1 5 423 1 J1 XLR-F R2 Vcc (see text) D2 D1 R1 100R Cb 220uF + Vcc 2 8 IN- C1 470pF C2 470pF 100R R3 5 4k7 C3 100pF 3 CM IN CM OUT 7 Vcc 1200 Vee D4 D3 C4 100nF IN+ REF 1 4 U1 OUT C5 100nF Vee RFI protection Vee ESD protection Figure 14. RFI and ESD protection for the 1200 THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com 6 OUT 600033 Rev 00 Page 11 R1 100k Cb + Vcc 220uF C1 10uF IN- 5 R2 100k CM IN CM OUT 7 Vcc 120X Vee 3 In+ C2 10uF THAT1200-series or THAT1240-series 8 2 In- C3 100nF REF IN+ 4 Gnd U1 OUT 6 OUT Vcc Ref In+ Vcc Vout Vee CM in or Sense 1 + CM out or N/C In- InIn+ C4 100nF load only for THAT1200-series Vee Cb Short only for THAT1240-series Vee Figure 15. AC coupling 1200-series inputs Figure 16. Dual PCB layout for THAT120X and THAT124X efit of InGenius, while providing a discharge path for charge in the input coupling capacitor. Choose capacitors large enough to present minimal impedance to the lowest signals of interest, compared to the differential input impedance of the InGenius IC (48 k). If desired, this may be combined with the RF protection of Figures 10 or 11, and ESD protection of figures 13 or 14. ries is pin-compatible with similar parts available from other manufacturers, this offers the possibility of several reduced-performance second sources if 1200-series ICs were for unavailable for any reason. Dual Layout Option InGenius ICs are available only from THAT Corporation. Should a manufacturer wish to provide some alternatives to the 1200 series, it is possible to lay out the circuit board for a 1200 such that a THAT 1240-series (conventional) balanced input stage could be substituted in a pinch. Since the 1240 se- The PCB layout shown in Figure 16 provide manufacturers with the option to load a PCB with either of these input stages. Note that these figures are not to scale. The interconnects should be as short as practical, constrained only by component size and relevant manufacturing considerations. When a THAT 1200-series IC is installed, capacitor Cb is connected between CMin and CMout. No connection is made between Vout and CMin. When the THAT 1240-series is used, capacitor Cb is removed, and a jumper connects the Vout and Sense pins. Information furnished by THAT Corporation is believed to be accurate and reliable. However no responsibility is assumed by THAT Corporation for its use nor for any infringements of patents or other rights of third parties which may result from its use. LIFE SUPPORT POLICY THAT Corporation products are not designed for use in life support equipment where malfunction of such products can reasonably be expected to result in personal injury or death. The buyer uses or sells such products for life suport application at the buyer's own risk and agrees to hold harmless THAT Corporation from all damages, claims, suits or expense resulting from such use. CAUTION: THIS IS AN ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE. It can be damaged by the currents generated by electrostatic discharge. Static charge and therefore dangerous voltages can accumulate and discharge without detection causing a loss of function or performance to occur. Use ESD preventative measures when storing and handling this device. Unused devices should be stored in conductive packaging. Packaging should be discharged before the devices are removed. ESD damage can occur to these devices even after they are installed in a board-level assembly. Circuits should include specific and appropriate ESD protection. THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com Page 12 InGenius High-CMRR Balanced Input Line Receiver ICs Package and Soldering Information The THAT 1200 series is available in both 8-pin mini-DIP and 8-pin SOIC packages. The package dimensions are shown in Figures 17 and 18 below, while pinouts are given in Table 1 on page 1. The 1200 series is available only in lead-free, "green" packages (both SO and DIP). The lead frames are copper, plated with successive layers of nickel paladium, and gold. This approach makes it possible to solder these devices using lead-free and lead-bearing solders. The plastic mold compound contains no hazardous substances as specified in the RoHS directive. The surface-mount package has been qualified using reflow temperatures as high as 260C for 10 seconds. This makes them suitable for use in a 100% tin solder process. Furthermore, the 1200 series has been qualified to a JEDEC moisture sensitivity level of MSL1. No special humidity precautions are required prior to flow soldering the parts. The through-hole package leads can be subjected to a soldering temperature of 300 C for up to 10 seconds. 0-8 F E B J C 1 B H 1 hx45 D G A C K F H G A a1 ITEM A a1 B C D E F G H h MILLIMETERS 4.78/5.00 0.10/0.20 3.81/3.99 5.84/6.20 0.36/0.46 1.27 1.52/1.73 0.18/0.25 0.41/0.89 0.31/0.71 D INCHES 0.188/0.197 0.004/0.008 0.150/0.157 0.230/0.244 0.014/0.018 0.050 0.060/0.068 0.007/0.010 0.016/0.035 0.012/0.027 Figure 17. -S (SO) version package outline drawing E ITEM A B C D E F G H J K MILLIMETERS 9.520.10 6.350.10 7.49/8.13 0.46 2.54 3.68/4.32 0.25 3.180.10 8.13/9.40 3.300.10 INCHES 0.3750.004 0.2500.004 0.295/0.320 0.018 0.100 0.145/0.170 0.010 0.1250.004 0.320/0.370 0.1300.004 Figure 18. -P (DIP) version package outline drawing THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 508 478 9200; Fax: +1 508 478 0990; Web: www.thatcorp.com