SRDA05-4 and SRDA12-4 RailClamp(R) Low Capacitance TVS Array PROTECTION PRODUCTS Description Features RailClamp(R) TVS arrays are low capacitance ESD protection devices designed to protect sensitive components from overvoltage caused by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning surge. It offers desirable characteristics for board level protection including fast response time, low operating and clamping voltage, and no device degradation. * Transient protection for high-speed data lines to The unique design incorporates surge rated, low capacitance steering diodes and a TVS diode in a single package. During transient conditions, the steering diodes direct the transient current to ground via the internal low voltage TVS. The TVS clamps the transient voltage to a safe level. The low capacitance array configuration allows the user to protect up to four data lines. The SRDA05-4 may be used to protect lines operating up to 5 volts while the SRDA12-4 may be used on lines operating up to 12 volts. * * * * * * IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 20-25A (8/20s) Array of surge rated diodes with internal TVS diode Protects four I/O lines Low capacitance (<15pF) Low operating voltage: 5V or 12V Low clamping voltage Solid-state technology Mechanical Characteristics * * * * * JEDEC SOIC-8 Package Pb-Free, Halogen Free, RoHS/WEEE Compliant Lead Finish: Matte Sn Marking : Marking Code Packaging : Tape and Reel Applications These devices are in an 8-pin SOIC package. It measures 3.9 x 4.9mm. The high surge capability means it can be used in high threat environments in applications such as CO/CPE equipment, telecommunication lines, and video lines. * * * * * * T1/E1 secondary IC Side Protection T3/E3 secondary IC Side Protection Analog Video Protection Microcontroller Input Protection Base stations I2C Bus Protection Circuit Diagram Schematic and Pin Configuration 2, 3 I/O 1 I/O 2 I/O 3 I/O 1 1 8 GND NC 2 7 I/O 4 NC 3 6 I/O 3 I/O 2 4 5 GND I/O 4 5, 8 SO-8 (Top View) SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Rev 7.1 www.semtech.com 1 Semtech Proprietary & Confidential Absolute Maximum Ratings Rating Symbol Value Units Peak Pulse Power (tp = 8/20s) PPK 500 W Peak Forward Voltage (IF = 1A, tp = 8/20s) VPP 1.5 V Lead Soldering Temperature TL 260 (10 sec.) O Operating Temperature TOP -40 to +85 O Storage Temperature TSTG -55 to +150 O C C C Electrical Characteristics (T=25OC unless otherwise specified) SRDA05-4 Parameter Symbol Conditions Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage Min. Typ. VRWM VBR It = 1 mA IR VRWM = 5V VC Max. Units 5 V 6 tp = 8/20s Peak Pulse Current IPP tp = 8/20s Junction Capacitance CJ VR = 0V, f = 1MHz V 10 IPP = 1A 9.8 IPP = 10A 12 IPP = 25A 20 25 I/O to GND 8 I/O to I/O 4 15 A V A pF SRDA12-4 Parameter Symbol Conditions Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current VBR VC It = 1 mA Units 12 V V VRWM = 12V tp = 8/20s IPP tp = 8/20s Junction Capacitance CJ VR = 0V, f = 1MHz Rev 7.1 Max. 13.3 Peak Pulse Current SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Typ. VRWM IR Clamping Voltage Min. 1 IPP = 1A 17 IPP = 10A 20 IPP = 20A 25 20 I/O to GND 8 I/O to I/O 4 www.semtech.com 15 A V A pF 2 Semtech Proprietary & Confidential Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve 120 10 TA = 25OC Peak Pulse Power - PPP (kW) 100 % of Rated Power or IPP 1 0.1 80 60 40 20 0.01 0.1 1 10 100 DR040514-25-125-150 0 1000 0 Pulse Duration - tp (s) Pulse Waveform 50 75 100 Ambient Temperature - TA (OC) 150 25 100 SRDA12-4 Waveform Parameters: tr = 8s td = 20s 80 70 20 Clamping Voltage - VC (V) 90 e-t 60 50 40 td = IPP/2 30 20 15 SRDA05-4 10 5 10 0 125 Clamping Voltage vs. Peak Pulse Current 110 Percent of IPP 25 TA = 25OC Waveform: tp= 8x20s 0 5 10 15 20 25 0 30 Time (s) 0 5 10 15 20 25 30 Peak Pulse Current - IPP (A) Variation of Capacitance vs. Reverse Voltage Forward Voltage vs. Forward Current 4 1.4 3.5 SRDA05-4 1 Forward Voltage - VC (V) CJ (VR) / CJ(VR = 0) 1.2 SRDA12-4 0.8 0.6 0.4 SRDA12-4 or SRDA05-4 3 2.5 2 1.5 1 0.5 0.2 TA = 25OC Waveform: tp= 8x20s f = 1 MHz 0 0 0 2 SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 4 6 8 Reversed Voltage -VR (V) Rev 7.1 10 12 14 0 www.semtech.com 5 10 15 20 25 30 Peak Pulse Current - IPP (A) 3 Semtech Proprietary & Confidential Application Information Device Connection Options for Protection of Four High-Speed Lines The SRDA TVS is designed to protect four data lines from transient over voltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus VF) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at Pins 1, 4, 6 and 7. The negative reference is connected at Pins 5 and 8. These pins should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference is connected at pins 2 and 3. The options for connecting the positive reference are as follows: 1. To protect data lines and the power line, connect pins 2 & 3 directly to the positive supply rail (VCC). In this configuration the data lines are referenced to the supply voltage. The internal TVS prevents overvoltage on the supply rail. 2. The SRDA can be isolated from the power supply by adding a series resistor between Pins 2 and 3 and VCC. A value of 10k is recommended. The internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. 3. In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pins 2 and 3 are not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one VF drop). ESD Protection With RailClamps RailClamps are optimized for ESD protection using the rail-to-rail topology. Along with good board layout, these devices virtually eliminate the disadvantages of using discrete components to implement this topology. Consider the situation shown in Figure 1 where discrete diodes or diode arrays are configured for rail-to rail protection on a high speed line. During positive duration ESD events, the top diode will be forward biased when the voltage on the protected line exceeds the reference voltage plus the VF drop of the diode. For negative events, the bottom diode will be biased. SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Rev 7.1 Data Line and Power Supply Protection Using VCC as Reference I/O 1 I/O 2 VCC 1 8 2 7 3 6 4 5 I/O 3 I/O 4 Data Line Protection with Bias and Power Supply Isolation Resistor I/O 1 I/O 2 VCC 10K 1 8 2 7 3 6 4 5 I/O 3 I/O 4 Data Line Protection Using Internal TVS as Reference I/O 1 I/O 2 1 8 NC 2 7 NC 3 6 4 5 I/O 3 I/O 4 www.semtech.com 4 Semtech Proprietary & Confidential Application Information When the voltage exceeds the VF, at first approximation, the clamping voltage due to the characteristics of the protection diodes is given by: VCC i1 VC = VCC + VF (for positive duration pulses) VC = -VF (for negative duration pulses) However, for fast rise time transient events, the effects of parasitic inductance must also be considered as shown in Figure 2. Therefore, the actual clamping voltage seen by the protected circuit will be: Figure 1 - Rail-To-Rail Protection Topology (First Approximation) ESD current reaches a peak amplitude of 30A in 1ns for a level 4 ESD contact discharge per IEC 61000-4-2. Therefore, the voltage overshoot due to 1nH of series inductance is: LP V = LPdiESD/dt = 1X10-9 (30 / 1X10-9) = 30V VCC = REF1 Example: Consider a VCC = 5V, a typical VF of 30V (at 30A) for the steering diode and a series trace inductance of 10nH. The clamping voltage seen by the protected IC for a positive 8kV (30A) ESD pulse will be: Protected IC Rev 7.1 + VTV S - IESD I/O GND = REF2 Figure 2 - The Effects of Parasitic Inductance When Using Discrete Components to Implement Rail-To-Rail Protection This does not take into account that the ESD current is directed into the supply rail, potentially damaging any components that are attached to that rail. Also note the high VF of the discrete diode. It is not uncommon for the VF of discrete diodes to exceed the damage threshold of the protected IC. This is due to the relatively small junction area of typical discrete components. It is also possible that the power dissipation capability of the discrete diode will be exceeded, thus destroying the device. The RailClamp is designed to overcome the inherent disadvantages of using discrete signal diodes for ESD suppression. The RailClamp's integrated TVS helps to mitigate the effects of parasitic inductance in the power supply connection. During an ESD event, the current will be directed through the integrated TVS to ground. SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 -VF i2 VC = VCC + VF+ LPdiESD/dt (for positive duration pulses) VC = -VF - LGdiESD/dt (for negative duration pulses) VC = 5V + 30V + (10nH X 30V/nH) = 335V VF + VCC www.semtech.com LP VCC = REF1 Protected IC + VTV S - IESD I/O GND = REF2 Figure 3 - Rail-To-Rail Protection Using RailClamp TVS Arrays 5 Semtech Proprietary & Confidential Application Information The total clamping voltage seen by the protected IC due to this path will be: VC = VF(RailClamp) + V TVS This is given in the datasheet as the rated clamping voltage of the device. For an SRDA05-4 the typical clamping voltage is <16V at IPP=30A. The diodes internal to the RailClamp are low capacitance, fast switching devices that are rated to handle high transient currents and maintain excellent forward voltage characteristics. Using the RailClamp does not negate the need for good board layout. All other inductive paths must be considered. The connection between the positive supply and the SRDA and from the ground plane to the SRDA must be kept as short as possible. The path between the SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Rev 7.1 SRDA and the protected line must also be minimized. The protected lines should be routed directly to the SRDA. Placement of the SRDA on the PC board is also critical for effective ESD protection. The device should be placed as close as possible to the input connector. The reason for this is twofold. First, inductance resists change in current flow. If a significant inductance exists between the connector and the TVS, the ESD current will be directed elsewhere (lower resistance path) in the system. Second, the effects of radiated emissions and transient coupling can cause upset to other areas of the board even if there is no direct path to the connector. By placing the TVS close to the connector, it will divert the ESD current immediately and absorb the ESD energy before it can be coupled into nearby traces. www.semtech.com 6 Semtech Proprietary & Confidential Typical Application UPSTREAM USB PORT VBUS DOWNSTREAM USB PORT RT VBUS D+ VBUS D+ RT DGND VBUS CT SR05 CT USB Controller DGND VBUS SRDA05-4 DOWNSTREAM USB PORT RT VBUS D+ RT CT DGND CT Univeral Serial Bus ESD Protection PTC R1 RTIP R3 R2 RRING T1/E1 Transceiver T1 8 PTC 5 SRDA05-4 1 TTIP LC01-6 4 PTC R4 R5 T2 TRING LC01-6 PTC T1/E1 Interface Protection (GR-1089 Long Haul) SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Rev 7.1 www.semtech.com 7 Semtech Proprietary & Confidential Outline Drawing - SO-8 DIM A A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc D e N 2X E/2 E1 1 E 2 ccc C 2X N/2 TIPS e/2 B D aaa C SEATING PLANE DIMENSIONS MILLIMETERS MIN NOM MAX 1.75 0.225 0.10 1.30 1.40 1.50 0.39 0.47 0.20 0.24 4.80 4.90 5.00 3.80 3.90 4.00 5.80 6.00 6.20 1.27 BSC 0.25 0.50 0.50 0.80 (1.05) 8 0 8 0.10 0.25 0.20 A2 C A A1 bbb h H bxN C A-B D c GAGE PLANE 0.25 L 01 (L1) DETAIL A SEE DETAIL A SIDE VIEW NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H- . 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AA. Land Pattern - SO-8 X DIMENSIONS (C) G Z Y DIM MILLIMETERS C G P X Y Z (5.20) 3.00 1.27 0.60 2.20 7.40 P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A, RLP NO. 300A. SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Rev 7.1 www.semtech.com 8 Semtech Proprietary & Confidential Marking Code SC YYWW SRDA05-4 XXXXX SC YYWW SRDA12-4 XXXXX Notes: YYWW = Date Code XXXXX = Country of Assembly Tape and Reel Specification Pin 1 Location User Direction of Feed Ordering Information Part Number Qty per Reel Reel Size SRDA05-4.TLT SRDA12-4.TLT 3000 3000 13 Inch 13 Inch SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Rev 7.1 www.semtech.com 9 Semtech Proprietary & Confidential Important Notice Information relating to this product and the application or design described herein is believed to be reliable, however such information is provided as a guide only and Semtech assumes no liability for any errors in this document, or for the application or design described herein. Semtech reserves the right to make changes to the product or this document at any time without notice. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. Semtech warrants performance of its products to the specifications applicable at the time of sale, and all sales are made in accordance with Semtech's standard terms and conditions of sale. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE COULD BE REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER'S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise. The Semtech name and logo are registered trademarks of the Semtech Corporation. All other trademarks and trade names mentioned may be marks and names of Semtech or their respective companies. Semtech reserves the right to make changes to, or discontinue any products described in this document without further notice. Semtech makes no warranty, representation or guarantee, express or implied, regarding the suitability of its products for any particular purpose. All rights reserved. (c) Semtech 2017 Contact Information Semtech Corporation 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111, Fax: (805) 498-3804 www.semtech.com SRDA05-4 and SRDA12-4 Final Datasheet 11/20/2018 Rev 7.1 10 Semtech Proprietary & Confidential