HEF4060BP,652"" - NXP SEMICONDUCTORS

1. General description

The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three

oscillator terminals (RS, REXTand CEXT), ten buffered outputs (Q3 to Q9 and Q11 to

Q13) and an overriding asynchronous master reset input (MR).

The oscillator configuration allows design of either RC or crysta l oscillator circuits. The

oscillator may be replaced by an external clock signal at input RS. The clock input’s

Schmitt-trigger action makes it highly tolerant to slower clock rise and fall times. The

counter advances on the negative-going transition of RS. A HIGH level on MR resets the

counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of other input conditions.

It operates over a recommended VDD power supply r ange of 3 V to 15 V referenced to VSS

(usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is

also suitable for use over the full industrial (−40 °C to +85 °C) temperature range.

2. Features and benefits

Tolerant of slow clock rise and fall times

Fully static operation

5 V, 10 V, and 15 V parametric ratings

Standardized symmetrical output characteristics

Inputs and outputs are protected against electro static effect s

Operates across the full industrial temperature range −40 °C to +85 °C

Complies with JEDEC standard JESD 13-B

3. Applications

Industrial

4. Ordering information

HEF4060B

14-stage ripple-carry binary counter/divider and oscillator

Rev. 6 — 11 May 2011 Product data sheet

Tabl e 1. Ordering information

All types operate from

−

C to +85

Type number Package

Name Description Version

HEF4060BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

HEF4060BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

Product data sheet Rev. 6 — 11 May 2011 2 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

5. Functional diagram

6. Pinning information

6.1 Pinning

Fig 1. Functional di agram

001aae65

14-STAGE BINARY COUNTER

10 9

REXT CEXT

Q11

Q12

Q13

Fig 2. Logic diag ram

001aae65

FF1

FF4

FF10

FF12

FF14

Q3 Q9 Q11 Q13MR

REXT

CEXT

Fig 3. Pin configuratio n

HEF4060B

Q11 VDD

Q12 Q9

Q13 Q7

Q5 Q8

Q4 MR

Q6 RS

Q3 REXT

VSS CEXT

001aae653

Product data sheet Rev. 6 — 11 May 2011 3 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

6.2 Pin description

7. Functional description

[1] H = HIGH voltage level; L = LOW voltage level; ↑= LOW-to-HIGH clock transition; ↓HIGH-to-LOW clock transition.

8. Limiting values

[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.

[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.

Table 2. Pin description

Symbol Pin Description

Q11 to Q13 1, 2, 3 counter output

Q3 to Q9 7, 5, 4, 6, 14, 13, 15 counter outpu t

VSS 8 ground supply voltage

CEXT 9 external capacitor connection

REXT 10 oscillator pin

RS 11 clock input/oscillato r pin

MR 12 master reset

VDD 16 supply voltage

Table 3. Function table[1]

Input Output

RS MR Q3 to Q9 and Q11 to Q13

↑L no change

↓L count

XHL

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDD supply voltage −0.5 +18 V

IIK input clamping current VI<−0.5 V or VI>V

DD + 0.5 V - ±10 mA

VIinput voltage −0.5 VDD + 0.5 V

IOK output clamping current VO<−0.5 V or VO>V

DD + 0.5 V - ±10 mA

II/O input/output current - ±10 mA

IDD supply current - 50 mA

Tstg storage temperature −65 +150 °C

Tamb ambient temperature −40 +85 °C

Ptot total power dissipation Tamb −40 °C to +85 °C

DIP16 package [1] -750mW

SO16 package [2] -500mW

P power dissipation per output - 100 mW

Product data sheet Rev. 6 — 11 May 2011 4 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

9. Recommended operating conditions

10. Static characteristics

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

VDD supply voltage 3 - 15 V

VIinput voltage 0 - VDD V

Tamb ambient temperature in free air −40 - +85 °C

Δt/ΔV input transition rise and fall

rate input MR

VDD = 5 V - - 3.75 μs/V

VDD = 10 V - - 0.5 μs/V

VDD = 15 V - - 0.08 μs/V

Table 6. Static characteristics

VSS = 0 V; VI = VSS or VDD unless otherwise specified.

Symbol Parameter Conditions VDD Tamb = −40 °C Tamb = 25 °C Tamb = 85 °CUnit

Min Max Min Max Min Max

VIH HIGH-level

input voltage |IO| < 1 μA 5 V 3.5 - 3.5 - 3.5 - V

10 V 7.0 - 7.0 - 7.0 - V

15 V 11.0 - 11.0 - 11.0 - V

VIL LOW-level

input voltage |IO| < 1 μA 5 V-1.5-1.5-1.5V

10 V - 3.0 - 3.0 - 3.0 V

15 V - 4.0 - 4.0 - 4.0 V

VOH HIGH-level

output voltage |IO| < 1 μA 5 V 4.95 - 4.95 - 4.95 - V

10 V 9.95 - 9.95 - 9.95 - V

15 V 14.95 - 14.95 - 14.95 - V

VOL LOW-level

output voltage |IO| < 1 μA 5 V - 0.05 - 0.05 - 0.05 V

10 V - 0.05 - 0.05 - 0.05 V

15 V - 0.05 - 0.05 - 0.05 V

IOH HIGH-level

output current VO = 2.5 V 5 V - −1.7 - −1.4 - −1.1 mA

VO = 4.6 V 5 V - −0.52 - −0.44 - −0.36 mA

VO = 9.5 V 10 V - −1.3 - −1.1 - −0.9 mA

VO = 13.5 V 15 V - −3.6 - −3.0 - −2.4 mA

IOL LOW-level

output current VO = 0.4 V 5 V 0.52 - 0.44 - 0.36 - mA

VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA

VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA

IIinput leakage current 15 V - ±0.3 - ±0.3 - ±1.0 μA

IDD supply current IO = 0 A 5 V - 20 - 20 - 150 μA

10 V - 40 - 40 - 300 μA

15 V - 80 - 80 - 600 μA

CIinput capacitance - - - - 7.5 - - pF

Product data sheet Rev. 6 — 11 May 2011 5 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

11. Dynamic characteristics

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).

[2] tpd is the same as tPHL and tPLH.

[3] tt is the same as tTHL and tTLH.

Table 7. Dynamic characteristics

Tamb = 25

C; VSS = 0 V; CL = 50 pF; tr = tf

≤

20 ns; unless otherwise specified.

Symbol Parameter Conditions VDD Extrapolation formula[1] Min Typ Max Unit

tpd propagation delay RS → Q3;

see Figure 4 5 V [2] 183 ns + (0.55 ns/pF) CL- 210 420 ns

10 V 69 ns + (0.23 ns/pF) CL-80160ns

15 V 42 ns + (0.16 ns/pF) CL-50100ns

Qn → Qn + 1;

see Figure 4 5 V - - 25 50 ns

10 V - - 10 20 ns

15 V - - 6 12 ns

MR → Qn;

HIGH to LOW

see Figure 4

5 V 73 ns + (0.55 ns/pF) CL- 100 200 ns

10 V 29 ns + (0.23 ns/pF) CL-4080ns

15 V 22 ns + (0.16 ns/pF) CL-3060ns

tttransition time see Figure 4 5 V [3] 10 ns + (1.00 ns/pF) CL-60120ns

10 V 9 ns + (0.42 ns/pF) CL-3060ns

15 V 6 ns + (0.28 ns/pF) CL-2040ns

tWpulse width minimum width;

RS HIGH;

see Figure 4

5 V 120 60 - ns

10 V 50 25 - ns

15 V 30 15 - ns

minimum width;

MR HIGH;

see Figure 4

5 V 50 25 - ns

10 V 30 15 - ns

15 V 20 10 - ns

trec recovery time input MR;

see Figure 4 5 V 160 80 - ns

10 V 80 40 - ns

15 V 60 30 - ns

fmax maximum frequency input RS;

see Figure 4 5 V 4 8 - MHz

10 V 10 20 - MHz

15 V 15 30 - MHz

Product data sheet Rev. 6 — 11 May 2011 6 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

[1] Where:

fi = input frequency in MHz; fo = output frequency in MHz;

CL = output load capacitance in pF;

VDD = supply voltage in V;

Σ(fo × CL) = sum of the outputs;

Ct = timing capacitance (pF);

fosc = oscillator frequency (MHz).

12. Waveforms

Table 8. Power dissipation

Dynamic power dissipation PD and total power dissipation Ptot can be calculated from the formulas shown. Tamb = 25

Symbol Parameter Conditions VDD Typical formula for PD and Ptot (μW)[1]

PDdynamic power

dissipation per device 5 V PD = 700 × fi + Σ(fo × CL) × VDD2

10 V PD = 3300 × fi + Σ(fo × CL) × VDD2

15 V PD = 8900 × fi + Σ(fo × CL) × VDD2

Ptot total power

dissipation when using

the on-chip

oscillator

5V P

tot = 700 × fosc + Σ(fo × CL) × VDD2 + 2 × Ct × VDD2 × fosc + 690 × VDD

10 V Ptot = 3300 × fosc + Σ(fo × CL) × VDD2 + 2 × Ct × VDD2 × fosc + 6900 × VDD

15 V Ptot = 8900 × fosc + Σ(fo × CL) × VDD2 + 2 × Ct × VDD2 × fosc + 22000 × VDD

Measurement points are given in Table 9.

Fig 4. Waveforms showing propagation delays for MR to Qn and CP to Q0, minimum MR, and CP pulse widths

001aaj47

MR input

RS input

Qn output

tPHL

trec

tPLH

tWtPHL

1/fmax

10 %

90 %

10 %

90 %

Table 9. Measurement points

Supply voltage Input Output

VDD VMVM

5 V to 15 V 0.5VDD 0.5VDD

Product data sheet Rev. 6 — 11 May 2011 7 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

13. RC oscillator

13.1 Timing component limitations

The oscillator frequency is mainly determined by Rt × Ct, provided Rt<< R2 and

R2 ×C2 << Rt × Ct. The influence of the forward voltage across the input protection

diodes on the frequency is minimized by R2. The stray cap acitance C2 should be kept as

small as possible. In consideration of accuracy, Ctmust be larger than the inherent stray

capacitance. Rtmust be larger than the LOCMOS (Local Oxidation Complementary

Metal-Oxide Semiconductor) ‘ON’ resistance in series with it, which typically is 500 Ωat

VDD = 5 V, 300 Ωat VDD = 10 V and 200 Ωat VDD =15V.

Test data is given in Table 10.

Definitions for test circuit:

DUT = Device Under Test;

CL= load capacitance including jig and probe capacitance;

RT= termination resistance should be equal to the output impedance Zo of the pulse generator.

Fig 5. Test circuit for switching times

VDD

VIVO

001aag18

DUT

Table 10. Measurement point an d test data

Supply voltage Input Load

VDD VItr, tfCL

5 V to 15 V VSS or VDD ≤20 ns 50 pF

Typical formula for oscillator frequency:

Fig 6. External co mponent connection for RC oscillator

001aae65

R2 RtCt

MR (from logic)

REXT CEXT

10 9

HEF4060

fosc 1

2.3 Rt

×Ct

------------------------------

Product data sheet Rev. 6 — 11 May 2011 8 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

The recommended values for these components to maintain agreement with th e typical

oscillation formula are:

Ct≥100 pF, up to any practical value,

10 kΩ≤Rt≤1 MΩ.

13.2 Typical crystal oscillator circuit

In Figure 7, R2 is the power limiting resistor. For starting and maintaining oscillation a

minimum transconductance is necessary.

gfs =di

o/dviat vois constant (see also Figure 9);

MR = LOW.

Fig 7. External component connection for

crystal oscillator Fig 8. Test setup for measuring forward

transconductance (gfs)

001aae6

MR (from logic)

Rbias

100 kΩ to

1 MΩ2.2 kΩ

100 pF

C3 22 pF to

37 pF

REXT

RS11

HEF4060

001aae65

input output

VDD

VSS

Rbias

560 kΩ

0.47 μF 100 μF

(f = 1 kHz) A

Product data sheet Rev. 6 — 11 May 2011 9 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

Tamb = 25 °C.

(1) Average + 2 σ.

(2) Average.

(3) Average −2 σ.

Where ‘σ’ is the observed standard deviation.

Ctcurve at Rt=100 kΩ; R2 = 470 kΩ.

Rtcurve at Ct= 1 nF; R2 = 5 Rt.

VDD = 5 V to 15 V; Tamb = 25 °C.

Fig 9. Typical forward transconductance gfs as a

function of the supply voltage Fig 10. RC oscillator frequency as a function of

Rtand Ct

001aae658

VDD (V)

015105

7.5

2.5

12.5

gfs

(mA/V)

(3)

(2)

(1)

001aae659

Ct (μF)

10−410−1

10−2

10−3

Rt (Ω)103106

105

104

102

103

104

105

fosc

(Hz)

Lines (1) and (2): VDD = 15 V.

Lines (3) and (4): VDD = 10 V.

Lines (5) and (6): VDD =5 V.

Lines (1), (3), (6): Rt= 100 kΩ; Ct=1 nF; R2=0W.

Lines (2), (4), (5): Rt= 100 kΩ;C

t= 1 nF; R2 = 300 kΩ.

Referenced at: fosc at Tamb =25°C and VDD = 10 V.

Fig 11. Oscillator frequency deviation (Δfosc) as a function of ambient temperature

Tamb (°C)

−50 150100500

001aae660

−4

−8

Δfosc

(%)

−12

(1)

(2)

(3)

(4)

(5)

(6)

Product data sheet Rev. 6 — 11 May 2011 10 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

14. Package outline

Fig 12. Package outline SOT38-4 (DIP16)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT38-4 95-01-14

03-02-13

(e )

seating plane

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

UNIT A

max. 12 b1(1) (1) (1)

b2cD E e M Z

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

min. A

max. bmax.

1.73

1.30

0.53

0.38

0.36

0.23

19.50

18.55

6.48

6.20

3.60

3.05 0.2542.54 7.62 8.25

7.80

10.0

8.3 0.764.2 0.51 3.2

inches 0.068

0.051

0.021

0.015

0.014

0.009

1.25

0.85

0.049

0.033

0.77

0.73

0.26

0.24

0.14

0.12 0.010.1 0.3 0.32

0.31

0.39

0.33 0.030.17 0.02 0.13

IP16: plastic dual in-line package; 16 leads (300 mil) SOT38

-4

Product data sheet Rev. 6 — 11 May 2011 11 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

Fig 13. Package outline SOT109-1 (SO16)

detail X

vMA

(A )

pin 1 index

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10

1.45

1.25 0.25 0.49

0.36

0.25

0.19

10.0

9.8

4.0

3.8 1.27 6.2

5.8

0.7

0.6

0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT109-1 99-12-27

03-02-19

076E07 MS-012

0.069 0.010

0.004

0.057

0.049 0.01 0.019

0.014

0.0100

0.0075

0.39

0.38

0.16

0.15 0.05

1.05

0.041

0.244

0.228

0.028

0.020

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

0 2.5 5 mm

scale

O16: plastic small outline package; 16 leads; body width 3.9 mm SOT109

-1

Product data sheet Rev. 6 — 11 May 2011 12 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

15. Revision history

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

HEF4060B v.6 20110511 Product data sheet - HEF4060B v.5

Modifications: •Unit for maximum frequency changes from ns to MHz (errata).

HEF4060B v.5 20091127 Product data sheet - HEF4060B v.4

Modifications: •Section 9 “Recommended operating conditions” Δt/ΔV values updated.

HEF4060B v.4 20090817 Product data sheet - HEF4060B_CNV v.3

HEF4060B_CNV v.3 19950101 Product specification - HEF4060B_CNV v.2

HEF4060B_CNV v.2 19950101 Product specification - -

Product data sheet Rev. 6 — 11 May 2011 13 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design .

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

16.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

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Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsisten cy or conf lict with the short data sheet, the

full data sheet shall pre va il.

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data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

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deemed to off er functions and qualities beyond those described in the

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Notwithstanding any damages that customer might incur for any reason

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changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use in automotive applicat ions — This NXP

Semiconductors product has been qualified for use in automotive

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nor in applications where failure or malf unction of an NXP Semiconductors

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Applications — Applications that are described herein for any of these

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representation or warranty that such applications will be suitable for the

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Customers are responsible for the design and ope ration of their applications

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accepts no liability for any assistance with applications or customer product

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the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

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products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

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applying the customer’s general terms and conditions with regard to the

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conveyance or implication of any license under any copyrights, patents or

other industrial or inte llectual property rights.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document cont ains data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.

Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 6 — 11 May 2011 14 of 15

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from national authorities.

16.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

17. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors HEF4060B

14-stage ripple-carry binary counter/divider and oscilla tor

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 11 May 2011

Document identifier: HEF4060B

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

13 RC oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

13.1 Timing component limitations. . . . . . . . . . . . . . 7

13.2 Typical crystal oscillator circuit . . . . . . . . . . . . . 8

14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13

16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

17 Contact information. . . . . . . . . . . . . . . . . . . . . 14

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15