MTS62C19A Dual Full-Bridge Motor Driver Features Description * * * * * * * * * The MTS62C19A motor driver is a CMOS device capable of driving both windings of a bipolar stepper motor or bidirectionally control two DC motors. Each of the two independent H-bridge outputs is capable of sustaining 40V and delivering up to 750 mA of continuous current. The output current level is controlled by an internal PWM circuit that is configured using two logic inputs, a current sense resistor, and a selectable reference voltage. The H-bridge outputs have been optimized to provide a low output saturation voltage drop. * * * * 750 mA Continuous Output Current Load Voltage Supply: 10V to 40V Full Bipolar Stepper Motor Drive Capability Bidirectional DC Motor Capability Internal Fixed TOFF Time PWM Current Control Internal Protection Diodes Internal Thermal Shutdown Under Voltage Lockout LS-TTL Compatible Logic Inputs with Pull-Up Resistors Low RON Output Resistance Low Quiescent Current Operating Temperature Range: -20C to +85C Pin Compatible with Allegro 6219 Applications * * * * Stepper Motor Actuators DC Motor Actuators Automotive HVAC Ventilation Automotive Power Seats Note: The MTS62C19A device is formerly a product of Advanced Silicon. Full, half, and micro-stepping operations are possible with the PWM current control and logic inputs. The maximum output current is set by a sensing resistor and a user selectable reference voltage. The output current limit is selected using two logic level inputs. The selectable output current limits are 0%, 33%, 67%, or 100% of the maximum output current. Each bridge has a PHASE input signal which is used to control the direction of current flow through the H-bridge and the load. The H-bridge power stage is controlled by non-overlapping signals which prevent current cross conduction when switching the direction of the current flow. Internal clamp diodes protect against inductive transients. Thermal protection circuitry disables the outputs when the junction temperature exceeds the safe operating limit. No special power-up sequencing is required. Undervoltage Lockout circuitry prevents the chip from operating when the load supply is applied prior to the logic supply. The device is supplied in a 24-pin SOP Package. Package Types SOP-24 2010 Microchip Technology Inc. DS22260A-page 1 MTS62C19A Functional Block Diagram VLOGIC VLOAD PHASE1 Shift Drivers L ogic I01 OUT1A Power Bridge I11 VREF1 Current Sense Comparator OUT1B One-sh ot Under-V Lo ckou t Thermal Shutdown PHASE2 Shift Drivers L ogic I 02 OUT2A Power Bridge I 12 VREF2 Current Sense Comparator COMPIN1 COMPIN2 DS22260A-page 2 OUT2B One-sh ot RC2 RC1 GND SENSE1 SENSE2 2010 Microchip Technology Inc. MTS62C19A Typical Application 5V 1 0 to 30V 100 nF 100 nF VLOGIC PHASE1 Shift I01 Drivers Logic OUT1A I11 Logic / uP VREF1 100 uF VLOAD Power Bridge Current Sense Comp arator OUT1B One-shot Under-V Lockout Thermal Sh utdown PHASE2 Shift I02 Drivers Logic OUT2A I12 VREF2 Power Bridge Current Sense Comp arator COMPIN1 M OUT2B One-shot COMPIN2 RC2 Rt RC1 Ct Ct GND Rt SENSE 2 SENSE1 Rt Rt Rc Cc Rc Cc 2010 Microchip Technology Inc. DS22260A-page 3 MTS62C19A 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings Logic Supply Voltage (VLOGIC) ......................... -0.3 to +5.5V Load Supply Voltage (VLOAD) .......................... -0.3 to +40.0V Logic Input Voltage Range (VIN) ....... -0.3 to VLOGIC + 0.3V VREF Voltage Range (VREF) ............................. -0.3 to +10.0V Output Current (Peak) ..................................................... 1A Output Current (Continuous) ...................................... 0.75A Sense Output Voltage ...................................... -0.3V to 1.5V Junction Temperature (TJ).............................-20C to +150C Operating Temperature Range (TOPR)............-20C to +85C Storage Temperature Range (TSTG) .............-55C to +150C ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits are established for VLOGIC = 4.5V to 5.5V,VLOAD = 30V,VREF = 5V, TA = 25C Parameters Sym Min Typ Max Units Logic Supply Voltage VLOGIC 4.5 5.0 5.5 V Load Supply Voltage VLOAD 10 30 40 V mA Conditions DC Characteristics Logic Supply Current IVLOGIC -- 0.8 1.0 VREF Voltage Range VREF 1.5 5.0 7.0 V Driver Supply Current IVLOAD_ON -- 0.55 1.0 mA Both Bridges ON, No Load IVLOAD_OFF -- 0.55 1.0 mA Both Bridges Off Control Logic Input Current (VIN = 0V) IIN -- -- -70 A I01,I11,I02,I12,PHASE1,PHASE2, (Note 1) Logic Low Input Voltage VIL -- -- 0.8 V I01,I11,I02,I12,PHASE1,PHASE2 Logic High Input Voltage VIH 2.4 -- -- V I01,I11,I02,I12,PHASE1,PHASE2 Current Limit Threshold Ratio (VREF / VSENSE) VREF_VSENS 9.5 10 10.5 -- I0=L,I1=L E 13.5 15 16.5 -- I0=H,I1=L 25.5 30 34.5 -- I0=L,I1=H VONN (Low Side) -- 0.55 0.65 V (Sink) IOUT = +500 mA -- 0.90 1.00 V (Sink) IOUT = +750 mA VONP (High Side) -- 1.05 1.40 V (Source) IOUT = -500 mA -- 1.85 2.10 V (Source) IOUT = -750 mA Clamp Diode Forward Voltage (Note 2) VF_NDIODE -- 0.95 1.30 V IF = 750 mA VF_PDIODE -- 1.00 1.30 V IF = 750 mA Driver Output Leakage Current ILEAK -- -- -50 A VOUT = 0V -- -- 50 A VOUT = VLOAD Thermal Shutdown Temperature TJ_SHDN -- 170 -- C TOFF -- 50 58 s TD -- 1.5 10 s -- -- Driver Output Saturation Voltage VCE(SAT) AC Characteristics Cut-off Time (one-shot pulse) Turn-off Delay Note 1: 2: Rs=1,Rc=1k,Cc=820pF, Rt=56k, Ct=820pF VIN = 5.0V input current given by internal pull-up to Logic Supply. Clamp/Freewheel diode is the intrinsic body-drain diode of the NMOS and PMOS transistors. DS22260A-page 4 2010 Microchip Technology Inc. MTS62C19A TEMPERATURE SPECIFICATIONS Parameters Sym Min Junction Temperature Range TJ Operating Temperature Range Typ Max Units -20 +125 C TA -20 +70 C JA JC -- -- -- -- C/W Conditions Recommended Temperature Ranges Thermal Package Resistance Thermal Resistance, SOP-24 2010 Microchip Technology Inc. 76 16 EIA/JEDEC JESD51-10 DS22260A-page 5 MTS62C19A 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: MTS62C19A PIN FUNCTION TABLE Pin No. SOP-24 Type Name 1 Output OUT1A Output 1 `A' Side of Motor Winding 2 Output OUT2A Output 2 `A' Side of Motor Winding 3 Input SENSE2 4 Input COMPIN2 5 Output OUT2B 6 Power GND Negative Logic Supply (Ground) 7 Power GND Negative Logic Supply (Ground) 8 Input I02 Output 2 Current Selection Bit 0 9 Input I12 Output 2 Current Selection Bit 1 10 Input PHASE2 11 Input VREF2 Output 2 Current Reference Output 2 RC Time Constant 2.1 Function Current Sense for Output 2 Current Sense Comparator Input for Output 2 Output 2 `B' Side of Motor Winding Output 2 Phase 12 Input RC2 13 Power VLOGIC 14 Input RC1 Output 1 RC Time Constant 15 Input VREF1 Output 1 Current Reference 16 Input PHASE1 17 Input I11 Output 1 Current Selection Bit 1 18 Power GND Negative Logic Supply (Ground) 19 Power GND Negative Logic Supply (Ground) Positive Logic Supply Voltage Output 1 Phase 20 Input I01 21 Output OUT1B Output 1 Current Selection Bit 0 22 Input COMPIN1 Current Sense Comparator Input for Output 1 23 Input SENSE1 Current Sense for Output 1 24 Power VLOAD Positive Load Supply Voltage Output 1 `B' Side of Motor Winding Ground Terminal (GND) Logic supply ground. Only the driver current flows out of this pin; there is no high current. Minimize voltage drops between this pin and the logic inputs. 2.2 Logic Supply Voltage (VLOGIC) Connect VLOGIC to the logic source voltage. Decouple the supply with a 0.1 F ceramic capacitor mounted close to the VLOGIC and GND terminals. 2.3 2.4 Current Detection Selection (I01, I02, I11, I12) Comparator input for current threshold detection. The voltage across the sense resistor is fed back to this input through the low pass filter RcCc. The power transistors are disabled when the sense voltage exceeds the reference voltage of the selected comparator. When this occurs the current decays for a time set by RtCt (TOFF = 1.1 RtCt). Load Supply Voltage (VLOAD) Connect VLOAD to the motor positive voltage supply. The motor current is supplied through this pin and the selected output transistors. DS22260A-page 6 2010 Microchip Technology Inc. MTS62C19A 2.5 Current Flow Direction Selection (PHASE1, PHASE2) Logic input to select the direction of current flow through the load. A "HIGH" logic signal level causes load current to flow from OUTxA to OUTxB. A "LOW" logic level causes load current to flow from OUTxB to OUTxA. 2.6 Current Sense Reference (VREF1, VREF2) 2.8 Current Sense Comparator Input (COMPIN1, COMPIN2) Current sense comparator input. 2.9 Output Stage OFF Time (RC1, RC2) A parallel RtCt network connected to this pin sets the OFF time of the power transistors. The pulse generator is a monostable triggered by the output of the current sense comparator. Reference voltage for current sense comparator. Determines the level of output current detection together with sensing resistor and inputs I0x, I1x. 2.10 2.7 Output connection to "A" side and "B" side of motor windings. Current Sense Input (SENSE1, SENSE2) Output Stage (OUT1A, OUT2A, OUT1B, OUT2B) Connection to lower sources of output stage for insertion of current sense resistor. 2010 Microchip Technology Inc. DS22260A-page 7 MTS62C19A 3.0 FUNCTIONAL DESCRIPTION 3.1 Each motor winding is driven by an H-type bridge consisting of two N and two P transistors that allow the current to flow in both winding directions depending on the value of the PHASE signal (Table 3-1). The Hbridge can be set in 5 configurations that are related to the digital inputs PHASE, I0 and I1 and to the current sensed. These configurations are given in Table 3-2. The circuit is designed to drive the two windings of a bipolar stepper motor and can be divided in two identical channels (channel 1 and channel 2) and protection circuitry for over temperature and undervoltage. The functionality of a channel and protection circuitry is presented on next sections. VLOAD VLOAD Pa Pb L Pa H OUTA L VLOAD Pb H OUTB H OUTA H Na Pb H OUTB L Nb SENSE Rs Pa H OUTA H Na Power Bridge Operation OUTB L Nb SENSE Rs L Na Nb SENSE Rs b) a) c) FIGURE 3-1: Power bridge control (PHASE = H / forward): (a) bridge ON, (b) source OFF, and (c) all OFF / coasting (for PHASE = L / reverse: invert A and B in drawings) TABLE 3-1: CURRENT DIRECTION CONTROL Phase Output Current L Current flows from OUTxB to OUTxA H Current flows from OUTxA to OUTxB TABLE 3-2: POWER BRIDGE GATE CONTROL TRUTH TABLE I0I1 PHASE overi TOFF Case/Mode gna gpa gnb gpb 00/01/10 1 0 0 Forward ON L 00/01/10 1 x 1 Forward OFF L L H H H H H 00/01/10 0 0 0 Reverse ON H H L L 00/01/10 0 x 1 Reverse OFF H H L H 11 x x x No Current/ Coasting L H L H Legend: Bold = Active MOS Transistors, Overi = Overcurrent flag, TOFF = Channel TOFF State Flag DS22260A-page 8 2010 Microchip Technology Inc. MTS62C19A 3.2 PWM Current Control The current level in each motor winding is controlled by a PWM circuit with a fixed TOFF time. The load current flowing in the winding is sensed through an external sensing resistor Rs connected between the power bridge's source pin SENSE (sources of transistors Na and Nb) and GND. VLOAD Power Bridge VREF Pa Pb One-Shot /10 OUTA Source Disable OUTB I0 Na Nb I1 COMPIN Cc FIGURE 3-2: SENSE RC Rc Ct Rs Rt PWM Current Control Circuit Principle (Channel 1 Shown) The voltage across Rs is compared to a fraction of the reference voltage VREF, chosen with the logic input bits I0 and I1 (Table 3-3). The power bridge and thus the load current can also be switched off completely when both logic inputs are high. Note that any logic input left unconnected will be treated as a high level (pull-up resistor). EQUATION 3-1: I MAX V REF 10 * RS The maximum trip current for regulation, given for I0 I1 = 00 is calculated in Equation 3-1. TABLE 3-3: CURRENT LEVEL CONTROL TRUTH TABLE I0 I1 Comp. Trip Voltage Output Current 0 0 Vtrip = 1/10*Vref Imax = Vref/10RS 1 0 Vtrip = 1/15*Vref 2/3*Imax = Vref/15RS 0 1 Vtrip = 1/30*Vref 1/3*Imax = Vref/30RS 1 1 x 0 (no current) When the maximum allowed current is reached, the bridge source is turned off during a fixed period TOFF (typically 50us) given by a non-retriggerable pulse generator and the external timing components Rt (20k100 k range) and Ct (100 pF-1000 pF range): toff = 1.1*(Rt*Ct) During TOFF the winding current decreases. When the driver is re-enabled, the winding current increases again until it reaches the threshold, and the cycle repeats itself maintaining the load current at the desired level. 2010 Microchip Technology Inc. DS22260A-page 9 MTS62C19A PHASE Iout thshtd_e n + 0 - 1 IMA X 0 td toff t on FIGURE 3-3: Waveform 3.3 PWM Output Current Circuit Protection A thermal protection circuitry turns off all drivers when the junction temperature exceeds a safe operating limit of 170C (typ.). This protects the devices from failure due to excessive heating. Despite this thermal protection, output short circuits are not permitted. The output drivers are re-enabled once junction temperature has dropped below 145C (typ.). DS22260A-page 10 145C 170C FIGURE 3-4: Thermal Shutdown Output vs. Temperature Showing Hysteresis An undervoltage lockout circuit protects the MTS62C19A from potential shoot-through currents when the load supply voltage is applied prior to the logic supply voltage. The power bridge and all outputs are disabled if VLOGIC is smaller than 4V. With this protection feature, the circuit will withstand any order of turn-on or turn-off of the supply voltages VLOGIC and VLOAD. Normal dV/dt values are assumed. 2010 Microchip Technology Inc. MTS62C19A 4.0 APPLICATION CIRCUITS & ISSUES 4.1 Typical Application The MTS62C19A circuit with external components for a typical application is shown in Figure 4-1. Typical passive component values are: Rs = 1, Rc = 1k, Cc = 820pF, Rt = 56k and Ct = 820pF. 5V 10 to 30V 100nF 100 nF VLOGIC PHASE1 Shift I01 100uF VLOAD Drivers OUT1A Logic I11 Power Bridge Current Sense Comparator Logic / uP VREF1 One-shot Under-V Lockout Thermal Shutdown PHASE2 Shift I02 Drivers Logic OUT2A I12 Power Bridge VREF2 COMPIN1 OUT1B Current Sense Comparator M OUT2B One-shot COMPIN2 RC2 Rt RC1 Ct Ct GND Rt SENSE2 SENSE1 Rt Rt Rc Cc Rc Cc FIGURE 4-1: Typical Application Circuit During PWM operation, when the output stage is turned-on, large voltage peaks might appear across Rs, which can wrongly trigger the input comparator. To avoid an unstable current control, an external RcCc filter should be used that delays the comparator action. Depending on load type many applications will not require this filter (SENSE connected to COMPIN). 2010 Microchip Technology Inc. DS22260A-page 11 MTS62C19A 4.2 Stepping Examples The MTS62C19A allows to control a motor in full-step, half-step, modified half-step and microstepping mode, as shown in Figure 4-2. Full-Step 1 3 2 Half-Step 4 1 2 3 4 5 6 7 8 Modified Half- Step 1 2 3 4 5 6 7 8 Micro-Stepping (1/8th) 1... ...32 I01 I11 PHASE1 I02 I12 PHASE2 5V VREF1 VREF2 5V 0V 5V 5V 5V 0V +500mA Motor Curr ent in Phase 1 0 FIGURE 4-2: 4.3 +333mA +167mA Motor Curr ent in Phase 2 -167mA -500mA +500mA 0 -333mA -500mA Examples of Stepping Modes Achievable with Typical Application Circuit PCB Design Guidelines Unused inputs should be connected to fixed voltage levels in order to get the highest noise immunity. Typical PCB layout guidelines for power application should be followed. These include separate power ground planes, supply decoupling capacitors close to the IC, short connections and use of maximized copper areas to improve thermal dissipation. DS22260A-page 12 2010 Microchip Technology Inc. MTS62C19A 5.0 MECHANICAL DIMENSIONS SOP 24L Package Outline 1 0 .016 typ 0 .020X45 H 13 E 24 12 0.5 typ A1 A D 0.010 L G AUGE PLANE SEATIN G PLANE Symbol Minimum A 3: -- -- Maximum 2.642 (0.104) -- -- Unit mm (inch) A1 0.102 (0.004) D 15.545 (0.612) 15.697 (0.618) 15.850 (0.624) mm (inch) E 7.417 (0.292) 7.518 (0.296) 7.595 (0.299) mm (inch) H 10.287 (0.405) 10.464 (0.412) 10.643 (0.419) mm (inch) L 0.533 (0.021) 0.787 (0.031) 1.041 (0.041) mm (inch) 0 4 8 J Note 1: 2: Typical mm (inch) JEDEC outline: M0-119 AA Dimensions "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusions and gate burrs should not exceed 0.25mm (0.010inch) per side. Dimensions "E" does not include inter-lead flash, or protrusions. Inter-lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 2010 Microchip Technology Inc. DS22260A-page 13 MTS62C19A NOTES: DS22260A-page 14 2010 Microchip Technology Inc. MTS62C19A APPENDIX A: REVISION HISTORY Revision A (September 2010) * Original Release of this Document. 2010 Microchip Technology Inc. DS22260A-page 15 MTS62C19A NOTES: DS22260A-page 16 2010 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. 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SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-60932-535-0 Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 2010 Microchip Technology Inc. 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