FSF450D, FSF450R 9A, 500V, 0.600 Ohm, Rad Hard, SEGR Resistant, N-Channel Power MOSFETs June 1998 Features Description * 9A, 500V, rDS(ON) = 0.600 The Discrete Products Operation of Intersil Corporation has developed a series of Radiation Hardened MOSFETs specifically designed for commercial and military space applications. Enhanced Power MOSFET immunity to Single Event Effects (SEE), Single Event Gate Rupture (SEGR) in particular, is combined with 100K RADS of total dose hardness to provide devices which are ideally suited to harsh space environments. The dose rate and neutron tolerance necessary for military applications have not been sacrificed. * Total Dose - Meets Pre-RAD Specifications to 100K RAD (Si) * Single Event - Safe Operating Area Curve for Single Event Effects - SEE Immunity for LET of 36MeV/mg/cm2 with VDS up to 80% of Rated Breakdown and VGS of 10V Off-Bias * Dose Rate - Typically Survives 3E9 RAD (Si)/s at 80% BVDSS - Typically Survives 2E12 if Current Limited to IDM This MOSFET is an enhancement-mode silicon-gate power field-effect transistor of the vertical DMOS (VDMOS) structure. It is specially designed and processed to be radiation tolerant. The MOSFET is well suited for applications exposed to radiation environments such as switching regulation, switching converters, motor drives, relay drivers and drivers for high-power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. * Photo Current - 30nA Per-RAD(Si)/s Typically * Neutron - Maintain Pre-RAD Specifications for 3E12 Neutrons/cm2 - Usable to 3E13 Neutrons/cm2 Ordering Information RAD LEVEL The Intersil portfolio of SEGR resistant radiation hardened MOSFETs includes N-Channel and P-Channel devices in a variety of voltage, current and on-resistance ratings. umerous packaging options are also available. SCREENING LEVEL PART NUMBER/BRAND 10K Commercial FSF450D1 10K TXV FSF450D3 100K Commercial FSF450R1 100K TXV FSF450R3 100K Space FSF450R4 Reliability screening is available as either commercial, TXV equivalent of MIL-S-19500, or Space equivalent of MIL-S-19500. Contact Intersil for any desired deviations from the data sheet. Symbol D G Formerly available as type TA17659. S Package TO-254AA G S D CAUTION: Beryllia Warning per MIL-S-19500 refer to package specifications. (c)2001 Fairchild Semiconductor Corporation FSF450D, FSF450R Rev. A FSF450D, FSF450R Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulsed Avalanche Current, L = 100H, (See Test Figure). . . . . . . . . . . . . . . . . . . . . . IAS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (Distance >0.063in (1.6mm) from Case, 10s Max) FSF450D, FSF450R 500 500 UNITS V V 9 6 27 20 A A A V 125 50 1.00 27 9 27 -55 to 150 300 W W W/ oC A A A oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER Drain to Source Breakdown Voltage Gate Threshold Voltage SYMBOL BVDSS VGS(TH) TEST CONDITIONS ID = 1mA, VGS = 0V VGS = VDS, ID = 1mA Zero Gate Voltage Drain Current IDSS VDS = 400V, VGS = 0V Gate to Source Leakage Current IGSS VGS = 20V Drain to Source On-State Voltage VDS(ON) Drain to Source On Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge rDS(ON)12 td(ON) tr ID = 6A, VGS = 12V td(OFF) tf Gate Charge at 12V Qg(12) VGS = 0V to 12V Threshold Gate Charge Qg(TH) VGS = 0V to 2V Plateau Voltage VDD = 250V, ID = 9A Qgs Qgd V(PLATEAU) Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient (c)2001 Fairchild Semiconductor Corporation TC = 25oC TC = 125oC VDD = 250V, ID = 9A, RL = 27.8, VGS = 12V, RGS = 2.35 VGS = 0V to 20V Gate Charge Drain TYP MAX UNITS 500 - - V - - 5.0 V 1.5 - 4.0 V 0.5 - - V - - 25 A - - 250 A - - 100 nA VGS = 12V, ID = 9A Qg(TOT) Gate Charge Source TC = -55oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC MIN ID = 9A, VDS = 15V VDS = 25V, VGS = 0V, f = 1MHz 200 nA 5.67 V - 0.425 0.600 - - 1.20 - - 150 ns - - 140 ns - - 180 ns - - 70 ns - - 220 nC - 110 150 nC - - 8.2 nC - 21 28 nC - 49 62 nC - 7 - V - 3150 - pF - 540 - pF CRSS - 150 - pF RJC - - 1.00 oC/W RJA - - 48 oC/W FSF450D, FSF450R Rev. A FSF450D, FSF450R Source to Drain Diode Specifications PARAMETER SYMBOL Forward Voltage VSD Reverse Recovery Time TEST CONDITIONS ISD = 9A MIN TYP MAX UNITS 0.6 - 1.8 V - - 810 ns ISD = 9A, dISD/dt = 100A/s trr Electrical Specifications up to 100K RAD PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN MAX UNITS Drain to Source Breakdown Volts (Note 3) BVDSS VGS = 0, ID = 1mA 500 - V Gate to Source Threshold Volts (Note 3) VGS(TH) VGS = VDS, ID = 1mA 1.5 4.0 V Gate to Body Leakage (Notes 2, 3) IGSS VGS = 20V, VDS = 0V - 100 nA IDSS A Zero Gate Leakage (Note 3) VGS = 0, VDS = 400V - 25 Drain to Source On-State Volts (Notes 1, 3) VDS(ON) VGS = 12V, ID = 9A - 5.67 V Drain to Source On Resistance (Notes 1, 3) rDS(ON)12 VGS = 12V, ID = 6A - 0.600 NOTES: 1. Pulse test, 300s Max. 2. Absolute value. 3. Insitu Gamma bias must be sampled for both VGS = 12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS . Single Event Effects (SEB, SEGR) Note 4 ENVIRONMENT (NOTE 5) TEST Single Event Effects Safe Operating Area (NOTE 6) MAXIMUM VDS BIAS (V) SYMBOL ION SPECIES TYPICAL LET (MeV/mg/cm) TYPICAL RANGE () APPLIED VGS BIAS (V) SEESOA Ni 26 43 -15 500 450 Ni 26 43 -20 Br 37 36 -5 500 Br 37 36 -10 400 Br 37 36 -15 100 NOTES: 4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN. 5. Fluence = 1E5 ions/cm2 (typical), T = 25oC. 6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR). (c)2001 Fairchild Semiconductor Corporation FSF450D, FSF450R Rev. A FSF450D, FSF450R Typical Performance Curves Unless Otherwise Specified LET = 26MeV/mg/cm2, RANGE = 43 LET = 37MeV/mg/cm2, RANGE = 36 LIMITING INDUCTANCE (HENRY) 600 1E-3 FLUENCE = 1E5 IONS/cm2 (TYPICAL) 500 VDS (V) 400 300 200 100 1E-4 ILM = 10A 30A 1E-5 100A 300A 1E-6 TEMP = 25oC 0 0 -5 1E-7 -10 -15 -20 -25 10 100 30 VGS (V) 1000 300 DRAIN SUPPLY (V) FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA 12 FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT GAMMA DOT CURRENT TO IAS 100 TC = 25oC ID , DRAIN CURRENT (A) ID, DRAIN (A) 10 8 6 4 10 100s 1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 2 1ms 100ms 0 -50 0 50 100 TC, CASE TEMPERATURE (oC) 150 1 FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs TEMPERATURE QGS QGD VG 1000 PULSE DURATION = 250s, VGS = 12V, ID = 6A 2.0 NORMALIZED rDS(ON) QG 10 100 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 2.5 12V 10ms 0.1 1.5 1.0 0.5 0.0 CHARGE -80 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 5. BASIC GATE CHARGE WAVEFORM (c)2001 Fairchild Semiconductor Corporation FIGURE 6. NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE FSF450D, FSF450R Rev. A FSF450D, FSF450R Typical Performance Curves Unless Otherwise Specified (Continued) NORMALIZED THERMAL RESPONSE (ZJC) 10 1 0.5 0.1 0.01 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 SINGLE PULSE 0.001 10-5 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-4 10-3 10-2 10-1 100 101 t, RECTANGULAR PULSE DURATION (s) FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE IAS , AVALANCHE CURRENT (A) 100 STARTING TJ = 25oC 10 STARTING TJ = 150oC 1 IF R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) IF R 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] 0.1 0.01 0.1 1 10 tAV , TIME IN AVALANCHE (ms) FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING (c)2001 Fairchild Semiconductor Corporation FSF450D, FSF450R Rev. A FSF450D, FSF450R Test Circuits and Waveforms ELECTRONIC SWITCH OPENS WHEN IAS IS REACHED VDS L BVDSS + CURRENT I TRANSFORMER AS tP - VARY tP TO OBTAIN REQUIRED PEAK IAS VDD 50V-150V DUT tP VDD + 50 VGS 20V 0V VDS IAS 50 tAV FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 10. UNCLAMPED ENERGY WAVEFORMS tON VDD tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% VDS VGS = 12V 10% DUT 10% 0V 90% RGS 50% VGS 50% PULSE WIDTH 10% FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT (c)2001 Fairchild Semiconductor Corporation FIGURE 12. RESISTIVE SWITCHING WAVEFORMS FSF450D, FSF450R Rev. A FSF450D, FSF450R Screening Information Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table). Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MAX UNITS Gate to Source Leakage Current IGSS VGS = 20V 20 (Note 7) nA Zero Gate Voltage Drain Current IDSS VDS = 80% Rated Value Drain to Source On Resistance rDS(ON) TC = 25oC at Rated ID Gate Threshold Voltage VGS(TH) ID = 1.0mA 25 (Note 7) A 20% (Note 8) 20% (Note 8) V NOTES: 7. Or 100% of Initial Reading (whichever is greater). 8. Of Initial Reading. Screening Information TEST JANTXV EQUIVALENT JANS EQUIVALENT Gate Stress VGS = 30V, t = 250s VGS = 30V, t = 250s Pind Optional Required Pre Burn-In Tests (Note 9) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) Steady State Gate Bias (Gate Stress) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours Interim Electrical Tests (Note 9) All Delta Parameters Listed in the Delta Tests and Limits Table All Delta Parameters Listed in the Delta Tests and Limits Table Steady State Reverse Bias (Drain Stress) MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 160 hours MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 240 hours PDA 10% 5% Final Electrical Tests (Note 9) MIL-S-19500, Group A, Subgroup 2 MIL-S-19500, Group A, Subgroups 2 and 3 NOTE: 9. Test limits are identical pre and post burn-in. Additional Screening Tests PARAMETER Safe Operating Area Unclamped Inductive Switching SYMBOL SOA IAS TEST CONDITIONS MAX UNITS 0.90 A VGS(PEAK) = 15V, L = 0.1mH 27 A VDS = 200V, t = 10ms Thermal Response VSD tH = 100ms; VH = 25V; IH = 4A 136 mV Thermal Impedance VSD tH = 500ms; VH = 25V; IH = 4A 187 mV (c)2001 Fairchild Semiconductor Corporation FSF450D, FSF450R Rev. A FSF450D, FSF450R Rad Hard Data Packages - Intersil Power Transistors TXV Equivalent 1. Rad Hard TXV Equivalent - Standard Data Package A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet E. Preconditioning Attributes Data Sheet Hi-Rel Lot Traveler HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data - Attributes Data Sheet F. Group A - Attributes Data Sheet E. Group B - Attributes Data Sheet G. Group B - Attributes Data Sheet F. Group C - Attributes Data Sheet H. Group C - Attributes Data Sheet G. Group D - Attributes Data Sheet I. Group D - Attributes Data Sheet D. Group A 2. Rad Hard TXV Equivalent - Optional Data Package A. Certificate of Compliance 2. Rad Hard Max. "S" Equivalent - Optional Data Package A. Certificate of Compliance B. Assembly Flow Chart B. Serialization Records C. Preconditioning - Attributes Data Sheet - Precondition Lot Traveler - Pre and Post Burn-In Read and Record Data C. Assembly Flow Chart D. Group A - Attributes Data Sheet - Group A Lot Traveler E. Group B - Attributes Data Sheet - Group B Lot Traveler - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup B3) - Bond Strength Data (Subgroup B3) - Pre and Post High Temperature Operating Life Read and Record Data (Subgroup B6) F. Group C G. Group D - Attributes Data Sheet - Group C Lot Traveler - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup C6) - Bond Strength Data (Subgroup C6) - Attributes Data Sheet - Group D Lot Traveler - Pre and Post RAD Read and Record Data D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - Hi-Rel Lot Traveler - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data - X-Ray and X-Ray Report F. Group A - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups A2, A3, A4, A5 and A7 Data G. Group B - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups B1, B3, B4, B5 and B6 Data H. Group C - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups C1, C2, C3 and C6 Data I. Group D - Attributes Data Sheet - Hi-Rel Lot Traveler - Pre and Post Radiation Data Class S - Equivalents 1. Rad Hard "S" Equivalent - Standard Data Package A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report (c)2001 Fairchild Semiconductor Corporation FSF450D, FSF450R Rev. A FSF450D, FSF450R TO-254AA 3 LEAD JEDEC TO-254AA HERMETIC METAL PACKAGE INCHES A OP E A1 Q H1 D 0.065 R MAX. TYP. L Ob MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.249 0.260 6.33 6.60 - A1 0.040 0.050 1.02 1.27 - Ob 0.035 0.045 0.89 1.14 2, 3 D 0.790 0.800 20.07 20.32 - E 0.535 0.545 13.59 13.84 - e 0.150 TYP 3.81 TYP 4 e1 0.300 BSC 7.62 BSC 4 H1 0.245 0.265 6.23 6.73 - J1 0.140 0.160 3.56 4.06 4 L 0.520 0.560 13.21 14.22 - OP 0.139 0.149 3.54 3.78 - Q 0.110 0.130 2.80 3.30 - NOTES: 1 2 3 e e1 J1 1. These dimensions are within allowable dimensions of Rev. A of JEDEC outline TO-254AA dated 11-86. 2. Add typically 0.002 inches (0.05mm) for solder coating. 3. Lead dimension (without solder). 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Die to base BeO isolated, terminals to case ceramic isolated. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. WARNING! BERYLLIA WARNING PER MIL-S-19500 Packages containing beryllium oxide (BeO) shall not be ground, machined, sandblasted, or subject to any mechanical operation which will produce dust containing any beryllium compound. Packages containing any beryllium compound shall not be subjected to any chemical process (etching, etc.) which will produce fumes containing beryllium or its' compounds. (c)2001 Fairchild Semiconductor Corporation FSF450D, FSF450R Rev. A