Philips Semiconductors Product specification meee ee ee ee Control circuit for switched mode power supplies TDA8380A GENERAL DESCRIPTION The TDA8380A is an integrated circuit intended for use as a control circuit in low-cost switched mode power supplies for television, monitors and small industrial equipment. The TDA8380A operates using duty factor regulation in the fixed frequency mode. Features A low-current initialization circuit (maximum 150 WA) which can be switched off A bandgap reference generator Circuitry for slow-start combined with an accurate setting of the maximum duty factor (Dmax) Programmable low supply voltage protection with one default value High supply protection circuitry Error amplifier with a transfer characteristic generator (TCG) Protection against open- and short-circuited feedback loop An overload voltage foldback Primary current protection circuitry for both cycle-by-cycle and trip mode Protection against transformer saturation A direct drive output stage (sink current 2.5 A, source current 0.75 A) Anti-double pulse logic Protected against damage as a result of a short-circuited high-voltage transistor RC oscillator with synchronization input QUICK REFERENCE DATA PARAMETER SYMBOL MIN. TYP. MAX. UNIT Supply voltage Vec - 14 - Vv Supply current loc - - 15 mA Output pulse repetition frequency range fo 10 - 100 kHz Operating ambient temperature range Tamb 25 - +70 C PACKAGE OUTLINE 16-lead DIL; plastic (SOT38); SOT38-1 ; 1996 November 18. November 1993 2Product specification Philips Semiconductors Control circuit for switched mode power supplies TDA8380A Wad Lo 24 zo wesbelp yooig 164 BuNO ss SEPECZL et zt 1 | VOsesvdl NOILOSLOWd LNSHUND | NOILYZIL3N 310A9 wevisia |_| | -9vwa0 AG-ATOAD diel LuviS MOTS (991) YOLVUINIO | f OLLSIHALOVEVHO [PF a4 > UaISNVYL vv { 4 4 ule Wald . yous ONILYD a1avisia pi 1s9 $ + 91907 LNdLNO > avs 8 Aina ar 6 gh | 91 Sa9IA3G INdino 490718 NOILO3LOUd Adds . WOLVTIIOSO JONSYSAIY | NOLLYZIVILINI Alddns 1 AR 33, ' Zz t , A a . Ht OF 9 $ ONAS 895 83, UWI, 9D, November 1993Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A PINNING e2 [1 | U 16] c1 C2| 2 15] 1 pem [3 | 14] Vee Voomin L4 | [13] CURR TDA8380A Voc [5 12] ss let L&_| 11] SYNC re[7 10] Coge STAB [| 9 | DUTY 7Z24424 Fig.2 Pinning diagram. 1 E2 Emitter of output source transistor 2 C2 Collector of output source transistor 3 DEM Demagnetization sense input 4 Vecmin Minimum Vec threshold setting 5 Voc Supply voltage 6 lief Reference current setting 7 FB Feedback input 8 STAB = Output error amplifier 9 DUTY Pulse width modulator input 10 Cosc Oscillator capacitor 11 SYNC Synchronization input 12 SS Maximum duty factor (Dmax) setting plus slow-start 13 CURR _ Input current protection 14 Vee Ground 15 E1 Emitter of output sink transistor 16 C1 Collector of output sink transistor November 1993Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A FUNCTIONAL DESCRIPTION The TDA8380A is a control circuit which generates the pulses required to drive the switching transistor in a switched mode power supply (SMPS). Supply This device is intended to be used on the primary side of the power supply and can be supplied via a take-over (auxiliary) winding on the transformer. The device is initialized via a high value resistor connected between the rectified mains voltage and the devices supply pin (pin 5), which causes the capacitor connected to this pin to charge slowly. When the voltage exceeds the initialization level (typically 17 V) the device will start up and the duty cycle will be slowly increased by the slow-start circuit. After a short period the take-over winding will supply the device. The value of the resistor is normally defined by the time taken to charge the capacitor. A one second delay between switching on and operation of the power supply is acceptable in most cases. The operating voltage range is from 9 to 20 V. The supply pin is protected by a 23 V Zener diode. The supply protection circuit is activated once the Zener diode is conducting. The slow-start procedure begins after initialization, until then the output is off. The current drawn by the device during the initialization period is less than 150 LA. When the supply voltage falls below the minimum trip level, the device switches off and the start-up procedure is repeated. The minimum voltage supply threshold setting (Vccmin) can be set externally with a resistor connected between the Vecmin pin (pin 4) and ground (pin 14) (see Fig.3). 7Z24425.1 Yocmin 12 10.5 8.4 | | i ! V4 2.1 3.0 4.9 84 (0.416 x Ry/Rg) Fig.3 Trip level setting of minimum Vcc protection level. Vocmin can be set between 8.4 V (an internally fixed overriding protection level) and 17 V by means of an external resistor connected to pin 4. When choosing the initialization and minimum supply voltages the following should be taken into account: The difference between the two voltages should be large enough to enable a supply voltage dip during start-up. e The value of the minimum supply voltage should be high enough to ensure that the high-voltage transistor is correctly driven. A high protection level makes it possible to have a large resistor value in series with the base drive. For battery line input operation, the Vecmin pin is connected to Vcc, the start-up circuit is then inhibited and the device starts operating when Vcc exceeds the 8.4 V protection level (this level has a hysteresis of approximately 50 mV). The device draws current continuously under these conditions. November 1993 5Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A Reference block A bandgap based reference generates a stabilized voltage of 7 V to supply most of the devices internal circuits, this decreases chip size and increases reliability. The only circuits connected to Vcc are: The initialization circuit The output circuitry e The series transistor of the stabilized voltage By means of a resistor (Rg) connected to the lief input a reference current is defined which determines six other device settings. Part of the reference current is used to charge the oscillator capacitor (C19), therefore, the charging time is proportional to Re x Cig. The maximum duty factor (Dmax) is set by the resistor connected to pin 12 (Ry2) and is defined by the ratio Re/Ri2. The minimum supply voltage (pin 5) set by the resistor (Ry) at input Vecmin is defined by: 4/6 x Vg x Ry/Re. Oscillator The oscillator capacitor is charged and discharged between the high and low voltage levels as defined by the bandgap reference (high voltage typically 5 V and low voltage typically 1.4 V). The charge current is 1/6 of the reference current, the discharge current having the same value as the reference current. The period is therefore defined by 10 x Rg x Cio. The oscillator flyback pulse is used to set the bistable in the output logic, however the output remains low until the positive ramp starts (see Fig.4). The oscillator can be synchronized by means of the SYNC pin. When this pin is connected to Voc, the oscillator is free running. When it is between 0.85 and 5.6 V, the oscillator stops at the low voltage level prior to the next positive ramp. v 5 high voltage 4.76 Dmax (80%) CSL 2 Opin 12%) 1.4 low voltage on D max 80% | oft 72244626 Fig.4 Oscillator levels. November 1993 6Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A Synchronization The synchronisation input (pin 11) can be driven by either an optocoupler or a loosely coupled pulse transformer. Figure 5 illustrates synchronization using the 0.85 V threshold and a digital signal connected to the SYNC input (for example, an optocoupler between pin 11 and Vcc); the duty factor of the pulse is not very important. The oscillator starts at the first negative going edge of the sync. signal after the low voltage level has been reached. The synchronization frequency must be lower than the free running frequency. Synchronization must never affect the period time as this will corrupt the setting of the maximum duty factor. .6V aa ee high voltage vo 7224427 low voltage Fig.5 DC coupled synchronization using the 0.85 V level. In Fig.6 the disabling threshold (5.6 V) is used for synchronization. In this case the oscillator starts at the positive going edge of the sync. signal. voltage 7224428 Fig.6 DC coupled synchronization using the 5.6 V level. November 1993 7Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A Figure 7 illustrates synchronization using a pulse transformer. Internal circuitry causes a DC shift which informs the device that synchronization pulses are present (spikes around 0 V at the output of the pulse transformer) or not present (DC 0 V at the output of the pulse transformer). When synchronization is not used the SYNC pin must be connected to Voc, it must not be connected directly to ground or left open. SYNC 21V po per 11 @ yf " VEE JL pin 14 - at _f ] @ 0.8 V --4/--------o - -_- QV free running 7224429 Synchronization pulses present. Synchronization pulses not present. Fig.7 Synchronization using a pulse transformer. November 1993 8Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A Error amplifier The error amplifier compares the feedback voltage of the SMPS with a reference voltage (nominally 2.5 V). The amplifier output at pin 8 enables gain setting. The amplifier is stable for a gain greater than 20 dB. The output of the error amplifier is not internally connected to the Pulse Width Modulator (PWM). One input to the PWM is available at the DUTY input (pin 9) via the Control Slicing Level (CSL) circuit. Normally the STAB and DUTY pins are connected together, but direct driving of pin 9 via an optocoupler from the secondary side is also possible. A type of current mode control can be achieved by mixing the STAB signal with the primary current signal before applying it to the DUTY input. The feedback (FB) input (pin 7) is used as the input to the Transfer Characteristic Generator (TCG) circuit which ensures well defined duty factors at low FB voltages; a voltage foldback is an inherent characteristic. In Fig.8, the duty factor is shown as a function of the voltages at the FB, DUTY and SS inputs. The input which gives the lowest duty factor overrides the others. The left hand curve is passed through during a slow-start (via the slow-start input pin 12) when the duty cycle slowly increases linearly with respect to V2. The right-hand curve is passed through at start-up. The FB voltage slowly increases from zero and the duty factor, starting at 12%, increases until the maximum duty factor (Dmax) is reached. A few hundred millivolts later, the FB voltage reaches the start of the regulation curve which is at approximately 2.5 V. The plateau area between reaching Dmax and starting the regulation curve is kept as small as possible (typically 200 mV). DUTY (%) internal T slow maximum 80 error amplifier start duty OS at factor | 3.2V | | 4 | | 50 + transfer plateau | | characteristic width | | T | | | i T | | ] | | ! | foe em 12 | | (v) +}++4 } ppp Wy 54.76 4 3 2644 1 0 0.5 1.0 1.5 2.0 2.5 SS voltage (V,9) feedback and DUTY voltage (Vg) voltage (V7) 7224430 Fig.8 The duty factor as a function of the FB, SS and DUTY voltages. Due to the characteristics of the TCG, and the fact that an open FB input results in a low voltage at the FB input, open- and short-circuit feedback loops will result in low duty factors. When DC feedback is used across the error amplifier, the current capability of the error amplifier must be considered when determining the feedback resistor value. When the input to the PWM (pin 9) is driven by an optocoupler, the TCG can be used when a rough primary voltage is applied to the FB input. In this situation an open feedback loop will cause an increase in the FB voltage as the duty factor rises to its maximum. As soon as the FB voltage exceeds the reference by 0.7 V, the slow-start is triggered. November 1993 9Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A Demagnetization sense circuit To enable the SMPS to be kept in the non-continuous mode, an input is available which delays switch-on of the high-voltage transistor until the transformer currents have decayed to zero. This is an effective way of avoiding transformer saturation. The waveforms illustrated by Fig.9 show demagnetization with respect to the application diagram of Fig.13. eT eee a" Ua \ saw tooth : collector of | high-voltage j transistor > ay x. ~ ~ ~ current in ~ | TN ~ aan ~~! ~ transtormer vv delayed switch on 7224431 Fig.9 Demagnetization function. As long as the voltage of the take-over (auxiliary) winding (also used for supplying the device) is above 0.6 V (V3) the output will be prevented from switching on. Over-current protection The over-current protection circuit (pin 13) senses the voltage across resistor R, (see Fig.13), which reflects the primary current. This generated voltage is negative-going as the emitter of the high-voltage power transistor is grounded (this circuit arrangement provides the IC with the best safeguard against a possible collector-emitter short-circuit in the power transistor). At pin 13, the negative voltage signal is shifted to a positive level by a voltage across resistor R;3. This voltage is set by the reference current at pin 13 and is defined by resistor Rg at the leg input (pin 6) and = 1/6 x Vie/Re. Therefore Vghit(Wr 13) = Vrer/6 x Ry3/Re or nominal 0.416 x Ry3/Reg (V). The positive current monitor voltage at pin 13 is compared with two voltage levels: the first level = 0.2 V and the second level = 0 V (see Fig.10). The first trip level only switches off the high-voltage transistor for a cycle and puts the SMPS in a continuous cycle-by-cycle current protection mode. The second trip level is only activated when the primary current rise is very fast which can occur during a short-circuited output. In this mode the high-voltage transistor is quickly switched off and the slow-start procedure is activated. The difference between the first and second primary current peak levels is set by Rg: lo|, = 0.2/Rg. The absolute peak values are set by Rg and Rj3: lo x Rg = 0.416 x Ry3/Rg or ly x Rg = (0.416 x Ry3/Rg) 0.2 November 1993 10Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A i Vy 3 TN NI N N Vsnitt first trip level 200 mv --} F am I } A ~ - second trip level OV voltage NY across Rs slow-start ZO Z . 7224432 normal operation cycle-by-cycle second first level protection level protection Fig.10 Current protection. Slow-start circuit A slow-start occurs: At Switch-on of the SMPS e After a current trip as described in the section Over-current protection e After a low or high Vcc trip. The capacitor at the SS input is discharged and the slow-start bistable is reset when the voltage at the SS input falls below 0.5 V after which the circuit is ready for a slow-start. The dead time (during which the capacitor at the SS input is being charged to the 1.4 V lower level of the sawtooth) before duty cycle regulation starts is minimal. The SS input can also be used for Dmax setting by connecting a resistor to ground. The voltage across this resistor is then limited to 1/6 x Viet x Ri2/Re. Output stages The output stage consists of two NPN darlington transistors, their collector and emitter connected to separate pins (see Fig.13). The top transistor is capable of sourcing a maximum of 0.75 A to the high-voltage transistor while the bottom transistor can sink peak currents up to 2.5 A. For low currents up to 10 mA, the saturation voltage of the sink darlington transistor is similar to that of a single transistor (see Fig.11). During switching of this transistor dV/dt is internally limited to reduce interference. Care should be taken with the external wiring of the output pins to avoid oscillation or interference due to parasitic inductance and wire resistance. During start-up a small current flows from Vcc to E2 to precharge the series capacitor at the output (see Fig. 13). November 1993 11Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A 7224433 We (A) 25 - - - 10 -~ 0.01 Lf , . A (Vv) Fig.11 Saturation curve. November 1993 12Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) PARAMETER SYMBOL MIN. TYP. MAX. UNIT Voltage pin 5 (Vcc) -0.5 - 20 Vv pins 1, 2, 4 and 16 -0.5 - Veco V pins 3 and 13 0.5 - 0.5 Vv pins 7 and 9g 0.5 - 6.5 Vv pin 11 0.6 - Vec V Currents pins 5 (Vcc) 0 - 20 mA pin 1 0.75 - 0 A pin 2 0 - 0.75 A pins 3, 4, 6 to 8 and 10 to 12 10 - 10 mA pin 13 200 - 10 mA pin 15 -2.5 - 0 A pin 16 0 - 2.5 A Total power dissipation Prot see Fig.12 Operating ambient temperature range (for dissipation < 1 W) Tamb -25 - +70 C Storage temperature range Tstg 55 - +150 C THERMAL RESISTANCE From junction to ambient (in free air) Rth j-a(max) = 55 K/W ot 7224434 1.54 1.0 + 55 C/w 0.5 0 + + t + t -25 25 75 125 Tamb (C) Fig.12 Power derating curve. November 1993 13Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A CHARACTERISTICS Voc = 14 V; Tamb = 25 C; reference resistor = 5 kO unless otherwise specified PARAMETER CONDITIONS SYMBOL MIN. TYP. MAX. UNIT Supply Supply voltage Vec 9 - 20 Vv Supply initialization level V5 15 17 18 Vv High voltage protection V5 21 23 25 Vv Internal fixed minimum protection level V5 7.9 8.4 8.9 Vv Hysteresis dVcc - 50 - mV Supply current operational lec - - 15 mA before initialization lec - 100 150 HA Reference current (pin 4) note 1 l4 Ig/5.7 I,/6 1,/6.4 mA Trigger level Vocmin setting V5 3.6V4 3.8V4 4.2V4 Vv Clamp voltage at 20 mA 21.5 23.5 25.5 Vv Reference (pin 6) Reference voltage Viet 2.4 2.5 2.6 V Current range lref 200 - 800 HA Reference voltage over Ig range Viet 20 - +20 mV Error amplifier Error amplifier threshold Veco = 8.5 to20V | V7 2.4 2.5 2.6 Vv Input current I7 0 - 5 HA Sink current output at1.2V Ig 1 - - mA Source current output at5.5V Ig 80 100 130 HA Open loop gain AO - 100 - dB Unity gain bandwidth BW - 5 - MHz Input DUTY current note 1 Ig Ig/5.7 I,/6 1,/6.3 mA High FB protection level V7 2.95 3.1 3.25 Vv Temperature coefficient of error amplifier threshold dV7/dT - 100 - 10-/K TCG function (see Fig.8) Transfer characteristics dD/dV7 - 32 - SIV Minimum duty factor Dmin - 12 - % Plateau width V7 - 200 - mV November 1993 14Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A PARAMETER CONDITIONS SYMBOL MIN. TYP. MAX. UNIT Slow-start function Transfer characteristics dD/dV 12 - 23.8 - SIV Input current note 1 lie Ig/5.7 I,/6 1,/6.3 mA Sink current during faults at 0.5 V lie 8 - - mA Internally fixed maximum duty factor Dmax 75 80 85 % Clamp current at Vi2 =0.5V lie - -2 - mA Output stage Source transistor Voltage drop with respect to Vcc at0.75A Vec-V1 2 - V Pull-up current Veco-Vi =15V -l; 25 - 100 HA Operating current range -l 0 - 0.75 A Sink transistor (see Fig.11) Saturation voltage at2.5A Vie Vis - 2 - Vv atiA Vie Vis - 1.5 - Vv at 10 mA Vie Vis - 0.3 - V Leakage current Vig-Vis=20V_ [lig - - 1 LA Falling edge dVig_i5/dt - 0.2 - Vins Operating current range Peak lig 0 - 2.5 A Average lig - - 250 mA Oscillator High level voltage Vio - 5 - Vv Low level voltage Vio - 1.4 - Vv Charge current note 1 lio Ig/5.7 I,/6 1,/6.3 mA Frequency range fo 10 - 100 kHz Frequency Rg = 5kQ C19 = 680 pF fo 27 28.5 30 kHz Temperature coefficient of the frequency df/dT - 100 - 10-/K November 1993 15Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A PARAMETER CONDITIONS SYMBOL MIN. TYP. MAX. UNIT Synchronization Minimum synchronization pulse width tH - - 0.5 us Switching threshold Vii 0.7 0.85 0.9 V Input current 4 2.5 5.0 7.5 HA Disabling threshold Vii 4.2 5.6 6.0 V Input voltage at 700 pA Vit 390 - 550 mV Demagnetization input Switching voltage level V3 615 645 675 mV Switching current level Ig 23 - -39 HA Current range of clamp circuits Ig 10 - +10 mA Clamp level positive at 10 mA V3 - 950 - mV Clamp level negative at-10 mA V3 - 800 - mV Temperature coefficient TC - -1.9 - mV/K Current protection Input current note 1 li3 Ig/5.7 I,/6 1,/6.3 mA First threshold Vis 190 200 210 mV Second threshold Vis 10 0 10 mV Delay to switch output via pulse at pin 13 level 1 from 300 mV to 100 mV; lo = 500 mA - - 350 - ns Delay to switch output via pulse at pin 13 level 2 from 300 mV to 200 mV; Io = 500 mA - - 300 500 ns First threshold including Rig (12 kQ) Re = 5 kQ - - -800 - mV Threshold for open pin detection Vis - 3.5 - V Note to the characteristics 1. Over the current range of Ig; 200 to 800 LA. November 1993 16Product specification Philips Semiconductors Control circuit for switched mode power supplies TDA8380A W weep uoyeodde peylduis 1614 4 c T L-QEMPEZL + eh zt 1 vosesval ] NOILO3LOUd LNSHWND ] NOLLVZILIN BIDAD aavisia e | -Svw3d -ag-atozo | = HL iuvis mois [> (901) YOLVYaNID =| = | OILSIHILOVEVHO [77 > ua4SNVYL Uly- | 7 yy Y p> ule * Had hy * x Hous 5 uf | ONitvS =| aTevisia Y aso |e s 4 91907 LNdLNO = 8 : ata St | 91 ( Sa9IAga indino HOLVT1I980 yoo1a NOILO310Ud Alddns x 3ON3HadSY | NOILVZNVILINI AiddNs rh 4 + 1 3h ul LI t+ We OL We ueIS, 17 November 1993Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A source transistor demagnetization 40 uA TDA8380A supply protection sink transistor 16 a _ N Vooys TkQ ret/6 49 s current protection 14 50 kQ current reterence 13 4 5_? V bandgap f 23V 6 8 x breve kA 7 ov t ret{s 42 slow-start 12 circuitry fateh nr a 1.35 V , synchronization av 21V 1 5.6V 4uA 7/6 leas 7224437 a7 * Fig.14 Input and output loading diagram. November 1993 18Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A PACKAGE OUTLINE DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 seating plane 0 5 10 mm be scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) A Ay A2 (1) (1) Zz UNIT max. min. | max. b by c D E e e L Me Mu w max. 140 | 053 | 032 | 218 | 648 3.9 8.25 9.5 mm 47) 051 | 37 | 444 | 038 | 023 | 214 | 620 | 254 | 782 | 34 | 780 | 93 | 2254 | 22 . 0.055 | 0.021 | 0.013 | 086 | 0.26 015 | 032 | 037 inches | 0.19 | 0.020 | 015 | jose | gois | 0009 | oa | ona | 219 | 230 | G43 | 931 | ogg | 201 | 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN VERSION PROJECTION ISSUE DATE IEC JEDEC EIAJ 92-40-92. SOT38-1 050G09 MO-001AE E-} 9801-40 November 1993 19Philips Semiconductors Product specification Control circuit for switched mode power supplies TDA8380A SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our IC Package Databook (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max)- If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. November 1993 20