Document Number: 28789 For technical questions, contact: specialresistors@vishay.com www.vishay.com
Revision: 08-Jan-10 1
TNPS .... ESCC
Vishay Draloric
Hi-Rel Thin Film Chip Resistors
TNPS .... ESCC high-reliability thin film chip resistors are the
premium choice for design and manufacture of equipment,
where matured technology and proven reliability are of
utmost importance. They are regularly used in
communication and research satellites and fit equally well
into aircraft and military electronic systems.
Approval of the TNPS .... ESCC products is granted by the
European Space Components Coordination and registered
in the ESCC Qualified Parts List, REP005.
FEATURES
•High-reliability product
•Approved to ESCC 4001/029
•Advanced thin film technology
•SnPb termination plating, minimum 6 % Pb
APPLICATIONS
•Aerospace
•Avionics
•Military
Note
• These resistors do not feature a limited lifetime when operated within the permissible limits. However, resistance value drift increasing over
operating time may result in exceeding a limit acceptable to the specific application, thereby establishing a functional lifetime.
Notes
• The indicated combinations of TCR, tolerance and resistance range are a subset of those combinations approved to ESCC 4001/029
• According to ESCC 4001/029, resistance values are to be selected from the E96 series only
METRIC SIZE
IMPERIAL 0603 0805 1206
METRIC RR1608M RR2012M RR3216M
TECHNICAL SPECIFICATIONS
DESCRIPTION TNPS0603 .... ESCC TNPS0805 .... ESCC TNPS1206 .... ESCC
Metric size RR1608M RR2012M RR3216M
Resistance range 10.0 Ωto 221 kΩ10.0 Ωto 422 kΩ10.0 Ωto 1.00 MΩ
Resistance tolerance ± 1 %; ± 0.5 %; ± 0.1 %
Temperature coefficient ± 50 ppm/K; ± 25 ppm/K; ± 15 ppm/K
Rated dissipation P70 0.1 W 0.125 W 0.25 W
Operating voltage, Umax. ACRMS or DC 75 V 150 V 200 V
Film temperature, ϑF max. 125 °C
Operating temperature range - 55 °C to 125 °C
Max. resistance change at P70, |ΔR| max., after:
1000 h ≤ (0.05 % R + 10 mΩ)
2000 h ≤ (0.1 % R + 20 mΩ)
Permissible voltage against ambient (insulation) 100 V 200 V 300 V
Storage temperature range - 55 °C to 125 °C
TEMPERATURE COEFFICIENT AND RESISTANCE RANGE
DESCRIPTION RESISTANCE RANGE
TCR TOLERANCE TNPS0603 .... ESCC TNPS0805 .... ESCC TNPS1206 .... ESCC
± 50 ppm/K ± 1 % 10.0 Ωto 221 kΩ10.0 Ωto 422 kΩ10.0 Ωto 1.00 MΩ
± 25 ppm/K ± 0.5 % 10.0 Ωto 221 kΩ10.0 Ωto 422 kΩ10.0 Ωto 1.00 MΩ
± 0.1 % 10.0 Ωto 221 kΩ10.0 Ωto 422 kΩ10.0 Ωto 1.00 MΩ
± 15 ppm/K ± 0.1 % 10.0 Ωto 221 kΩ10.0 Ωto 422 kΩ10.0 Ωto 1.00 MΩ
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2Revision: 08-Jan-10
TNPS .... ESCC
Vishay Draloric Hi-Rel Thin Film Chip Resistors
Note
• Products can be ordered using either the PART NUMBER or the PRODUCT DESCRIPTION
PART NUMBER AND PRODUCT DESCRIPTION
PART NUMBER: TNPS08057502DEBX0C
MODEL AND SIZE VALUE TOLERANCE TCR PACKAGING TESTING LEVEL
TNPS0603
TNPS0805
TNPS1206
3 digit value
1 digit multiplier
MULTIPLIER
9 = *10-1
0 = *100
1 = *101
2 = *102
3 = *103
4 = *104
F = ± 1 %
D = ± 0.5 %
B = ± 0.1 %
H = ± 50 ppm/K
E = ± 25 ppm/K
X = ± 15 ppm/K
BX
LX
0C = Level C
0B = Level B
PRODUCT DESCRIPTION: TNPS0805 25 75K0 0.5 % BX ESCC 4001/029 C
TNPS0805 25 75K0 0.5 % BX ESCC 4001/029 C
MODEL AND SIZE TCR RESISTANCE VALUE TOLERANCE PACKAGING SPECIFICATION
AND TESTING
TNPS0603
TNPS0805
TNPS1206
± 50 ppm/K
± 25 ppm/K
± 15 ppm/K
33R2 = 33.2 Ω
75K0 = 75.0 kΩ
± 1 %
± 0.5 %
± 0.1 %
BX
LX
ESCC 4001/029 C
ESCC 4001/029 B
ESCC 4001/022 COMPONENT NUMBER AND ELECTRICAL CHARACTERISTICS
Example of the component number and electrical characteristics for a resistor: TNPS0805 25 75K0 0.5 % ESCC 4001/029 C
400102902C 7502D2
The elements used in the component number have the following meaning:
4001029
02
C
Detail specification number, ESCC 4001/029
Type variant, used for identification of chip size:
01 ...... 0603
02 ...... 0805
03 ...... 1206
Testing Level, B or C
The elements used in the electrical characteristics have the following meaning:
7502
D
2
Resistance value acc. IEC 60062, four-character code system
Tolerance on rated resistance acc. IEC 60062
Temperature coefficient of resistance:
3 ......... ± 50 ppm/K
2 ......... ± 25 ppm/K
1 ......... ± 15 ppm/K
T N P S 0 8 0 5 7 5 0 2 D E B X 0 C
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Revision: 08-Jan-10 3
TNPS .... ESCC
Hi-Rel Thin Film Chip Resistors Vishay Draloric
Notes
(1) Leader is extended to 500 mm cover tape, including 200 mm carrier tape with empty compartments
(2) Matrix tray (waffle tray) packaging, code LX, is available only for samples for lot acceptance testing
DIMENSIONS
Note
• Alphanumeric coding of the resistance value is applied, using the four-character code of IEC 60062 (3), where the character R is used instead
of the decimal point for values below 100 Ω
PATTERN STYLES FOR CHIP RESISTORS
Note
• The given solder pad dimensions reflect the considerations for board design and assembly as outlined e.g. in standards IEC 61188-5-x, or in
publication IPC-7351. They do not guarantee any supposed thermal properties, however, they will be found adequate for most general
applications.
PACKAGING
MODEL
ANTISTATIC BLISTER TAPE
ACC. IEC 60286-3 (1) MATRIX TRAY (2)
UNIT QUANTITY CODE QUANTITY CODE
TNPS0603
TNPS0805
TNPS1206
Box 100 to 499
BX 1 to 30 LX
Reel 180 mm/7" 500 to 3000
DIMENSIONS AND MASS
TYPE L
(mm)
W
(mm)
H
(mm)
T1, T2
(mm)
MASS
(mg)
TNPS0603 1.60 ± 0.10 0.85 ± 0.10 0.45 ± 0.10 0.30 ± 0.20 ≤ 2
TNPS0805 2.00 ± 0.15 1.25 ± 0.15 0.45 ± 0.10 0.40 ± 0.20 ≤ 5
TNPS1206 3.20 ± 0.15 1.60 ± 0.15 0.55 ± 0.10 0.50 ± 0.25 ≤ 10
H
T2
T1
W
L
GX
Y
Z
RECOMMENDED SOLDER PAD DIMENSIONS
TYPE
WAVE SOLDERING REFLOW SOLDERING
G
(mm) Y
(mm) X
(mm) Z
(mm) G
(mm) Y
(mm) X
(mm) Z
(mm)
TNPS0603 0.55 1.05 1.10 2.65 0.90 0.70 0.95 2.30
TNPS0805 0.80 1.20 1.55 3.20 1.10 0.85 1.40 2.80
TNPS1206 1.40 1.50 1.90 4.40 1.80 1.15 1.75 4.10
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4Revision: 08-Jan-10
TNPS .... ESCC
Vishay Draloric Hi-Rel Thin Film Chip Resistors
DESCRIPTION
Production is strictly controlled and follows an extensive set
of instructions established for reproducibility. A
homogeneous film of metal alloy is deposited on a high grade
ceramic substrate (Al2O3) and conditioned to achieve the
desired temperature coefficient. Specially designed inner
contacts are deposited on both sides. A special laser is used
to achieve the target value by smoothly fine trimming
resistive layer without damaging the ceramics. A further
conditioning is applied in order to stabilize the trimming
result. The resistor elements are covered by a protective
coating designed for electrical, mechanical and climatic
protection. The terminations receive a final SnPb plating,
controlled for a minimum lead contents of 6 %. The
resistance value is stamped on the coating with a
four-character code system according to IEC 60062 (3). The
result of the determined production is verified by an
extensive testing procedure performed on 100 % of the
individual chip resistors. Only accepted products are placed
into a special matrix case packaging or into antistatic blister
tape in accordance with IEC 60286-3 (3).
ASSEMBLY
The resistors are suitable for processing on automatic SMD
assembly systems. They are suitable for automatic soldering
using wave, reflow or vapour phase as shown in
IEC 61760-1 (3). The encapsulation is resistant to all cleaning
solvents commonly used in the electronics industry,
including alcohols, esters and aqueous solutions. The
suitability of conformal coatings, if applied, shall be qualified
by appropriate means to ensure the long-term stability of the
whole system. Solderability is specified for 2 years after
production. The permitted storage time is 20 years.
APPROVALS
The resistors are approved to ESCC 4001/029. Conformity is
indicated by the ESCC Qualified Components logo on the
package label. Approval is granted by the European Space
Components Coordination and registered in the ESCC
Qualified Parts List, REP005.
The detail specification ESCC 4001/029 has been
established after successful completion of an Evaluation
Test Programme according to ESCC 2264000.
TESTING LEVELS
These products are available with Testing Level B or C
according to the ruling of the generic specification
ESCC 4001, issue 1, and the detail specification
ESCC 4001/029.
For Testing Level C, the production is succeeded by a final
production test sequence for resistance and dimensions.
This sequence is followed by an overload test, a non-linearity
test, measurement of the resistance at room temperature
and a visual inspection. A Certificate of Conformity provides
summary information by reporting the numbers of rejects for
each test or inspection.
For Testing Level B, additional measurements of resistance
at low and high temperatures are performed. The Certificate
of Conformity is completed with a detailed record of all
resistance measurements.
LOT ACCEPTANCE TESTS
Execution of Lot Acceptance Tests according to the ruling of
ESCC 4001, Issue 1 is available as a separate order item.
This is to be combined with the dedicated order line for the
required amount of samples, using packaging code “LX”.
The applicable scope of the Lot Acceptance Tests,
graduated to Level 1, Level 2 and Level 3 is illustrated further
below with the number samples required for each level.
Deliverable item to the Lot Acceptance Tests is the test
report together with the used samples, shipped in waffle tray
package.
Waffle Tray
Note
(3) The quoted IEC standards are also released as EN standards with the same number and identical contents
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Revision: 08-Jan-10 5
TNPS .... ESCC
Hi-Rel Thin Film Chip Resistors Vishay Draloric
FUNCTIONAL PERFORMANCE
100- 50 150
0
0.1
050
Ambient Temperature amb
ϑ
0.2
0.3
70 125 °C
W
Power Dissipation
P
TNPS1206
TNPS0805
TNPS0603
Derating
100
0.01
0.1
1K 10K
1
100K
Resistance Value
Current Noise
A
1
R
1M
µV/V
Ω
TNPS1206
TNPS0805
TNPS0603
Current Noise - A1
In accordance with IEC 60195
10 100 1K 10K 100K 1M
120
Resistance Value
R
100
80
60
Non-Linearity
3
A
40
TNPS1206
TNPS0805
TNPS0603
dB
Ω
In accordance with IEC/TR 60440
Non-linearity - A3
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6Revision: 08-Jan-10
TNPS .... ESCC
Vishay Draloric Hi-Rel Thin Film Chip Resistors
Pulse Voltage
1.2/50
U
10 100 1K 10K 100K 1M
1K
Resistance Value
R
100
10
TNPS1206
TNPS0805
TNPS0603
V
Ω
Pulse load rating in accordance with IEC 60115-1, 4.27; 1.2 µs/50 µs; 5 pulses at 12 s intervals; for permissible resistance change 0.5 %
1.2/50 Pulse
Pulse Voltage
10/700
U
10 100 1K 10K 100K 1M
1K
Resistance Value
R
100
10
TNPS1206
TNPS0805
TNPS0603
V
Ω
Pulse load rating in accordance with IEC 60115-1, 4.27; 10 µs/700 µs; 10 pulses at 1 min intervals; for permissible resistance change 0.5 %
10/700 Pulse
0.1 0.3 0.5 1.0 3.0
2
1
GHz
0.5
Frequency
f
| |/
R
Z
10 Ω
Inductive, ϕ > 0
Capactive, ϕ < 0
TNPS0603
100 Ω
49.9 Ω
226 Ω
1 kΩ
499 Ω
24.9 Ω
RF-Behaviour
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Revision: 08-Jan-10 7
TNPS .... ESCC
Hi-Rel Thin Film Chip Resistors Vishay Draloric
TESTS AND REQUIREMENTS
All tests are carried out in accordance with the following
specifications:
ESCC 4001, generic specification, issue 1 (2002)
ESCC 4001/029, detail specification
The components are approved within the ESCC system. For
the full test schedule refer to the documents listed above.
The tests are carried out in accordance with the stated
specifications.
Unless otherwise specified the following standard
atmospheric conditions apply:
Temperature: 15 °C to 35 °C
Relative humidity: 45 % to 75 %
Air pressure: 86 kPa to 106 kPa (860 mbar to 1060 mbar)
The components are mounted for testing on printed-circuit
boards in accordance with IEC 60115-1, 4.31, unless
otherwise specified.
0.1 0.3 0.5 1.0 3.0
2
1
GHz
0.5
Frequency
f
| |/
R
Z
10 Ω
Inductive, ϕ > 0
Capactive, ϕ < 0
TNPS0805
100 Ω
47.5 Ω
221 Ω
1 kΩ
499 Ω
20 Ω
RF-Behaviour
0.1 0.3 0.5 1.0 3.0
2
1
GHz
0.5
Frequency
f
| |/
R
Z
10 Ω
Inductive, ϕ > 0
Capactive, ϕ < 0
TNPS1206
100 Ω
49.9 Ω
226 Ω
1 kΩ
499 Ω
22.1 Ω
RF-Behaviour
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8Revision: 08-Jan-10
TNPS .... ESCC
Vishay Draloric Hi-Rel Thin Film Chip Resistors
TEST PROCEDURES AND REQUIREMENTS
ESCC 4001
PARAGRAPH
ESCC 4001/029
PARAGRAPH TEST PROCEDURE REQUIREMENTS
PERMISSIBLE CHANGE (ΔR)
Stability for product types:
TNPS0603 10.0 Ωto 221 kΩ
TNPS0805 10.0 Ωto 422 kΩ
TNPS1206 10.0 Ωto 1.00 MΩ
FINAL PRODUCTION TESTS (CHART II)
4.4 4.5.1 Marking - -
9.5.4 4.6.1 Resistance (22 ± 3) °C ± 1 % R; ± 0.5 % R; ± 0.1 % R
9.4 4.3.1 Dimension check - -
BURN-IN AND ELECTRICAL MEASUREMENTS (CHART III)
9.1 4.2.2 Overload
U=
1 ms
± (0.05 % R + 10 mΩ)
- (IEC/TR 60440) Non-linearity
(3rd harmonic attenuation) -A3 ≥ A3 min.
according to diagram non-linearity
9.5.3 4.6.2 Resistance at high
and low temperature
- (55 ± 3) °C
(125 ± 3) °C
Required for testing level B only:
± 50 ppm/K; ± 25 ppm/K; ± 15 ppm/K
9.5.4 4.6.1 Resistance (22 ± 3) °C ± 1 % R; ± 0.5 % R; ± 0.1 % R
9.17 4.2.3 External visual inspection - -
LOT ACCEPTANCE TESTS (CHART V)
9.11 (IEC 60068-2-20, Tb) Resistance to
soldering heat
Solder bath method;
(260 ± 5) °C;
(10 ± 1) s
No visible damage
± (0.02 % R+ 10 mΩ)
9.10.2 4.2.5 Robustness of
terminations:
9.10.2.2 (IEC 60115-1, 4.32) Adhesion
(shear test) 5 N; 10 s No visible damage
± (0.05 % R+ 10 mΩ)
9.10.2.3 4.3.3
Bend strength of
the end face plating
(substrate bending test)
Depth 2 mm; 5 s; 10 times No visible damage
± (0.05 % R+ 10 mΩ)
9.14 Climatic sequence: ± (0.1 % R+ 20 mΩ)
Rins ≥ 1 GΩ
9.14.2 (IEC 60068-2-2, Ba) Dry heat 125 °C; 16 h
9.14.3 (IEC 60068-2-30, Db) Damp heat, cyclic 55 °C; ≥ 90 % RH;
24 h; 1 cycle
9.14.4 (IEC 60068-2-1, Aa) Cold - 55 °C; 1 h off; 0.75 h on
9.14.5 (IEC 60068-2-13, M) Low air pressure 2 kPa; (25 ± 10) °C; 1 h;
U= ≤ Umax.
9.14.6 (IEC 60068-2-30, Db) Damp heat, cyclic 55 °C; ≥ 90 % RH;
24 h; 5 cycles
9.14.7 - DC load U= ≤ Umax.;
1 min
k x P70 x R
Style
0603
0805
1206
k
30
32
32
P70 x R
P70 x R
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Revision: 08-Jan-10 9
TNPS .... ESCC
Hi-Rel Thin Film Chip Resistors Vishay Draloric
LOT ACCEPTANCE TESTS
Execution of Lot Acceptance Tests is available as a separate order item. Deliverable item to the Lot Acceptance Tests is the test
report together with the used samples. The samples need to be ordered as a separate item.
9.15 - Endurance at
operating life
U= ≤ Umax.;
70 °C; 1000 h;
1.5 h on; 0.5 h off
± (0.05 % R+ 10 mΩ)
Rins ≥ 1 GΩ
9.6 (IEC 60115-1, 4.6.1.5) Insulation resistance V-shaped test jig
U = 100 V; 1 min Rins ≥ 1 GΩ
9.8 (IEC 60115-1, 4.7) Voltage proof
V-shaped test jig
URMS = 1.4 x Uins RMS;
f = (50 ± 10) Hz; 1 min
No breakdown;
no flashover
9.7
9.5.3 4.6.2 Temperature
coefficient
At (22/- 55/22) °C
and (22/125/22) °C ± 50 ppm/K; ± 25 ppm/K; ± 15 ppm/K
9.9 (IEC 60068-2-20, Ta) Solderability
Solder bath method;
SnPb40;
non-activated flux
(235 ± 5) °C; (2 ± 0.5) s
Good tinning (≥ 95 % covered);
no visible damage;
± (0.02 % R+ 10 mΩ)
9.19 (ESCC 24800) Permanence
of marking
a) Ethyl alcohol
b) Isopropyl alcohol
25 °C; 3 x 1 min
hard toothbrush;
3 x 10 strokes
Marking legible;
no visible damage
SCOPE OF LOT ACCEPTANCE TESTS
LEVEL1 ENVIRONMENTAL AND MECHANICAL 31 samples
Resistance to soldering heat ESCC 4001, 9.11
Robustness of terminations: Adhesion ESCC 4001, 9.10.2.2
Robustness of terminations: Bend strength of the end face plating ESCC 4001, 9.10.2.3
Climatic sequence ESCC 4001, 9.14
LEVEL 2 ENDURANCE 25 samples
Endurance at operating life, 1000 h ESCC 4001, 9.15
LEVEL 3 ELECTRICAL 10 samples
Insulation resistance ESCC 4001, 9.6
Voltage proof ESCC 4001, 9.8
Temperature coefficient ESCC 4001, 9.7
Solderability ESCC 4001, 9.9
Permanence of marking ESCC 4001, 9.19
TEST PROCEDURES AND REQUIREMENTS
ESCC 4001
PARAGRAPH
ESCC 4001/029
PARAGRAPH TEST PROCEDURE REQUIREMENTS
PERMISSIBLE CHANGE (ΔR)
Stability for product types:
TNPS0603 10.0 Ωto 221 kΩ
TNPS0805 10.0 Ωto 422 kΩ
TNPS1206 10.0 Ωto 1.00 MΩ
P70 x R
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10 Revision: 08-Jan-10
TNPS .... ESCC
Vishay Draloric Hi-Rel Thin Film Chip Resistors
Note
• Execution of Lot Acceptance Tests can be ordered using either the PART NUMBER or the PRODUCT DESCRIPTION
PART NUMBER AND PRODUCT DESCRIPTION FOR LOT ACCEPTANCE TESTS
PART NUMBER: LOTCHG-LA1-4001029
PREFIX LOT ACCEPTANCE TEST SPECIFICATION
LOTCHG LA1 = LAT Level 1
LA2 = LAT Level 2
LA3 = LAT Level 3
ESCC 4001/029
PRODUCT DESCRIPTION: TNPS ESCC 4001/029 LAT1
TNPS ESCC 4001/029 LAT1
MODEL SPECIFICATION LOT ACCEPTANCE TEST
TNPS ESCC 4001/029 LAT1 = LAT Level 1
LAT2 = LAT Level 2
LAT3 = LAT Level 3
ORDER TEXT EXAMPLE
An order of a Lot Acceptance Tests shall be combined with a dedicated order line for the required amount of samples, using packaging code
“LX”, see the example below:
POS QTY ITEM
...
0030 950 TNPS0805 25 75K0 0.5 % BX ESCC 4001/029 C
400102902C 7502D2
{Quantity for consumption}
0031 25 TNPS0805 25 75K0 0.5 % LX ESCC 4001/029 C
400102902C 7502D2
{Quantity for LAT samples}
0032 1 TNPS ESCC 4001/029 LAT2 {Lot Acceptance Test, Level 2}
...
L O T C H G - L A 1 - 4 0 0 1 0 2 9
Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
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Vishay
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
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applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
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