DS04-27236-3Ea
FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2002-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2006.8
ASSP For Power Supply Applications
(DC/DC Converter for DSC/Camcorder)
4-ch DC/DC Converter IC
with Synchronous Rectification
MB39A110
DESCRIPTION
The MB39A110 is a 4-channel DC/DC conv erter IC using pulse width modulation (PWM). This IC is ideal for up
conversion, down conversion, and up/down conversion.
This is built-in 4 c h in TSSOP -38P package and o perates at 2 MHz Ma x. Each chann el can be c ontrolled, an d
soft-start.
This is an ideal power supply for high-performance portable devices such as digital still cameras.
This product is covered by US Patent Number 6,147,477.
FEATURES
Supports fo r down-conversion and up/down Zeta conversion (CH1 to CH3)
Supports for up-conversion and up/down Sepic conversion (CH4)
For synchronous rectification (CH1, CH2)
Power supply voltage range : 2.5 V to 11 V
Referen ce voltage : 2.0 V ± 1 %
Error amplifier threshold voltage : 1.23 V ± 1%
High-frequency operation capability: 2 MHz (Max)
Standby current : 0 µA (Typ)
Built-in soft-start circuit independent of loads
Built-in totem-pole type output for MOS FET
Short-circuit detection capability by external signal (INS terminal)
One type of package (TSSOP-38 pin : 1 type)
APPLICATIONS
Digital still camera(DSC)
Digi tal vi deo camera (DVC)
Surveillance camera etc.
MB39A110
2
PIN ASSIGNMENT
(TOP VIEW)
(FP T -3 8 P -M03)
CS2
INE2
FB2
DTC2
VCC
CTL
CTL1
CTL2
CTL3
CTL4
VREF
RT
CT
GND
CSCP
DTC3
FB3
INE3
CS3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
CS1
INE1
FB1
DTC1
VCCO-P
OUT1-1
OUT1-2
OUT2-1
OUT2-2
GNDO1
GNDO2
OUT3
OUT4
VCCO-N
INS
DTC4
FB4
INE4
CS4
MB39A110
3
PIN DESCRIPTION
(Continued)
Block Pin No. Symbol I/O Descriptions
CH1
35 DTC1 I Dead time control terminal
36 FB1 O Error amplifier output terminal
37 INE1 I Error amplifier inverted input terminal
38 CS1 Soft-start setting capacitor connection terminal
33 OUT1-1 O P-ch drive output block ground terminal
(External main side FET gate driving)
32 OUT1-2 O N-ch drive output block ground terminal
(External synchronous rectification side FET gate driving)
CH2
4 DTC2 I Dead time control terminal
3 FB2 O Error amplifier output terminal
2INE2 I Error amplifier inverted input terminal
1CS2Soft-start setting capacitor connection terminal
31 OUT2-1 O P-ch drive output block ground terminal
(External main side FET gate driving)
30 OUT2-2 O N-ch drive output block ground terminal
(External synchronous rectification side FET gate driving)
CH3
16 DTC3 I Dead time control terminal
17 FB3 O Error amplifier output terminal
18 INE3 I Error amplifier inverted input terminal
19 CS3 Soft-start setting capacitor connection terminal
27 OUT3 O P-ch drive output terminal
CH4
23 DTC4 I Dead time control terminal
22 FB4 O Error amplifier output terminal
21 INE4 I Error amplifier inverted input terminal
20 CS4 Soft-start setting capacitor connection terminal
26 OUT4 O N-ch drive output terminal
OSC 13 CT Triangular wave frequency setting capacitor
connection terminal
12 RT Triangular wave frequency setting resistor
connection terminal
MB39A110
4
(Continued)
Block Pin No. Symbol I/O Descriptions
Control
6 CTL I Power supply control terminal
7 CTL1 I Control terminal
8 CTL2 I Control terminal
9 CTL3 I Control terminal
10 CTL4 I Contr ol termi nal
15 CSCP Short-circuit detection circuit capacitor connection
terminal
24 INS I Short-circuit detection comparator inverted input
terminal
Power
34 VCCO-P P-ch drive output block power supply terminal
25 VCCO-N N-ch drive output block power supply terminal
5VCCPower supply terminal
11 VREF O Reference voltage output terminal
29 GNDO1 Drive output block ground terminal
28 GNDO2 Drive output block ground terminal
14 GND Ground terminal
MB39A110
5
BLO C K DIAGR AM
VCCO-P
OUT2-1
OUT3
GNDO1
VCC
CTL
INE1
CS1
FB1
DTC1
INE2
CS2
FB2
DTC2
INE3
CS3
FB3
DTC3
INE4
CS4
INS
CSCP
FB4
DTC4
VREF
P-ch
CH1
CH2
CH3
CH4
PWM
Comp.1
1.23 V
+
+
+
+
IO = 300 mA
at VCCO = 7 V
P-ch
+
+
+
+
P-ch
Drive3
+
+
+
+
VREF
N-ch
SCP
Comp.
Drive4
SCP
OSC
CH
CTL UVLO
RT CT VREF
2.0 V
VREF VR Power
ON/OFF
CTL
bias
GND
1 V
0.9 V
0.4 V
+
+
+
+
+
37
38
36
35
2
1
3
4
18
19
17
16
21
20
22
23
24
15
CTL1 7
CTL2 8
CTL3 9
CTL4 10 12 13 11 14
6
5
29
OUT4
26
27
31
34
OUT1-1
33
VREF
1.23 V
VREF
1.23 V
VREF
1.23 V
N-ch
N-ch
PWM
Comp.2
PWM
Comp.3
PWM
Comp.4
GNDO2
28
OUT2-2
30
VCCO-N
25
OUT1-2
32
1 µA
1 µA
1 µA
100 k
1 µA
IO = 300 mA
at VCCO = 7 V
IO = 300 mA
at VCCO = 7 V
IO= 300 mA
at VCCO = 7 V
IO = 300 mA
at VCCO = 7 V
IO = 300 mA
at VCCO = 7 V
Dead Time
Dead Time
(td = 50 ns)
Dead Time
(td = 50 ns)
Dead Time
Error
Amp1
Error
Amp2
Error
Amp3
Error
Amp4
Drive1-1
Drive2-1
Drive1-2
Drive2-2
L priority
L
priority
L
priority L priority
Threshold voltage
(1.23 V ± 1 %)
Threshold voltage
(1.23 V ± 1 %)
Threshold voltage
(1.23 V ± 1 %)
L
priority
Threshold voltage
(1.23 V ± 1 %)
L
priority
H : release
UVLO
H : SCP
L priority
L priority
ErrorAmp power supply
SCPComp. power supply
ErrorAmp reference
1.23 V
Short detection signal
(L: at short)
MB39A110
6
ABSOLUTE MAXIMUM RATINGS
* : The packages are mounted on the epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VCC VCC, VCCO terminal 12 V
Output current IOOUT1 to OUT4 terminal 20 mA
Peak output current IOP OUT1 to OUT4 terminal,
Duty 5% (t = 1 / fOSC×Duty) 400 mA
Power dissipation PDTa +25 °C 1680* mW
Storage temperature TSTG −55 +125 °C
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VCC VCC, VCCO terminal 2.5 7 11 V
Reference voltage output current IREF VREF terminal 10mA
Input vo lta ge VINE INE1 to INE4 terminal 0 VCC 0.9 V
INS terminal 0 VREF V
VDTC DTC1 to DTC4 terminal 0 VREF V
Control input voltage VCTL CTL termin al 0 11 V
Output current IOOUT1 to OUT4 terminal 15 +15 mA
Osci llati on fre que nc y fOSC 0.21.022.0kHz
Timing capacitor CT27 100 680 pF
Timing resistor RT3.0 6.8 39 k
Soft-start capacitor CSCS1 to CS4 terminal 0.1 1.0 µF
Short-c irc uit dete ct ion capac itor CSCP 0.1 1.0 µF
Referenc e vo ltag e outpu t
capacitor CREF 0.1 1.0 µF
Operating ambient temperature Ta −30 +25 +85 °C
MB39A110
7
ELECTRICAL CHARACTERISTICS (VCC = VCCO = 7 V, Ta = +25 °C)
* : Standard design value (Continued)
Parameter Sym-
bol Pin No Conditions Value Unit
Min Typ Max
1. Reference
voltage
block [VREF]
Output voltage
VREF1 11 VREF = 0 mA 1.98 2.00 2.02 V
VREF2 11 VCC = 2.5 V to 11 V 1.975 2.000 2.025 V
VREF3 11 VREF = 0 mA to 1 mA 1.975 2.000 2.025 V
Input stability Line 11 VCC = 2.5 V to 11 V 2* mV
Load stability Load 11 VREF = 0 mA to 1 mA 2* mV
Temperature
stability VREF
/VREF 11 Ta = 0 °C to +85 °C0.20* %
Output current
at sh ort-circuit IOS 11 VREF = 0 V −300* mA
2. Under voltage
lockout protection
circuit block [UVLO]
Threshold
voltage VTH 33 VCC = 1.7 1.8 1.9 V
Hysteresis
width VH33 0.05 0.1 V
Reset voltage VRST 33 VREF = 1.5 1.7 1.85 V
3. Short-cir cui t
detection block
[SCP]
Threshold
voltage VTH 15 0.65 0.70 0.75 V
Input source
current ICSCP 15 −1.4 1.0 0.6 µA
4. Triangular
wave oscillator
block [OSC]
Oscillation
frequency
fOSC1 26, 27, 30 to 33 CT = 100 pF, RT = 6.8 k0.97 1.02 1.07 MHz
fOSC2 26, 27, 30 to 33 CT = 100 pF, RT = 6.8 k,
VCC = 2.5 V to 11 V 0.964 1.02 1.076 MHz
Frequency
input stability fOSC/
fOSC 26, 27, 30 to 33 CT = 100 pF, RT = 6.8 k,
VCC = 2.5 V to 11 V 1.0* %
Frequency
temperature
stability
fOSC/
fOSC 26, 27, 30 to 33 CT = 100 pF, RT = 6.8 k,
Ta = 0 °C to +85 °C1.0* %
5. Soft-
start
block
[CS1 to CS4]
Charge current ICS 1, 19, 20, 38 CS1 to CS4 = 0 V 1.4 1.0 0.6 µA
MB39A110
8
(VCC = VCCO = 7 V, Ta = +25 °C)
*: Standard design value (Continued)
Parameter Sym-
bol Pin No Conditions Value Unit
Min Typ Max
6. Error amplifier
block
[Error Amp1 to
Error Amp4]
Threshold
voltage
VTH1 2, 18, 21, 37 VCC = 2.5 V to 11 V,
Ta = +25 °C1.217 1.230 1.243 V
VTH2 2, 18, 21, 37 VCC = 2.5 V to 11 V,
Ta = 0 °C to +85 °C1.215 1.230 1.245 V
Temperature
stability VTH/
VTH 2, 18, 21, 37 Ta = 0 °C to +85 °C0.1* %
Input bias
current ΙB2, 18, 21, 37 INE1 to INE4 = 0 V 120 30 nA
Voltage gain AV3, 17, 22, 36 DC 100* dB
Frequency
bandwidth BW 3, 17, 22, 36 AV = 0 dB 1.4* MHz
Output voltage VOH 3, 17, 22, 36 1.7 1.9 V
VOL 3, 17, 22, 36 40 200 mV
Output source
current ISOURCE 3, 17, 22, 36 FB1 to FB4 = 0.65 V −21mA
Output sink
current ISINK 3, 17, 22, 36 FB1 to FB4 = 0.65 V 150 200 µA
7. PWM
comparator block
[PWM Comp.1 to
PWM Comp.4]
Threshold
voltage
VT0 26, 27, 30 to 33 Duty cycle = 0%0.3 0.4 V
VT100 26, 27, 30 to 33 Duty cycle = 100%0.85 0.90 0.95 V
Input current IDTC 4, 16, 23, 35 DTC = 0.4 V 2.0 0.6 µA
8. Output block
[Drive1 to Drive4]
Output source
current ISOURCE 26, 27, 30 to 33 Duty 5%
(t = 1 / fOSC × Duty) ,
OUT1 to OUT4 = 0 V −300* mA
Output sink
current ISINK 26, 27, 30 to 33 Duty 5%
(t = 1 / fOSC × Duty) ,
OUT1 to OUT4 = 7 V 300* mA
Output ON
resistor ROH 26, 27, 30 to 33 OUT1 to OUT4 = 15 mA 914
ROL 26, 27, 30 to 33 OUT1 to OUT4 = 15 mA 914
Dead time tD1 30 to 33 OUT2 OUT1 50* ns
tD2 30 to 33 OUT1 OUT2 50* ns
9. Short-circuit
detection
comparator block
[SCP Comp.]
Threshold
voltage VTH 33 0.97 1.00 1.03 V
Input bias
current IB24 INS = 0 V 25 20 17 µA
MB39A110
9
(Continued) (VCC = VCCO = 7 V, Ta = +25 °C)
*: Standard design value
Parameter Sym-
bol Pin No Conditions Value Unit
Min Typ Max
10. Control block
[CTL, CHCTL]
Output ON
conditions VIH 6, 7 to 10 CTL, CTL1 to CTL4 2 11 V
Output OFF
conditions VIL 6, 7 to 10 CTL, CTL1 to CTL4 0 0.8 V
Input current ICTLH 6, 7 to 10 CTL, CTL1 to CTL4 = 3 V 30 60 µA
ICTLL 6, 7 to 10 CTL, CTL1 to CTL4 = 0 V  1µA
11. General
Standby
current ICCS 5 CTL, CTL1 to CTL4 = 0 V 02µA
ICCSO 25, 34 CTL = 0 V 01µA
Power supply
current ICC 5CTL = 3 V 34.5mA
MB39A110
10
TYPICAL CHARACTERISTICS
(Continued)
Ta = +25 °C
CTL = 3 V
VREF= 0 mA
5
4
3
2
1
0024681012
Power supply current ICC (m A)
Reference voltage VREF (V)
Power Supply Current vs. Power Supply Voltage Reference Voltage vs. Power Supply Voltage
Power supply voltage VCC (V) Power supply voltage VCC (V)
Reference Voltage vs. CTL terminal Voltage
Reference voltag e VREF (V)
Ambient temperature Ta (°C)
Reference voltage VREF (V)
Reference Voltage vs. Ambient Temperature
CTL terminal voltage VCTL (V)
CTL terminal current ICTL (µA)
CTL terminal Curre nt vs. CTL terminal Voltage
CTL terminal voltage VCTL (V)
Ta = +25 °C
CTL = 3 V
5
4
3
2
1
0024681012
VCC = 7 V
CTL = 3 V
VREF= 0 mA
2.05
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
1.95
40 20 0 +20 +40 +60 +80 +100
Ta = +25 °C
VCC = 7 V
VREF= 0 mA
CTL = 3 V
5
4
3
2
1
0024681012
Ta = +25 °C
VCC = 7 V
200
180
160
140
120
100
80
60
40
20
0024681012
MB39A110
11
(Continued)
Ta = +25 °C
VCC = 7 V
CTL = 3 V
CT = 27 pF
10000
1000
100
10
CT = 100 pF
CT = 230 pF
CT = 680 pF
1 10 100 1000
Ta = +25 °C
VCC = 7 V
CTL = 3 V
RT = 3 k
RT = 6.8 k
RT = 15 kRT = 39 k
10000
1000
100
10 10 100 1000 10000
Ta = +25 °C
VCC = 7 V
CTL = 3 V
RT = 6.8 k
1.20
1.10
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20 0 400 800 1200 1600 2000
VCC = 7 V
CTL = 3 V
RT = 6.8 k
CT = 100 pF
1.20
1.10
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
40 20 0 +20 +40 +60 +80 +100
VCC = 7 V
CTL = 3 V
RT = 6.8 k
CT = 100 pF
1100
1080
1060
1040
1020
1000
980
960
940
920
900
40 20 0 +20 +40 +60 +80 +100
Triangular Wave Upper and Lower Limit Voltage
vs. Ambien t Temperature
Triangular wave upper and
lower limit voltage VCT (V)
Ambient temperature Ta (°C)
Triangular Wave Oscil lation Frequency
vs. Timing Resis tor
Triangula r wav e oscil la tio n
frequency fOSC (kHz)
Timing resistor RT (k)
Triangular Wave Oscillation Frequency
vs. Timing Capacitor
Triang ula r wav e oscillat ion
frequency fOSC (kHz)
Timing capacitor CT (pF)
Triangul ar Wav e Oscil lation Frequency
vs. Ambient Temperature
Triangular wave oscillation
frequency fOSC (kHz)
Ambient temperature Ta (°C)
Triangular wave upper and
lower limit voltage VCT (V)
Triangular Wave Upper and Lower Li mit Volt age
vs. Triangular Wave Oscillation Frequency
Triangular wave oscillation frequency fOSC (kHz)
Upper Upper
Lower
Lower
MB39A110
12
(Continued)
+
+
+37
38 36
1 µF
IN
10 k
2.4 k
240 k
OUT
2.46 V
10 k
1.5 V 1.23 V
40
30
20
10
0
10
20
30
40
180
90
0
90
180
1 k 10 k 100 k 1 M 10 M
φ
AV
Ta = +25 °C
VCC = 7 V
2000
1800
1600
1400
1200
1000
800
600
400
200
0
1680
40 20 0 +20 +40 +60 +80 +100
Error Amplifier Gain, Phase vs. Frequency
Gain AV (d B)
Phase φ (d eg)
Frequency f (Hz)
Power Dissipation vs. Ambient Temperature
Power diss ipa tio n PD (mW)
Ambient temperature Ta (°C)
Er ro r Amp1
the same as
other channels
MB39A110
13
FUNCTION DESCRIPTION
1. DC/DC Conver ter Functions
(1) Reference Voltage Block (VREF)
The reference voltage circuit generates a temperature-compensated reference voltage (2.0 V Typ) from the
voltage sup plied from t he power supply termi nal (pin 5) . The voltage i s used as the reference voltage for the
IC’s internal circuit.
The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal
(pin 11).
(2) Triangular-wave Oscillator Block (OSC)
The tr iangular wave oscillator incor porates a timing capacitor an d a timing resistor connected respectively to
the CT terminal (pin 13) and RT terminal (pin 12) to generate triangular oscillation wav ef orm amplitude of 0.4 V
to 0.9 V.
The triangular waveforms are input to the PWM comparator in the IC.
(3) Error Amplifier Bloc k (Error Amp1 to Error Amp4)
The err or a mplifier detects the DC/ DC conver ter ou tput voltage and ou tputs PW M con trol signals. In additi on,
an arbi trar y loop gain can be set by connectin g a feedback resistor and capacitor fro m the output ter minal to
inverted input terminal of the error amplifier, enabling stable phase compensation to the system.
Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the
CS1 terminal (pin 38) to CS4 terminal (pin 20) which are the non-inv erted input terminal for Error Amp. The use
of Er ror Am p for soft-start detect ion m akes it pos sible for a system to o perate on a fixed soft-s tar t time that is
independent of the output load on the DC/DC conv erter.
(4) PWM Comparator Block (PWM Comp.1 to PWM Comp.4)
The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/
output voltage.
The out put tra nsis tor turns on w hil e the erro r ampl if ier ou tput voltag e and DTC voltage rema in h igh er tha n the
triangular wave voltage.
(5) Output Block (Drive1 to Drive 4)
The output block is in the totem pole type, capable of driving an e xternal P-ch MOS FET (channel 1 and 2 main
side and channel 3), and N-ch MOS FET (channel 1 and 2 synchronous rectification side and channel 4).
MB39A110
14
2. Channel Control Function
The main or each channel is turned on and off depending on the v oltage lev els at the CTL terminal (pin 6), CS1
terminal (pin 38), CS2 terminal (pin 1), CS3 terminal (pin 19), and CS4 terminal (pin 20).
Channel On/Off Setting Conditions
* : Undefined
Note : Note that current ov er stand-by current flows into VCC terminal when the CTL terminal is in “L” lev el and one
of terminals between CTL1 and CTL4 is set to “H” level. (Refer to “ I/O EQUIVALENT CIRCUIT”.)
3. Protective Functions
(1) Timer-latch short-circuit protection circuit (SCP, SCP Comp.)
The short-circuit detection comparator (SCP) detects the output voltage level of each channel, and if any channel
output voltage becomes the short-circuit detection voltage or less, the timer circuits are actuated to start charging
the external capacitor CSCP connected to the CSCP terminal (pin 15).
When the capacitor (CSCP) voltage reaches about 0.7 V, the circuit is turned off the output transistor and sets the
dead time to 100 %.
In additi on, the shor t- circuit detect ion from extern al input is capa ble by using INS ter minal (pin 24) on short-
circuit detection comparator (SCP Comp.) .
To release the actuated protection circuit, either turn the power supply off and on again or set the CTL terminal
(pin 6) to the “L” level to lower the VREF term inal (pin 11) voltage to 1.5 V (Min) or less. (Refer toSETTING
TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT”.)
(2) Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect
to the power supply voltage, turn off the output transistor, and set the dead time to 100% while holding the CSCP
terminal (pin 15) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the
undervoltage lockout protection circuit.
PR OTECTION CIRCUIT OPERATING FUNCTION TABLE
This table refers to output condition when protection circuit is operating.
CTL CTL1 CTL2 CTL3 CTL4 Power CH1 CH2 CH3 CH4
L**** OFF OFF OFF OFF OFF
HLLLL ON OFF OFF OFF OFF
H H LLL ON ON OFF OFF OFF
HLHLL ON OFF ON OFF OFF
HLLH L ON OFF OFF ON OFF
HLLLHON OFF OFF OFF ON
H H H H H ON ON ON ON ON
Operating circuit OUT1-1 OUT1-2 OUT2-1 OUT2-2 OUT3 OUT4
Short-c irc uit pr otecti on ci rcui t H L H L H L
Under voltage lockout protection circuit H L H L H L
MB39A110
15
SETTING THE OUTPUT VOLTAGE
SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing resistor (RT) connected to the RT terminal
(pin 12), and the timing capacitor (CT) connected to the CT terminal (pin 13).
Triangular oscillation frequency : fOSC
+
+
V
O
R1
R2
INEX
CSX
Error
Amp
1.23 V
V
O
(V) =(R1 + R2)
1.23
R2
X: Each channel No.
• CH1 to CH4
fOSC (kHz ) := 693600
CT (pF) × RT (k)
MB39A110
16
SETTING THE SOFT-START TIME
To prevent r ush cur rents w hen the IC i s tur ned on, you can set a soft-sta rt by connec ting s oft-sta rt c apaci tors
(CS1 to CS4) to the CS1 terminal (pin 38) to the CS4 terminal (pin 20), respectively.
Setting each CTLX from “L” to “H” switches to ch arge the exter nal soft- star t capac itors (C S1 to CS4) connec ted
to the CS1 to CS4 terminals at 1 µA.
The erro r amplifier outp ut (FB1 to FB4) is deter mined by compar ison betwee n the lower one of the potential s
at two non-inverted input terminals (1.23 V, CS terminal voltages) and the inverted input terminal voltage (INE1
to INE4).
The FB t ermi nal voltage during th e s oft-s tart peri od ( CS termina l voltage < 1.23 V) i s t herefore determ ine d by
comparison between the INE terminal and CS terminal voltages. The DC/DC con verter output voltage rises in
proportion to the CS terminal voltage as the soft-start capacitor connected to the CS terminal is charged.
The soft-start time is obtained from the following formula:
Soft-start time: ts (time to output 100%)
ts (s) := 1.23 × CSX (µF)
+
+
VO
R1
R2
INEX
VREF
CSX
CSX
FBX
CTLX
Error Amp
CHCTL
1.23 V
1 µA
X: Each channel No.
L priority
• Soft-Start Circuit
MB39A110
17
TREATMENT WITHOUT USING CS TERMINAL
When not using the soft-start function, open the CS1 terminal (pin 38), the CS2 terminal (pin 1), the CS3 terminal
(pin 19), the CS4 terminal (pin 20).
1
19
CS2
CS3
38
20
CS1
CS4
“OPEN”
“OPEN”
“OPEN”
“OPEN”
• Without Setting Soft-Start Time
MB39A110
18
SETTING TIME CONST ANT FOR TIMER-LATCH SHORT -CIRCUIT PROTECTION CIRCUIT
Each channel uses the short-circuit detection comparator (SCP) to always compare the error amplifiers output
level to the reference voltage.
While DC/DC conv erter load conditions are stab le on all channels, the short-circuit detection comparator output
remains at “L” level, and the CSCP terminal (pin 15) is held at “L” level.
If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage
to dro p, the output of the s hort-circui t d etecti on co mpa rator on that c han nel g oes to “H” l evel. Th is c au se s the
external short-circuit protection capacitor CSCP connected to the CSCP terminal to be charged at 1 µA.
Short-circuit detection time : tCSCP
tCSCP (s) := 0.70 × CSCP (µF)
When the capacitor CSCP is charged to the th reshold voltage (VTH := 0.70 V), the latch is set an d the exter nal
FET is turned off (dead time is set to 100%). At this time, the latch input is closed and the CSCP terminal
(pin 15) is held at “L level.
In addition, the short-circuit detection from external input is capable by using INS terminal (pin 24) on the
short-circuit detection comparator (SCP Comp.). The short-circuit detection operation starts when INS terminal
voltage is less than threshold voltage (VTH := 1 V).
When the p ower supply is tu rn off and on again or VREF ter min al (pin 11 ) voltage i s less than 1.5 V (Min) by
setting CTL terminal (pin 6) to “L” le vel, the latch is released.
+
+
VO
R1
R2
INEX
CSCP CTL
VREF
SR
FBX
SCP
Comp.
UVLO
Latch
1.1 V
+
Error
Amp
1.23 V
1 µA
15
X: Each channel No.
To each channel
Drives
• Timer-latch short-circuit protection circuit
MB39A110
19
TREATMENT WITHOUT USING CSCP TERMINAL
When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 15) to GND with
the shortest distance.
14
15
GND
CSCP
• Treatment without using CSCP terminal
MB39A110
20
SETTING THE DEAD TIME
When th e device is set for step-u p or inver ted output bas ed on the st ep-up or step-up/down Ze ta conversion,
step-up/down Sepic conv ersion or flyback conv ersion, the FB terminal voltage may reach and e xceed the trian-
gular wave voltage due to load fluctuation. If t his c ase happens, the ou tpu t transi sto r is fixed to a full- ON s tate
(ON duty = 100 %). To prevent this, set the maxi mum duty of the outp ut transis tor. To set it, s et the voltage at
the DTC terminal by applying a resistive voltage divider to the VREF voltage as shown below.
When t he DTC ter minal voltag e is higher than the t riangular wave voltage, the output transist or is tur ned on.
The m aximum duty calculati on formula assuming that tr iangu lar wave amplit ude 0.5 V and triang ular wave
lower voltage := 0.4 V is given below.
When the DTC terminal is not used, connect it directly to the VREF terminal (pin 11) as shown below (when no
dead time is set).
=
=
DUTY (ON) Max =Vdt 0.4 V
0.5 V × 100 (%) , Vdt = Rb
Ra + Rb × VREF
11 VREF
DTCX Ra
Rb Vdt
X: Each channel No.
• When using DTC to set dead time
11 VREF
DTCX
X: Each channel No.
• When no dead time is set
MB39A110
21
I/O EQUIVALENT CIRCUIT
5
14
+
11
1.23 V
VREF
VCC
GND
79
k
124
k
CTL
GND
67
k
104
k
6CTLX
GND
76
k
76
k
RT
GND
VREF
(2.0 V)
12
+
0.7 V
CSX
GND
VREF
(2.0 V)
CT
GND
VREF
(2.0 V)
13
INEX CSX
GND
VCC
VREF
(2.0 V)
FBX
1.23 V CSCP
2 k
GND
VREF
(2.0 V)
15
DTCX
GND
VCC
FB1 to FB4 CT OUT1-X
OUTX
GNDO1
VCCO-P 34
29
GNDO2 28
OUT2-X
OUTX
GNDO1
VCCO-N 25
GNDO2
INS (1 V)
GND
VCC
100 k
VREF
(2.0 V)
24
X: Each channel No.
〈〈Reference voltag e block 〉〉 Control block〉〉 〈〈Channel control block〉〉
〈〈Short-start block〉〉 〈〈Tri ang ula r wave osc illa tor
block (RT) 〉〉
〈〈Triangular wave oscillator
block (CT)〉〉
〈〈Error amplifier block (CH1 to CH4) 〉〉 〈〈Short-circuit detection
comparat or block〉〉
〈〈PWM comparator block〉〉 〈〈Output block P-ch (CH1 to CH3) 〉〉
〈〈Short-circuit detection block〉〉
〈〈Output block N-ch (CH1, CH2, CH4) 〉〉
ESD
Protection
Element
ESD
Protection
Element
ESD
Protection
Element
MB39A110
22
APPLICATION EXAMPLE
A
B
C
D
A
B
D
C
R24
0.2 kR25
9.1 k
R26
20 k
C20
0.15 µF
C19
0.1 µF
R27
1 k
R9
3.3 kR10
22 k
R11
15 k
C10
0.15 µF
C11
0.1 µF
R12
1 k
R14
3 kR15
43 k
R16
15 k
C16
0.15 µF
C15
0.1 µF
R17
1 k
R18
12 k
R22
33 k
R23
20 k
R13
6.8 k
R19
100 k
R20
10 k
C17
0.15 µF
C18
0.1 µF
C14
2200 pF
C13
100 pF C12
0.1 µF
C21
0.1 µF
R21
1 k
C22 0.1 µF
C1
1 µFC2
2.2 µF
C23
0.1 µF
Q1
Q2
L1
6.8
µH
6.8
µH
10
µH
D1
VO1
(1.8 V)
IO1 =
550 mA
C3
1 µFC4
2.2 µF
Q3
Q4
L2
D2
VO2
(3.3 V)
IO2 =
600 mA
C5
1 µF
C7
1 µF
C6
2.2 µF
C8
2.2 µFC9
2.2 µF
Q5
Q6
L3
D3
D4
D5
T1
VO3
(5.0 V)
IO3 =
250 mA
VO4-1
(15 V)
IO4-1 =
40 mA
VO4-2
(15 V)
IO4-2 =
10 mA
VIN
(5.5 V to
8.5 V)
VCCO-P
OUT2-1
OUT3
GNDO1
VCC
CTL
INE1
CS1
FB1
DTC1
INE2
CS2
FB2
DTC2
INE3
CS3
FB3
DTC3
INE4
CS4
INS
CSCP
FB4
DTC4
CH1
CH2
CH3
CH4
RT CT VREF GND
37
38
36
35
2
1
3
4
18
19
17
16
21
20
22
23
24
15
CTL1 7
CTL2 8
CTL3 9
CTL4 10 12 13 11 14
6
5
29
OUT4
26
27
31
34
OUT1-1
33
GNDO2
28
OUT2-2
30
VCCO-N
25
OUT1-2
32
Step-
down
Step-
down
Step-
down
Trans-
former
Short-circuit
detection signal
(L : at short-circuit)
MB39A110
23
PARTS LIST
Note : SANYO : SANYO Electric Co., Ltd.
TDK : TDK Corporation
SUMIDA : SUMIDA Electric Co., Ltd.
ssm : SUSUMU Co., Ltd.
COMPONENT ITEM SPECIFICATION VENDOR PARTS No.
Q1, Q3, Q5
Q2, Q4
Q6
P-ch FET
N-ch FET
N-ch FET
VDS = 20 V, ID = 1.0 A
VDS = 20 V, ID = 1.8 A
VDS = 30 V, ID = 1.4 A
SANYO
SANYO
SANYO
MCH3307
MCH3405
MCH3408
D1 to D3
D4, D5 Diode
Diode VF = 0.4 V (Max) , IF = 1 A
VF = 0.55 V (Max) , IF = 0.5 A SANYO
SANYO SBS004
SB05-05CP
L1, L2
L3 Inductor
Inductor 6.8 µH
10 µH1.1 A, 47 m
0.94 A, 56 m
TDK
TDK
RLF5018T-
6R8M1R1
RLF5018T-
100MR94
T1 Transformer SUMIDA CLQ52 5388-T139
C1, C3, C5, C7
C2, C4, C6, C8
C9, C11
C10, C16, C17
C11, C12, C15
C13
C14
C18, C19
C20
C21 to C23
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
1 µF
2.2 µF
2.2 µF
0.15 µF
0.1 µF
100 pF
2200 pF
0.1 µF
0.15 µF
0.1 µF
25 V
25 V
25 V
16 V
50 V
50 V
50 V
50 V
16 V
50 V
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
C3216JB1E105K
C3216JB1E225K
C3216JB1E225K
C1608JB1C154M
C1608JB1H104K
C1608CH1H101J
C1608JB1H222K
C1608JB1H104K
C1608JB1C154M
C1608JB1H104K
R9
R10
R11, R16
R12, R17, R21
R13
R14
R15
R18
R19
R20
R22
R23, R26
R24
R25
R27
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
3.3 k
22 k
15 k
1 k
6.8 k
3 k
43 k
12 k
100 k
10 k
33 k
20 k
200
9.1 k
1 k
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
RR0816P-332-D
RR0816P-223-D
RR0816P-153-D
RR0816P-102-D
RR0816P-682-D
RR0816P-302-D
RR0816P-433-D
RR0816P-123-D
RR0816P-104-D
RR0816P-103-D
RR0816P-333-D
RR0816P-203-D
RR0816P-201-D
RR0816P-912-D
RR0816P-102-D
MB39A110
24
REFERENCE DATA
(Continued)
Ta = +25 °C
VO1 = 1.8 V, 550 mA
VO2 = 3.3 V, 600 mA
VO3 = 5 V, 250 mA
VO4-1 = 15 V, 40 mA
VO4-2 = 15 V, 10 mA
fOSC = 1 MHz setting
100
95
90
85
80
75
70
5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
Ta = +25 °C
V
O
1 = 1.8 V, 550 mA
V
O
2 = 3.3 V, 600 mA
V
O
3 = 5 V, 250 mA
V
O
4-1 = 15 V, 40 mA
V
O
4-2 = 15 V, 10 mA
f
OSC
= 1 MHz setting
100
95
90
85
80
75
70
5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
CH3
CH2
CH1
CH4
TOTAL efficiency η (%)
Input voltage VIN (V)
TOTAL Efficiency vs. Input Voltage
Note: On ly con cerned CH is ON .
Include external SW Tr
operating current.
Each CH efficiency η (%)
Input voltage VIN (V)
Each CH Efficiency vs. Input Voltage
MB39A110
25
(Continued)
Conversion efficiency η (%)
Load current lO (mA)
Conversion Eff iciency vs. Load Current (CH4)
Conversion efficiency η (%)
Load current IO (mA)
Conversion Eff iciency vs. Load Current (CH1, CH2, CH3)
Ta = +25 °C
VIN = 7.2 V
100
95
90
85
80
75
700 100 200 300 400 500 600 700 800 900 1000
CH3
CH2
CH1
IO2 120 mA:
discontinuance mode
Note: Only conc erned CH is ON.
Include external SW Tr
operating current.
Ta = +25 °C
VIN = 7.2 V
100
95
90
85
80
75
700102030405060
CH4
IO41 30 mA:
discontinuance mode
Notes : Only feedback controlling
output is get by using
transformer channel.
VO4-2: IO = 10 mA fixed
Only conc ern ed CH is ON.
Include external SW Tr
operating current.
MB39A110
26
(Continued)
Switching Wave Form
OUT1-1 (V)
OUT1-2 (V)
CH1
10
5
010
5
0
VD (V)
t (µs)
VIN = 7.2 V
VO1 = 1.8 V
IO1 = 550 mA
8
6
4
2
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
OUT2-1 (V)
OUT2-2 (V)
CH2
10
5
010
5
0
VD (V)
t (µs)
VIN = 7.2 V
VO2 = 3.3 V
IO2 = 600 mA
8
6
4
2
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
OUT3 (V) CH3
10
5
0
VD (V)
t (µs)
VIN = 7.2 V
VO3 = 5 V
IO3 = 250 mA
8
6
4
2
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
MB39A110
27
(Continued)
OUT4 (V) CH4
10
5
0
VD (V)
t (µs)
VIN = 7.2 V
VO4-1 = 15 V
IO4-1 = 40 mA
VO4-2 = 15 V
IO4-1 = 10 mA
8
6
4
2
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
MB39A110
28
USAGE PRECAUTIONS
Printed circuit board ground lines should be set up with consideration for common impedance.
Take appropriate static electricity measures.
Containers for semiconductor materials should have anti-static protection or be made of conductive material.
After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 k to 1 M between body and ground.
Do not apply negative voltages.
The use of n egative voltages below 0.3 V may create paras itic transist ors on LSI li nes, which c an cause
malfunction.
ORDERING INFORMATION
EV BOARD ORDERING INFORMATION
RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION
The LS I products of Fujits u Microele ctronic s with “E1 ” are com pliant wit h RoHS Dir ective , and has o bser ved
the standard of lead, cadmium, mercury, Hexa valent chromium, polybrominated biphenyls (PBB) , and polybro-
minated diphenyl ethers (PBDE) .
The product that conforms to this standard is added “E1” at the end of the part number.
MARKING FORMAT (LEAD FREE VERSION)
Part number Package Remarks
MB39A110PFT-❏❏❏E1 38-pin plastic TSSO P
(FPT-38P-M03) Lead Free version
EV board part No. EV board version No. Remarks
MB39A1 10E VB Board Rev. 1.0 TSSOP - 38P
MB39A110
XXXX E1
XXX
INDEX
Lead Free version
MB39A110
29
LABELING SAMPLE (LEAD FREE VERSION)
2006/03/01
ASSEMBLED IN JAPAN
G
QC PASS
(3N) 1MB123456P-789-GE1
1000
(3N)2 1561190005 107210
1,000
PCS
0605 - Z01A
1000
1/1
1561190005
MB123456P - 789 - GE1
MB123456P - 789 - GE1
MB123456P - 789 - GE1
Pb
Lead Free version
lead-free mark
JEITA logo JEDEC logo
MB39A110
30
MB39A110PFT-❏❏❏E1
RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL
[Temperature Profile for FJ Standard IR Reflow]
(1) IR (infrared reflow)
(2) Manual soldering (partial heating method )
Conditions : Temperature 400 °C Max
Times : 5 s max/pin
Item Condition
Mounting Method IR (infrared reflow) , Manual soldering (partial heating method)
Mounting tim es 2 times
Storage period
Before opening Please use it within two years after
Manufacture.
From opening to the 2nd
reflow Less than 8 days
When the storage period after
opening was exceeded Please processes within 8 days
after baking (125 °C, 24H)
Storage conditions 5 °C to 30 °C, 70%RH or less (the lowest possible humidity)
260 °C
(e)
(d')
(d)
255 °C
170 °C
190 °C
RT (b)
(a)
(c)
to
Note : Temperature : the top of the package body
(a) Te mperat ure Incr ease grad ient : Averag e 1 °C/s to 4 °C/s
(b) Preliminary heating : Temperature 170 °C to 190 °C, 60 s to 180 s
(c) Tem perat ure Increas e grad ient : Averag e 1 °C/s to 4 °C/s
(d) Actual heating : Temperature 260 °C Max; 255 °C or more, 10 s or less
(d’) : Temperature 230 °C or more, 40 s or less
or
Temperature 225 °C or more, 60 s or less
or
Temperature 220 °C or more, 80 s or less
(e) Cooling : Natural cooling or forced cooling
H rank : 260 °C Max
MB39A110
31
PACKAGE DIMENSION
38-pin plastic TSSOP Lead pitch 0.50 mm
Package width
×
package length
4.40 × 9.70 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 1.10 mm MAX
38-pin plastic TSSOP
(FPT-38P-M03)
(FPT-38P-M03)
C
2002 FUJITSU LIMITED F38003Sc-1-1
0.127±0.05
(.005±.002)
9.70±0.10(.382±.004)
4.40±0.10 6.40±0.10
(.252±.004)(.173±.004)
0.10(.004)
0.50(.020)
0.10±0.10
(.004±.004)
(.024±.004)
0.60±0.10
0.25(.010)
INDEX
1.10(.043)
0.90±0.05
(.035±.002)
9.00(.354)
0~8˚
MAX
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen,
Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://www.fmk.fujitsu.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD.
151 Lorong Chuan, #05-08 New Tech Park,
Singapore 556741
Tel: +65-6281-0770 Fax: +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm.3102, Bund Center, No.222 Yan An Road(E),
Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited Strategic Business Development Dept.