ICS9112-27 Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz. * * * * The ICS9112-27 is characterized for operation from -40C to 85C for automotive and industrial applications. * * Frequency range 0 - 140 MHz (3.3V) Less than 200 ps Jitter between outputs Skew controlled outputs < 100 ps Distribute one clock input to one bank of four outputs 3.3V 10% operation Available in 8 pin TSSOP, and SOIC packages. Block Diagram LOGIC CONTROL CLK0 CLK_IN 1 OE 2 CLK0 3 GND 4 ICS9112-27 OE Pin Configuration 8 CLK3 7 CLK2 6 VDD 5 CLK1 CLK1 8 pin TSSOP & SOIC CLK_IN CLK2 Functionality Table CLK3 INPUTS OUTPUTS CLK_IN OE CLK(3:0) 0 0 Tristate 0 1 0 1 0 Tristate 1 1 1 Pin Descriptions PIN NUMBER PIN NAME TYPE 1 CLK_IN IN 2 OE IN 3 CLK0 OUT Buffered clock output 4 GND PWR Ground 5 CLK1 OUT Buffered clock output 6 VDD PWR Power supply for 3.3V 7 CLK2 OUT Buffered clock output 8 CLK3 OUT Buffered clock output 0055J--08/12/15 DESCRIPTION Input reference frequency. Output enable. When OE is low, it tristates the clock outputs ICS9112-27 Absolute Maximum Ratings Supply voltage range VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 4.3 V Input voltage range VI (see notes 1 & 2) . . . . . . . -0.5V to VDD + 0.5V Output voltage range VO (see notes 1 & 2) . . . . . -0.5V to VDD + 0.5V Input clamp current IIK (VI< 0 or VI >VDD) . . . . . . . . . . . . . . . . 50 mA Output clamp current I OK (VO< 0 or VO) . . . . . . . . . . . . . . . . . 50 mA Continuous total output current, IO (V O = 0 to VDD) . . . . . . . . . 50 mA Package thermal impedance OJA (see note 3): PW package230.5C/W Storage temperature rante, T stg . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Notes: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. Recommended Operating Conditions Supply voltage, VDD High-level input voltage, VIH Min Nom Max Unit 3 3.3 3.6 V 0.7XVDD V Low-level input voltage, VIL 0.3XVDD V VDD V High-level output current, IOH -24 mA Low-level output current, IOL 24 mA 85 C Input voltage, VI 0 -40 Operating free-air temperature, TA Timing requirements over recommended ranges of supply voltage and operating free-air temperature Min 0 Clock frequency fCLK 0055J--08/12/15 2 Nom Max Unit 140 MHz ICS9112-27 Electrical Characteristics at 3.3V TA = -40 to 85C; Supply Voltage VDD = 3.3 V +/-10% (unless otherwise stated) PARAMETER SYMBOL CONDITIONS Input voltage V IK V DD = 3.3V, I I = -18 mA High-level Output Voltage V OH Low-level Output Voltage V OL High-level Input Current I OH Low-level Input Current I OL MIN TYP V DD = min to max, I OH = -1 mA V DD - 0.2 3.3 V DD = 3V, I OH = -24 mA 2 2.3 V DD = 3V, I OH = 12 mA 2.4 2.7 MAX UNITS -1.2 V V V DD = min to max, I OH = 1 mA 0.022 0.2 V DD = 3V, I OH = 24 mA 0.61 0.8 V DD = 3V, I OH = 12 mA 0.31 0.55 V DD = 3V, V O = 1V -53 -40 V DD = 3.3V, VO = 1.65V -54 V DD = 3V, V O = 2V 40 V DD = 3.3V, VO = 1.65V 53 mA mA 57 Input Current II V = V O or V DD Dynamic Supply Current I DD Unloaded outputs at 66.67 MHz 13 Input Capacitance1 CI V DD = 3.3V, V I = 0V or 3.3V 3 pF CO V DD = 3.3V, V I = 0V or 3.3V 3.2 pF 1 Output Capacitance -5 V 5 mA 37 mA 1. Guaranteed by design, not 100% tested in production. Switching Characteristics at 3.3V TA = -40 to 0 85C; Supply Voltage VDD = 3.3 V +/-10% (For loading, see figures 1 and 2) PARAMETER High-to-low Propagation Delay SYMBOL CONDITIONS MIN TYP MAX UNITS 1 t PLH V O = VDD/2 1.8 3.1 3.8 ns 1 t PHL V O = VDD/2 1.8 2.9 3.8 ns Tsk (o) V O = VDD/2 50 100 ps Tsk (p) V O = VDD/2 300 ps Tsk (pr) V O = VDD/2 500 ps Low-to-high Propagation Delay 1 Output Skew Window 1 Pulse Skew = | t PLH - t PHL | 1 Process Skew 66 MHz 6 140 MHz 3 66 MHz 6 140 MHz 3 CLKIN High Time1 Thigh CLKIN Low Time1 Tlow Output Rise Slew Rate1 Tr 0.3 to 0.6 V DD 1.5 2.1 4 V/ns Output Rise Slew Rate1 Tf 0.6 to 0.3 V DD 1.5 2.4 4 V/ns 1. Guaranteed by design, not 100% tested in production. 0055J--08/12/15 3 ns ns ICS9112-27 Parameter Measurement Information VDD 140W CLKn 140W 10 pF Figure 1. Test Load Circuit VDD 50% VDD CLKIN 0V TPHL tPLH 0.6 VDD 0.6 VDD 50% VDD 50% VDD 0.2 VDD CLK0-CLK3 VOH 0.2 VDD tR VOL tf Figure 2. Voltage Thresholds for Propagation Delay (tpd) Measurements 50% VDD Any CLK 50% VDD Any CLK Figure 3. Output Skew Tsk(0) Parameter Paramameter Value Unit VIH(Min) 0.5 VDD V VIL(Max) 0.35 VDD V Vtest 0.4 VDD V tcyc thigh 0.6 VDD VIH(Min) tlow Vtest VIL(Max) 0.2 VDD Figure 4. Clock Waveform 0.4 VDD Peak to Peak (Minimum) Note: All parameters in Figure 4 are according to PCI-X 1.0 specifications. 0055J--08/12/15 4 ICS9112-27 ICS9112AG-27 SUPPLY CURRENT vs. FREQUENCY o VDD = 3.63 V, TA = 85 C 35 30 IDD (mA) 25 20 15 10 5 0 0 20 40 60 80 100 120 140 160 Frequency (MHz) ICS9112AG-27 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT o VDD = 3.3V, TA = 25 C 3.5 VOH - High-Level Output Current (mA) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -80 -70 -60 -50 -40 -30 IOH - High-Level Output Current (mA) 0055J--08/12/15 5 -20 -10 0 ICS9112-27 ICS9112AG-27 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT o VDD = 3.3V, TA = 25 C 3.5 3.0 VOL - Low-Level Output Current (mA) 2.5 2.0 1.5 1.0 0.5 0.0 0 10 20 30 40 IOL - Low-Level Output Current (mA) 0055J--08/12/15 6 50 60 70 ICS9112-27 c N L E1 E INDEX AREA 1 2 D A A2 4.40 mm. Body, 0.65 mm. Pitch TSSOP (173 mil) (25.6 mil) In Millimeters In Inches SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN MAX A -1.20 -.047 A1 0.05 0.15 .002 .006 A2 0.80 1.05 .032 .041 b 0.19 0.30 .007 .012 c 0.09 0.20 .0035 .008 D SEE VARIATIONS SEE VARIATIONS E 6.40 BASIC 0.252 BASIC E1 4.30 4.50 .169 .177 e 0.65 BASIC 0.0256 BASIC L 0.45 0.75 .018 .030 N SEE VARIATIONS SEE VARIATIONS 0 8 0 8 aaa -0.10 -.004 A1 -Ce b VARIATIONS N SEATING PLANE aaa C 8 D mm. MIN 2.90 D (inch) MAX 3.10 MIN .114 Reference Doc.: JEDEC Publication 95, MO-153 10-0035 4.40 mm. Body, 0.65 mm. pitch TSSOP (0.0256 Inch) (173 mil) Ordering Information 9112AG-27LFT Example: XXXX A G -YYLF T Designation for tape and reel packaging Annealed Lead Free (Optional) Die revision code Package Type G = TSSOP Revision Designator (will not correlate with datasheet revision) Device Type 0055J--08/12/15 7 MAX .122 ICS9112-27 C N L INDEX AREA E H h x 45 1 2 D A A1 e SEATING PLANE B 150 mil (Narrow Body) SOIC In Millimeters In Inches SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX MIN MAX A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 SEE VARIATIONS SEE VARIATIONS D E 3.80 4.00 .1497 .1574 1.27 BASIC 0.050 BASIC e H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 SEE VARIATIONS SEE VARIATIONS N 0 8 0 8 VARIATIONS N .10 (.004) 8 150 mil (Narrow Body) SOIC D mm. MIN 4.80 MAX 5.00 Reference Doc.: JEDEC Publication 95, MS-012 10-0030 Ordering Information 9112AM-27LFT Example: XXXX A M -YYLF T Designation for tape and reel packaging Annealed Lead Free (Optional) Die revision code Package Type M = SOIC Revision Designator (will not correlate with datasheet revision) Device Type 0055J--08/12/15 8 D (inch) MIN MAX .1890 .1968