LTC1646
1
1646fa
■
CompactPCI Bus Removable Boards
■
Allows Safe Board Insertion and Removal from a
Live, CompactPCI
TM
Bus
■
Controls 3.3V and/or 5V Supplies
■
Programmable Foldback Current Limit During
Power-Up
■
Dual Level Circuit Breakers Protect Supplies from
Overcurrent and Short-Circuit Faults
■
LOCAL_PCI_RST# Logic On-Chip
■
PRECHARGE Output Biases I/O Pins During Card
Insertion and Extraction
■
User Programmable Supply Voltage Power-Up Rate
■
15V High Side Drive for External N-Channel
MOSFETS
■
PWRGD, RESETOUT and FAULT Outputs
CompactPCI Dual
Hot Swap Controller
The LTC
®
1646 is a Hot Swap
TM
controller that allows a
board to be safely inserted and removed from a live
CompactPCI bus slot. Two external N-Channel transistors
control the 3.3V and 5V supplies. The supplies can be
ramped-up in current limit or a programmable rate. Elec-
tronic circuit breakers protect both supplies against
overcurrent fault conditions. The PWRGD output indicates
when all of the supply voltages are within tolerance. The
OFF/ON pin is used to cycle the board power or reset the
circuit breaker. The PRECHARGE output can be used to
bias the bus I/O pins during card insertion and extraction.
PCI_RST# is logically combined on-chip with HEALTHY#
in order to generate LOCAL_PCI_RST# which can be used
to reset the CPCI card logic if either of the supply voltages
is not within tolerance.
The LTC1646 is available in the 16-pin narrow SSOP
package.
Figure 1
MMBT2222A
4.7nF
18Ω
18Ω12Ω
10Ω
2.7Ω
1.8Ω
R3
10Ω
3k
R4
10Ω
3k
1k
R1
0.005Ω, 1%
R2
0.007Ω
1%
1k
R5
1k, 5%
10k
10k
3k
1.2k
3V
IN
PRECHARGE OUT
1V ±10%
I
OUT
= ±55mA
3V
IN
3V
IN
3V
SENSE
5V
SENSE
3V
OUT
3V
OUT
5V
OUT
3.3V
5V
IN
5V
IN
5V
RESET#
I/O PCI
BRIDGE
(21154)
DATA BUS
DATA BUS
V(I/O)
V(I/O)
0.1µF 0.1µF
0.1µF
C1
0.01µF
Q2
IRF7413
Q1
IRF7413
LOCAL_PCI_RST#
5V
5A
3.3V
7.6A
GATE
GND PRECHARGE DRIVE
RESETOUT
TIMER
OFF/ON
FAULT
PWRGD
RESETIN
LTC1646
15
891071211 5
2
1
613 14
3
4
16
BD_SEL#
HEALTHY#
PCI_RST#
1646 F01
DATA LINE EXAMPLE
COMPACT PCI
BACKPLANE
CONNECTOR
(MALE)
COMPACT PCI
CIRCUIT CARD
CONNECTOR
(FEMALE)
5V
LONG 5V
3.3V
LONG 3.3V
GROUND
I/O PIN 1
Z1, Z2: BZX84C6V2
Z2
Z1
APPLICATIO S
U
FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
LTC1646
2
1646fa
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
DD
V
5VIN
Supply Current OFF/ON = 0V ●1.5 4 mA
V
LKO
Undervoltage Lockout 5V
IN
●2.3 2.50 2.7 V
3V
IN
●2.3 2.55 2.7 V
V
FB
Foldback Current Limit Voltage V
FB
= (V
5VIN
–V
5VSENSE
), V
5VOUT
= 0V, TIMER = 0V ●15 20 30 mV
V
FB
= (V
5VIN
– V
5VSENSE
), V
5VOUT
= 4V, TIMER = 0V ●50 55 65 mV
V
FB
= (V
3VIN
– V
3VSENSE
), V
3VOUT
= 0V, TIMER = 0V ●15 20 30 mV
V
FB
= (V
3VIN
– V
3VSENSE
), V
3VOUT
= 2V, TIMER = 0V ●50 55 65 mV
V
CB
Circuit Breaker Trip Voltage V
CB
= (V
5VIN
– V
5VSENSE
), V
5VOUT
= 5V, TIMER Open ●50 56 65 mV
V
CB
= (V
3VIN
– V
3VSENSE
), V
3VOUT
= 3.3V, TIMER Open ●50 56 65 mV
t
OC
Overcurrent Fault Response Time (V
5VIN
– V
5VSENSE
) = 100mV, TIMER Open ●10 21 30 µs
(V
3VIN
– V
3VSENSE
) = 100mV, TIMER Open ●10 21 30 µs
t
SS
Short-Circuit Fault Response Time (V
5VIN
– V
5VSENSE
) = 200mV, TIMER Open ●0.145 1 µs
(V
3VIN
– V
3VSENSE
) = 200mV, TIMER Open ●0.145 1 µs
I
CP
GATE Pin Output Current OFF/ON = 0V, V
GATE
= 0V, TIMER = 0V ●–18 –13 –8 µA
OFF/ON = 5V, V
GATE
= 5V, TIMER = 0V 80 200 300 µA
OFF/ON = 0V, V
GATE
= 5V, FAULT = 0V, TIMER Open ●4712mA
V
GATE
External Gate Voltage OFF/ON = 0V, I
GATE
= –1µA●12 15 16 V
(GATE to GND) OFF/ON = 0V, V
5VIN
= 3.3V, I
GATE
= –1µA●11 13 15 V
V
TH
Power Good Threshold Voltage 3V
OUT
●2.8 2.9 3.0 V
5V
OUT
●4.5 4.65 4.75 V
V
3VONLY
No 5V Input Mode Window Voltage V
3VONLY
= ⎪V
5VIN
– V
3VIN
⎪, V
5VOUT
= V
3VOUT
= 3.3V ●50 120 200 mV
V
IL
Input Low Voltage OFF/ON, RESETIN, FAULT ●0.8 V
ORDER PART NUMBER
T
JMAX
= 125°C, θ
JA
= 135°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LTC1646CGN
LTC1646IGN
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V5VIN = 5V and V3VIN = 3.3V unless otherwise noted.
Supply Voltages: 5V
IN
, 3V
IN ...............................................
10V
Input Voltages: (Pins 15, 16) ..................... –0.3V to 10V
Output Voltages: (Pins 1, 3, 4) .................. –0.3V to 10V
Analog Voltages and Currents:
(Pin 9) .................................... –0.3V to (3V
IN
+ 0.3V)
(Pins 2, 5, 7, 11, 13, 14) ........ –0.3V to (5V
IN
+ 0.3V)
(Pin 10) .......................................................... ±20mA
Operating Temperature Range:
LTC1646C ............................................... 0°C to 70°C
LTC1646I.............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RESETOUT
TIMER
FAULT
PWRGD
5V
OUT
GND
3V
OUT
3V
IN
RESETIN
OFF/ON
DRIVE
PRECHARGE
5V
IN
5V
SENSE
GATE
3V
SENSE
GN PART MARKING
1646
1646I
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
LTC1646
3
1646fa
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IH
Input High Voltage OFF/ON, RESETIN, FAULT ●2V
V
TIMER
TIMER Threshold Voltage V
TIMER
, FAULT = 0V ●1.15 1.25 1.35 V
I
IN
OFF/ON Input Current OFF/ON = 5V ●±0.08 ±10 µA
OFF/ON = 0V ●±0.08 ±10 µA
RESETIN Input Current RESETIN = 5V ●±0.08 ±10 µA
RESETIN = 0V ●±0.08 ±10 µA
5V
SENSE
Input Current 5V
SENSE
= 5V, 5V
OUT
= 0V ●66 100 µA
3V
SENSE
Input Current 3V
SENSE
= 3.3V, 3V
OUT
= 0V ●66 100 µA
3V
IN
Input Current 3V
IN
= 3.3V ●460 1000 µA
5V
OUT
Input Current 5V
OUT
= 5V, OFF/ON = 0V ●0.9 1.5 mA
3V
OUT
Input Current 3V
OUT
= 3.3V, OFF/ON = 0V ●0.9 1.5 mA
I
TIMER
TIMER Pin Current OFF/ON = 0V, V
TIMER
= 0V ●–7 –5 –3 µA
OFF/ON = 5V, V
TIMER
= 5V 6.6 mA
R
DIS
5V
OUT
Discharge Impedance OFF/ON = 5V ●120 220 Ω
3V
OUT
Discharge Impedance OFF/ON = 5V ●120 220 Ω
V
OL
Output Low Voltage FAULT, PWRGD, RESETOUT, I = 2mA ●0.25 0.4 V
V
PXG
PRECHARGE Reference Voltage V
PRECHARGE
, V
5VIN
= 5V and 3.3V ●0.90 1.00 1.10 V
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V5VIN = 5V and V3VIN = 3.3V unless otherwise noted.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
5V Current Foldback Profile 3.3V Current Foldback Profile
OUTPUT VOLTAGE (V)
0
OUTPUT CURRENT (A)
245
1646 G01
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RSENSE = 0.007Ω
1646 G02
12
11
10
9
8
7
6
5
4
3
2
1
0
OUTPUT VOLTAGE (V)
0
OUTPUT CURRENT (A)
245
13
RSENSE = 0.005Ω
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
1646 G03
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
5VIN Supply Current vs
Temperature
LTC1646
4
1646fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
5VIN Undervoltage Lockout
Voltage vs Temperature
3VIN Undervoltage Lockout
Voltage vs Temperature
5VIN Foldback Current Limit
Voltage vs Temperature
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
UNDERVOLTAGE LOCKOUT VOLTAGE (V)
1646 G04
2.60
2.55
2.50
2.45
2.40
LOW-TO-HIGH TRANSITION
HIGH-TO-LOW TRANSITION
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
UNDERVOLTAGE LOCKOUT VOLTAGE (V)
1646 G05
2.60
2.55
2.50
2.45
2.40
LOW-TO-HIGH TRANSITION
HIGH-TO-LOW TRANSITION
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
FOLDBACK CURRENT LIMIT VOLTAGE (mV)
1646 G06
60
50
40
30
20
10
0
5VOUT = 4V
5VOUT = 0V
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
FOLDBACK CURRENT LIMIT VOLTAGE (mV)
1646 G07
60
50
40
30
20
10
0
3VOUT = 2V
3VOUT = 0V
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
CIRCUIT BREAKER TRIP VOLTAGE (mV)
1646 G08
60
59
58
57
56
55
54
53
52
51
50 –50 –25 0 25 50 75 100
TEMPERATURE (°C)
CIRCUIT BREAKER TRIP VOLTAGE (mV)
1646 G09
60
59
58
57
56
55
54
53
52
51
50
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
OVERCURRENT FAULT RESPONSE TIME (µs)
1646 G10
22.00
21.75
21.50
21.25
21.00
20.75
20.50
20.25
20.00
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
SHORT-CIRCUIT FAULT RESPONSE TIME (ns)
1646 G11
170
160
150
140
130
120
110
100 –50 –25 0 25 50 75 100
TEMPERATURE (°C)
GATE CURRENT (µA)
1646 G12
–10
–11
–12
–13
–14
–15
3VIN Foldback Current Limit
Voltage vs Temperature
5VIN Circuit Breaker Trip Voltage
vs Temperature
3VIN Circuit Breaker Trip Voltage
vs Temperature
5VIN/3VIN Overcurrent Fault
Response Time vs Temperature
5VIN/3VIN Short-Circuit Fault
Response Time vs Temperature Gate Current vs Temperature
LTC1646
5
1646fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Gate I
SINK
vs Temperature Gate Voltage vs Temperature
Power Good Threshold Voltage vs
Temperature (3VOUT)
Power Good Threshold Voltage vs
Temperature (5VOUT)
Timer Threshold Voltage vs
Temperature
5VSENSE Input Current vs
Temperature
3VSENSE Input Current vs
Temperature 3VIN Input Current vs Temperature Timer Current vs Temperature
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
GATE ISINK (mA)
1646 G13
10
9
8
7
6
5
FAULT = 0V
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
GATE VOLTAGE (V)
1646 G14
15.5
15.0
14.5
14.0
13.5
13.0
12.5
5VIN = 5V
I = –1µA
5VIN = 3.3V
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
POWER GOOD THRESHOLD VOLTAGE (V)
1646 G15
3.00
2.95
2.90
2.85
2.80
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
POWER GOOD THRESHOLD VOLTAGE (V)
1646 G16
4.75
4.70
4.65
4.60
4.55
4.50 –50 –25 0 25 50 75 100
TEMPERATURE (°C)
TIMER THRESHOLD VOLTAGE (V)
1646 G17
1.30
1.28
1.26
1.24
1.22
1.20 –50 –25 0 25 50 75 100
TEMPERATURE (°C)
5VSENSE INPUT CURRENT (µA)
1646 G18
70
69
68
67
66
65
64
63
62
61
60
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
3VSENSE INPUT CURRENT (µA)
1646 G19
70
69
68
67
66
65
64
63
62
61
60 –50 –25 0 25 50 75 100
TEMPERATURE (°C)
3VIN INPUT CURRENT (µA)
1646 G20
480
475
470
465
460
455
450
445
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
TIMER CURRENT (µA)
1646 G21
–4.00
–4.25
–4.50
–4.75
–5.00
–5.25
–5.50
–5.75
–6.00
LTC1646
6
1646fa
PWRGD (Pin 4) :Open Drain Power Good Digital Output.
Connect the CPCI HEALTHY# signal to the PWRGD pin.
PWRGD remains low while V
3VOUT
≥ 2.9V and V
5VOUT
≥
4.65V. When either of the supplies falls below its power
good threshold voltage, PWRGD will go high after a 50µs
deglitching time.
5V
OUT
(Pin 5): 5V Output Sense. The PWRGD pin will not
pull low until the 5V
OUT
pin voltage exceeds 4.65V. If no 5V
input supply is available, tie the 5V
OUT
pin to the 3V
OUT
pin
in order to disable the 5V
OUT
power good function.
GND (Pin 6): Chip Ground
3V
OUT
(Pin 7): 3.3V Output Sense. The PWRGD pin will not
pull low until the 3V
OUT
pin voltage exceeds 2.90V. If no
3.3V input supply is available, tie the 3V
OUT
pin to the
5V
OUT
pin.
3V
IN
(Pin 8): 3.3V Supply Sense Input. An undervoltage
lockout circuit prevents the switches from turning on
when the voltage at the 3V
IN
pin is less than 2.5V. If no 3.3V
input supply is available, connect a diode between 5V
IN
and 3V
IN
(tie anode to 5V
IN
and cathode to 3V
IN
). See
Figure 11.
RESETOUT (Pin 1): Open Drain Digital Output. Connect
the CPCI LOCAL_PCI_RST# signal to the RESETOUT pin.
RESETOUT is the logical combination of RESETIN and
PWRGD (see Table 4).
TIMER (Pin 2): Current Fault Inhibit Timing Input. Connect
a capacitor from TIMER to GND. With the chip turned off,
the TIMER pin is internally held at GND. When the chip is
turned on, a 5µA pull-up current source is connected to
TIMER. Current limit and voltage compliance faults will be
ignored until the voltage at the TIMER pin is greater than
1.25V.
FAULT (Pin 3): Open Drain Digital I/O. FAULT is pulled low
when a current limit fault is detected. Faults are ignored
while the voltage at the TIMER pin is less than 1.25V. Once
the TIMER cycle is complete, FAULT will pull low and the
chip will latch off in the event of an overcurrent fault. The
chip will remain latched in the off state until the OFF/ON pin
is cycled high then low or the power is cycled.
Forcing the FAULT pin low with an external pull-down will
cause the chip to be latched into the off state after a 21µs
deglitching time.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
RESETOUT, PWRGD and FAULT
Output Low Voltage vs ISINK
5VOUT/3VOUT Discharge
Impedance vs Temperature
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
3V
OUT
/5V
OUT
DISCHARGE IMPEDANCE (Ω)
1646 G23
180
160
140
120
100
80
60
40
20
0
012 3 4 5
ISINK (mA)
OUTPUT LOW VOLTAGE (V)
1646 G22
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
90°C
25°C
–45°C
UU
U
PI FU CTIO S
LTC1646
7
1646fa
UU
U
PI FU CTIO S
3V
SENSE
(Pin 9): 3.3V Current Limit Set. With a sense
resistor placed in the supply path between 3V
IN
and
3V
SENSE
, the GATE pin voltage will be adjusted to maintain
a constant voltage across the sense resistor and a con-
stant current through the switch while the TIMER pin
voltage is less than 1.25V. A foldback feature makes the
current limit decrease as the voltage at the 3V
OUT
pin
approaches GND.
When the TIMER pin voltage exceeds 1.25V, the circuit
breaker function is enabled. If the voltage across the sense
resistor exceeds 56mV, the circuit breaker is tripped after
a 21µs time delay. In the event the sense resistor voltage
exceeds 150mV, the circuit breaker trips immediately and
the chip latches off. To disable the 3.3V current limit,
3V
SENSE
and 3V
IN
can be shorted together.
GATE (Pin 10): High Side Gate Drive for the External 3.3V
and 5V N-Channel pass transistors. Requires an external
series RC network for the current limit loop compensation
and setting the minimum ramp-up rate. During power-up,
the slope of the voltage rise at the GATE is set by the 13µA
current source connected to the internal charge pump and
the external capacitor connected to GND or by the 3.3V or
5V current limit and the bulk capacitance on the 3V
OUT
or
5V
OUT
supply lines. During power-down, the slope of the
ramp down voltage is set by the 200µA current source
connected to GND and the external GATE capacitor.
The voltage at the GATE pin will be modulated to maintain
a constant current when either the 3V or 5V supplies go
into current limit while the TIMER pin voltage is less than
1.25V. If a current fault occurs after the TIMER pin voltage
exceeds 1.25V, the GATE pin is immediately pulled to
GND.
5V
SENSE
(Pin 11): 5V Current Limit Set. With a sense
resistor placed in the supply path between 5V
IN
and
5V
SENSE
, the GATE pin voltage will be adjusted to maintain
a constant voltage across the sense resistor and a con-
stant current through the switch while the TIMER pin
voltage is less than 1.25V. A foldback feature makes the
current limit decrease as the voltage at the 5V
OUT
pin
approaches GND.
When the TIMER pin voltage is greater than 1.25V, the
circuit breaker function is enabled. If the voltage across
the sense resistor exceeds 56mV but is less than 150mV,
the circuit breaker is tripped after a 21µs time delay. In the
event the sense resistor voltage exceeds 150mV, the
circuit breaker trips immediately and the chip latches off.
To disable the 5V current limit, short 5V
SENSE
and 5V
IN
together.
5V
IN
(Pin 12): 5V Supply Sense Input. An undervoltage
lockout circuit prevents the GATE pin voltage from
ramping up when the voltage at the 5V
IN
pin is less than
2.5V. If no 5V input supply is available, tie the 5V
IN
pin to
the 3V
IN
pin.
PRECHARGE (Pin 13): Precharge Monitor Input. An on-
chip error amplifier with a 1V reference servos the DRIVE
pin voltage to keep the precharge node at 1V. If the
precharge function is not being used, tie the PRECHARGE
pin to GND.
DRIVE (Pin 14): Precharge Base Drive Output. Provides
base drive for an external NPN emitter-follower which in
turn biases the PRECHARGE node. If the precharge func-
tion is not being used, allow the DRIVE pin to float.
OFF/ON (Pin 15): Digital Input. Connect the CPCI BD_SEL#
signal to the OFF/ON pin. When the OFF/ON pin is pulled
low, the GATE pin is pulled high by a 13µA current source.
When the OFF/ON pin is pulled high the GATE pin will be
pulled to ground by a 200µA current source.
The OFF/ON pin is also used to reset the electronic circuit
breaker. If the OFF/ON pin is cycled high and low following
the trip of the circuit breaker, the circuit breaker is reset,
and a normal power-up sequence will occur.
RESETIN (Pin 16): Digital Input. Connect the CPCI
PCI_RST# signal to the RESETIN pin. Pulling RESETIN low
will cause the RESETOUT pin to pull low.
LTC1646
8
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TEST DIAGRA
W
TI I G DIAGRA S
WUW
V3VONLY No 5V Input Mode Window Voltage
tOC Overcurrent Fault Detect
tSC Short-Circuit Fault Detect
5V
OR 3.3V
100mV
FAULT
t
OC
1V
V
5VSENSE
OR
V
3VSENSE
FALL TIME ≤ 1µs, 5V
IN
= 5V, 3V
IN
= 3.3V
1646 T02
5V
OR 3.3V
200mV
FAULT
t
SC
1V
V
5VSENSE
OR
V
3VSENSE
FALL TIME ≤ 30ns, 5V
IN
= 5V, 3V
IN
= 3.3V
1646 T03
–V3VONLY
V3VONLY
5V
0V
PWRGD
V5VIN 3.3V
1646 T01
V3VONLY = ⎟5VIN – 3VIN ⎢ 5VOUT = 3VOUT = 3.3V, 3VIN = 3.3V
LTC1646
9
1646fa
Hot Circuit Insertion
When a circuit board is inserted into a live CompactPCI
(CPCI) slot, the supply bypass capacitors on the board can
draw huge supply transient currents from the CPCI power
bus as they charge up. The transient currents can cause
glitches on the power bus, causing other boards in the
system to reset.
The LTC1646 is designed to turn a board’s supply voltages
on and off in a controlled manner, allowing the board to be
safely inserted or removed from a live CPCI slot without
glitching the system power supplies. The chip also pro-
tects the supplies from shorts, precharges the bus I/O pins
during insertion and extraction and monitors the supply
voltages.
BLOCK DIAGRA
W
TIMER 2
3V
OUT
7
5V
OUT
5
–
+
+–
Q2 Q3
200µA
13µA
GATE
5V
OUT
55mV
150mV
V
GG
10
5V
SENSE
11
5V
IN
12
–
+
+–
+–
2.5V
UVL
–
+
+–
3V
OUT
55mV
150mV
C
P3
REF
3V
SENSE
9
3V
IN
8
RESETOUT
1
–
+
–
+
+–
+–
2.5V
UVL
Q4
1V
C
P4
REF
–
+
–
+
RESETIN 16
PWRGD 4
Q6
FAULT 3
Q7
OFF/ON 15
5µA
5V
in
GND
6
DRIVE
14
PRECHARGE
1646 BD
13
LOGIC
Q1
Q5
APPLICATIO S I FOR ATIO
WUUU
The LTC1646 is specifically designed for CPCI applica-
tions where the chip resides on the plug-in board.
LTC1646 Feature Summary
1. Allows safe board insertion and removal from a CPCI
backplane.
2. Controls 5V and 3.3V CPCI supplies.
3. Current limit during power-up: the supplies are allowed
to power up in current limit. This allows the chip to
power up boards with widely varying capacitive loads
without tripping the circuit breaker. The maximum
allowable power-up time is programmable using the
TIMER pin and an external capacitor.
LTC1646
10
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APPLICATIO S I FOR ATIO
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The main 3.3V and 5V inputs to the LTC1646 come from
the medium length power pins. The long 3.3V, 5V connec-
tor pins are shorted to the medium length 5V and 3.3V
connector pins on the CPCI plug-in card and provide early
power for the LTC1646’s precharge circuitry, the V(I/O)
pull-up resistors and the PCI bridge chip. The BD_SEL#
signal is connected to the OFF/ON pin while the PWRGD
pin is connected to the HEALTHY# signal. The HEALTHY#
signal is combined with the PCI_RST# signal on-chip to
generate the LOCAL_PCI_RST# signal which is available
at the RESETOUT pin.
The power supplies are controlled by placing external
N-channel pass transistors in the 3.3V and 5V power
paths.
Resistors R1 and R2 provide current fault detection and
R5 and C1 provide current control loop compensation.
Resistors R3 and R4 prevent high frequency oscillations
in Q1 and Q2.
When the CPCI card is inserted, the long 5V and 3.3V
connector pins and GND pins make contact first. The
LTC1646’s precharge circuit biases the bus I/O pins to 1V
during this stage of the insertion (Figure 2). The 5V and
3.3V medium length pins make contact during the next
stage of insertion, but the slot power is disabled as long
as the OFF/ON pin is pulled high by the 1.2k pull-up
resistor to V(I/O). During the final stage of board insertion,
the BD_SEL# short connector pin makes contact and the
OFF/ON pin can be pulled low. This enables the pass
transistors to turn on and a 5µA current source is con-
nected to the TIMER pin.
The current in each pass transistor increases until it
reaches the current limit for each supply. The 5V and 3.3V
supplies are then allowed to power up based on one of the
following power-up rates:
dV
dt
A
Cor I
Cor I
C
LIMIT V
LOAD VOUT
LIMIT V
LOAD VOUT
=µ==
13
1
5
5
3
3
,,
()
()
()
()
(1)
whichever is slower.
Current limit faults are ignored while the TIMER pin
voltage is ramping up and is less than 1.25V. Once both
supply voltages are within tolerance, HEALTHY# will pull
low and LOCAL_PCI_RST# is free to follow PCI_RST#.
4. Programmable foldback current limit: a programmable
analog current limit with a value that depends on the
output voltage. If the output is shorted to ground, the
current limit drops to keep power dissipation and
supply glitches to a minimum.
5. Dual-level, programmable 5V and 3.3V circuit breakers:
this feature is enabled when the TIMER pin voltage
exceeds 1.25V. If either supply exceeds current limit
for more than 21µs, the circuit breaker will trip, the
supplies will be turned off, and the FAULT pin is pulled
low. In the event that either supply exceeds three times
the set current limit, all supplies will be turned off and
the FAULT pin is pin is pulled low without delay.
6. 15V high side drive for external 3.3V and 5V N-channel
MOSFETs.
7. PWRGD output: monitors the voltage status of the
supply voltages.
8. PCI_RST# combined on-chip with HEALTHY# to create
LOCAL_PCI_RST# output. If HEALTHY# deasserts,
LOCAL_PCI_RST# is asserted independent of
PCI_RST#.
9. Precharge output: on-chip reference and amplifier pro-
vide 1V for biasing bus I/O connector pins during CPCI
card insertion and extraction.
10. Space saving 16-pin SSOP package.
PCI Power Requirements
CPCI systems may require up to four power rails: 5V, 3.3V,
12V and –12V. The LTC1646 is designed for CPCI applica-
tions which only use the 5V and/or 3.3V supplies. The
tolerance of the supplies as measured at the components
on the plug-in card is summarized in Table 1.
Table 1. PCI Power Supply Requirements
SUPPLY TOLERANCE CAPACITIVE LOAD
5V 5V ±5% <3000µF
3.3V 3.3V ±0.3V <3000µF
Power-Up Sequence
The LTC1646 is specifically designed for hot swapping
CPCI boards. The typical application is shown in Figure 1.
LTC1646
11
1646fa
Power-Down Sequence
When BD_SEL# is pulled high, a power-down sequence
begins (Figure 3).
Internal switches are connected to each of the output
supply voltage pins to discharge the bypass capacitors to
ground. The TIMER pin (Pin 2) is immediately pulled low.
The GATE pin (Pin 10) is pulled down by a 200µA current
source to prevent the load currents on the 3.3V and 5V
supplies from going to zero instantaneously in order to
prevent glitching the power supply voltages. When either
of the output voltages dips below its threshold, HEALTHY#
pulls high and LOCAL_PCI_RST# will be asserted low.
Once the power-down sequence is complete, the CPCI
card may be removed from the slot. During extraction, the
precharge circuit will continue to bias the bus I/O pins at
1V until the 5V and 3.3V long connector pin connections
are separated.
Timer
During a power-up sequence, a 5µA current source is
connected to the TIMER pin and current limit faults are
ignored until the voltage exceeds 1.25V. This feature
allows the chip to power up CPCI boards with widely
varying capacitive loads on the supplies. The power-up
time for either of the two outputs is given by:
tXV CXV
II
ON OUT LOAD XVOUT OUT
LIMIT XVOUT LOAD XVOUT
()• •
–
()
() ()
=2
(2)
Where XV
OUT
= 5V
OUT
or 3V
OUT
. For example, for
C
LOAD
(5V
OUT
) = 2000µF, I
LIMIT
= 7A, and I
LOAD
= 5A, the
5V
OUT
turn-on time will be ~10ms. By substituting the
variables in Equation 2 with the appropriate values, the
turn-on time for the 3V
OUT
output can also be calculated.
The timer period should be set longer than the maximum
supply turn-on time but short enough to not exceed the
maximum safe operating area of the pass transistor during
a short-circuit. The timer period for the LTC1646 is given
by:
tCV
A
TIMER TIMER
=µ
•.125
5
(3)
As a design aid, the timer period as a function of the timing
capacitor using standard values from 0.01µF to 1µF is
shown in Table 2.
20ms/DIV
GATE
10V/DIV
5V
OUT
3V
OUT
5V/DIV
TIMER
5V/DIV
BD_SEL#
5V/DIV
HEALTHY#
5V/DIV
LCL_PCI_RST#
5V/DIV
PRECHARGE
5V/DIV
1646 F02
GATE
10V/DIV
5V
OUT
3V
OUT
5V/DIV
TIMER
5V/DIV
BD_SEL#
5V/DIV
HEALTHY#
5V/DIV
LCL_PCI_RST#
5V/DIV
PRECHARGE
5V/DIV
10ms/DIV
1646 F03
Figure 2. Normal Power-Up Sequence Figure 3. Normal Power-Down Sequence
APPLICATIO S I FOR ATIO
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LTC1646
12
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APPLICATIO S I FOR ATIO
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Figure 4. Power-Up into a Short on 3.3V Output
GATE
5V/DIV
5V
OUT
3V
OUT
2V/DIV
TIMER
1V/DIV
BD_SEL#
5V/DIV
LCL_PCI_RST#
5V/DIV
HEALTHY#
5V/DIV
FAULT
5V/DIV
10ms/DIV
1646 F04
Table 2. tTIMER vs CTIMER
C
TIMER
t
TIMER
C
TIMER
t
TIMER
0.01µF 2.5ms 0.22µF 55ms
0.022µF 5.5ms 0.33µF 82.5ms
0.033µF 8.25ms 0.47µF 118ms
0.047µF 11.8ms 0.68µF 170ms
0.068µF 17ms 0.82µF 205ms
0.082µF 20.5ms 1µF 250ms
0.1µF 25ms
The TIMER pin is immediately pulled low when BD_SEL#
goes high.
Short-Circuit Protection
During a normal power-up sequence, if the TIMER pin is
done ramping and a supply is still in current limit, all of the
pass transistors will be immediately turned off and FAULT
(Pin 3) will be pulled low as shown in Figure 4.
In order to prevent excessive power dissipation in the pass
transistors and to prevent voltage spikes on the supplies
during short-circuit conditions, the current limit on each
supply is designed to be a function of the output voltage.
As the output voltage drops, the current limit decreases.
Unlike a traditional circuit breaker function where huge
currents can flow before the breaker trips, the current
foldback feature assures that the supply current will be
kept at a safe level and prevents voltage glitches at the
input supply when powering up into a short circuit.
After power-up (TIMER pin voltage >1.25V), the 5V and
3.3V supplies are protected from overcurrent and short-
circuit conditions by dual-level circuit breakers. If the
sense resistor voltage of either supply current exceeds
56mV but is less than 150mV, an internal timer is started.
If the supply is still overcurrent after 21µs, the circuit
breaker trips and both supplies are turned off (Figure 5).
5V
IN
–5V
SENSE
50mV/DIV
GATE
10V/DIV
FAULT
5V/DIV
10µs/DIV 1646 F05
Figure 5. Overcurrent Fault on 5V
If a short-circuit occurs and the sense resistor voltage of
either supply current exceeds 150mV, the circuit breakers
trip without delay and the chip latches off (Figure 6). The
chip will stay in the latched-off state until OFF/ON (Pin 15)
is cycled high then low, or the 5V
IN
(Pin 12) power supply
is cycled.
The current limit and the foldback current level for the 5V
and 3.3V outputs are both a function of the external sense
resistor (R1 for 3V
OUT
and R2 for 5V
OUT
, see Figure 1). As
shown in Figure 1, a sense resistor is connected between
LTC1646
13
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APPLICATIO S I FOR ATIO
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5V
IN
(Pin 12) and 5V
SENSE
(Pin 11) for the 5V supply. For
the 3.3V supply, a sense resistor is connected between
3V
IN
(Pin 8) and 3V
SENSE
(Pin 9). The current limit and the
current foldback current level are given by Equations 4
and 5:
ImV
R
ImV
R
LIMIT XVOUT SENSE XVOUT
FOLDBACK XVOUT SENSE XVOUT
() ()
() ()
=
=
55
20
(5)
where XV
OUT
= 5V
OUT
or 3V
OUT
.
As a design aid, the current limit and foldback level for
commonly used values for R
SENSE
is shown in Table 3.
Table 3. ILIMIT(XVOUT) and IFOLDBACK(XVOUT) vs RSENSE
R
SENSE
(Ω)I
LIMIT(XVOUT)
I
FOLDBACK(XVOUT)
0.005 11A 4A
0.006 9.2A 3.3A
0.007 7.9A 2.9A
0.008 6.9A 2.5A
0.009 6.1A 2.2A
0.01 5.5A 2A
where XV
OUT
= 3V
OUT
or 5V
OUT
.
5VIN –5VSENSE
100mV/DIV
GATE
10V/DIV
FAULT
5V/DIV
5µs/DIV 1646 F06
(4)
Figure 6. Short-Circuit Fault on 5V
4
3
21
+
–
5VIN
5VIN
RSENSE
5VSENSE
VCB
VCB(MAX) = 65mV
VCB(NOM) = 56mV
VCB(MIN) = 50mV
12 11
ILOAD(MAX)
LTC1646*
*ADDITIONAL DETAILS
OMITTED FOR CLARITY
1646 F07
–+
Figure 7. Circuit Breaker Equivalent
Circuit for Calculating RSENSE
Calculating R
SENSE
An equivalent circuit for one of the LTC1646’s circuit
breakers useful in calculating the value of the sense
resistor is shown in Figure 7. To determine the most
appropriate value for the sense resistor first requires the
maximum current required by the load under worst-case
conditions.
Two other parameters affect the value of the sense resis-
tor. First is the tolerance of the LTC1646’s circuit breaker
threshold. The LTC1646’s nominal circuit breaker
threshold is V
CB(NOM)
= 56mV; however, it exhibits a
–6mV/+9mV tolerance due to process variations. Second
is the tolerance (RTOL) in the sense resistor. Sense
resistors are available in RTOLs of ±1%, ±2% and ±5%
and exhibit temperature coefficients of resistance (TCRs)
between ±75ppm/°C and ±100ppm/°C. How the sense
resistor changes as a function of temperature depends on
the I
2
R power being dissipated by it.
The first step in calculating the value of R
SENSE
is based on
I
TRIP(MAX)
and the lower limit for the circuit breaker
threshold, V
CB(MIN)
. The maximum value for R
SENSE
in this
case is expressed by Equation 6:
RV
I
SENSE MAX CB MIN
TRIP MAX
() ()
()
=
(6)
The second step is to determine the nominal value of the
sense resistor which is dependent on its tolerance
LTC1646
14
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APPLICATIO S I FOR ATIO
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(RTOL = ±1%, ±2% or ±5%) and standard sense resistor
values. Equation 7 can be used to calculate the nominal
value from the maximum value found by Equation 6:
RR
RTOL
SENSE NOM SENSE MAX
() ()
=
+⎛
⎝
⎜⎞
⎠
⎟
1100
(7)
Often, the result of Equation 7 may not yield a standard
sense resistor value. In this case, two sense resistors with
the same RTOL can be connected in parallel to yield
R
SENSE(NOM)
.
The last step requires calculating a new value for
I
TRIP(MAX)
(I
TRIP(MAX, NEW)
) based on a minimum value for
R
SENSE
(R
SENSE(MIN)
) and the upper limit for the circuit
breaker threshold, V
CB(MAX)
. Should the calculated value
for I
TRIP(MAX, NEW)
be much greater than the design value
for I
TRIP(MAX)
, a larger sense resistor value should be
selected and the process repeated. The new value for
I
TRIP(MAX, NEW)
is given by Equation 8:
IV
R
where R R RTOL
TRIP MAX NEW CB MAX
SENSE MIN
SENSE MIN SENSE NOM
(,) ()
()
() ( )
()
•–
=
=⎛
⎝
⎜⎞
⎠
⎟
⎡
⎣
⎢⎤
⎦
⎥
8
1100
Example
: A 5V supply exhibits a nominal 5A load with a
maximum load current of 6.8A (I
LOAD(MAX)
= 6.8A), and
sense resistors with ±5% RTOL will be used. According to
Equation 6, V
CB(MIN)
= 50mV and R
SENSE(MAX)
is given by:
RV
I
mV
A
SENSE MAX CB MIN
TRIP MAX
() ()
() ..===Ω
50
68 0 0074
The nominal sense resistor value is (Equation 7):
RR
RTOL
SENSE NOM SENSE MAX
() () ..=
+⎛
⎝
⎜⎞
⎠
⎟
=Ω
+⎛
⎝
⎜⎞
⎠
⎟
=Ω
1100
0 0074
15
100
0 007
And the new current-limit trip point is Equation 8:
IV
R
V
RRTOL
mV A
TRIP MAX NEW CB MAX
SENSE MIN
CB MAX
SENSE N M
(,) ()
()
()
()
•– ..
==
⎛
⎝
⎜⎞
⎠
⎟
⎡
⎣
⎢⎤
⎦
⎥
==
0
1100
65
0 0065 98
Since I
TRIP(MAX, NEW)
> I
LOAD(MAX)
, a larger value for
R
SENSE
should be selected and the process repeated again
to lower I
TRIP(MAX, NEW)
without substantially affecting
I
LOAD(MAX)
.
Output Voltage Monitor
The status of both 5V and 3.3V output voltages is moni-
tored by the power good function. In addition, the PCI_RST#
signal is logically combined on-chip with the HEALTHY#
signal to create LOCAL_PCI_RST# (see Table 4).
Table 4. LOCAL_PCI_RST# Truth Table
PCI_RST# HEALTHY# LOCAL_PCI_RST#
LO LO LO
LO HI LO
HI LO HI
HI HI LO
If either of the output voltages drop below the power good
threshold for more than 50µs, the HEALTHY# signal will be
pulled high and the LOCAL_PCI_RST# signal will be pulled
low.
Precharge
The PRECHARGE input and DRIVE output pins are in-
tended for use in generating the 1V precharge voltage that
is used to bias the bus I/O connector pins during board
insertion. The LTC1646 is also capable of generating
precharge voltages other than 1V. Figure 8 shows a circuit
that can be used in applications requiring a precharge
voltage less than 1V. The circuit in Figure 9 can be used for
applications that need precharge voltages greater than 1V.
Table 5 lists suggested resistor values for R1 and R2 vs
precharge voltage for the application circuits shown in
Figures 8 and 9.
LTC1646
15
1646fa
Figure 10. 3.3V Supply Only Typical Application
Figure 8. Precharge Voltage <1V Application Circuit
APPLICATIO S I FOR ATIO
WUUU
MMBT2222A
4.7nF 18Ω
18Ω
10Ω
10Ω
3k
3k
1k
0.005Ω
1%
1k
12Ω
1k
10k
1k
3k
1.2k
3VIN
PRECHARGE OUT
1V ±10%
IOUT = ±55mA
3VIN
3VIN 3VSENSE 5VSENSE
3VOUT
3VOUT 5VOUT
3.3V
5VIN
RESET#
I/O
PCI
BRIDGE
(21154)
DATA BUS
DATA LINE EXAMPLE
V(I/O)
V(I/O)
0.1µF
0.1µF
0.010µF
IRF7413
LOCAL_PCI_RST#
3.3VOUT
7.6A
GATE
GND PRECHARGE DRIVE
RESETOUT
TIMER
OFF/ON
FAULT
PWRGD
RESETIN
LTC1646
15
891071211 5
2
1
613 14
3
4
16
1646 F10
Z1: BZX84C6V2
Z1
DATA BUS
BD_SEL#
HEALTHY#
PCI_RST#
COMPACT PCI
BACKPLANE
CONNECTOR
(MALE)
COMPACT PCI
CIRCUIT CARD
CONNECTOR
(FEMALE)
3.3V
LONG 3.3V
GROUND
I/O PIN 1
4
3
21
1.8Ω
MMBT2222A
4.7nF 18Ω
R1 R2
1k
12Ω
3V
IN
PRECHARGE OUT
1646 F08
GND PRECHARGE DRIVE
LTC1646*
61314
*ADDITIONAL DETAILS OMITTED FOR CLARITY
V
PRECHARGE
= • 1V
R1
R1 + R2
MMBT2222A
4.7nF 18Ω
R1 R2
1k
12Ω
3V
IN
PRECHARGE OUT
1646 F09
GND PRECHARGE DRIVE
LTC1646*
613 14
*ADDITIONAL DETAILS OMITTED FOR CLARITY
V
PRECHARGE
= • 1V
R1 + R2
R1
Figure 9. Precharge Voltage >1V Application Circuit
Other CompactPCI Applications
The LTC1646 can be easily configured for applications
where no 5V supply is present by simply tying the 5V
IN
and
5V
SENSE
pins to the 3V
IN
pin and tying the 5V
OUT
pin to the
3V
OUT
pin (Figure 10).
Table 5. R1 and R2 Resistor Values vs Precharge Voltage
V
PRECHARGE
R1 R2 V
PRECHARGE
R1 R2
1.5V 18Ω9.09Ω0.9V 16.2Ω1.78Ω
1.4V 18Ω7.15Ω0.8V 14.7Ω3.65Ω
1.3V 18Ω5.36Ω0.7V 12.1Ω5.11Ω
1.2V 18Ω3.65Ω0.6V 11Ω7.15Ω
1.1V 18Ω1.78Ω0.5V 9.09Ω9.09Ω
1V 18Ω0Ω
LTC1646
16
1646fa
Figure 11. 5V Supply Only Typical Application
Figure 12. BD_SEL# Pushbutton Toggle Switch
APPLICATIO S I FOR ATIO
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If no 3.3V supply is present, Figure 11 illustrates how the
LTC1646 should be configured. First, 3V
SENSE
(Pin 9) is
connected to 3V
IN
(Pin 8), 3V
OUT
(Pin 7) is connected to
5V
OUT
(Pin 5) and the LTC1646’s 3V
IN
pin is connected
through a diode (BAV16W) to 5V
IN
.
For applications where the BD_SEL# connector pin is
typically grounded on the backplane, the circuit in
Figure 12 allows the LTC1646 to be reset simply by
pressing a pushbutton switch on the CPCI plug-in board.
This arrangement eliminates the requirement to extract
and reinsert the CPCI board in order to reset the LTC1646’s
circuit breakers.
Overvoltage Transient Protection
Good engineering practice calls for bypassing the supply
rail of any analog circuit. Bypass capacitors are often
placed at the supply connection of every active device, in
addition to one or more large-value bulk bypass capacitors
per supply rail. If power is connected abruptly, the large
bypass capacitors slow the rate of rise of the supply
voltage and heavily damp any parasitic resonance of lead
or PC trace inductance working against the supply bypass
capacitors.
The opposite is true for LTC1646 Hot Swap circuits
mounted on plug-in cards. In most cases, there is no
supply bypass capacitor present on the powered 3.3V or
5V side of the MOSFET switch. An abrupt connection,
produced by inserting the board into a backplane connec-
tor, results in a fast rising edge applied on the 3.3V and the
5V line of the LTC1646.
2.7Ω
10Ω
0.007Ω
1k
3V
IN
3V
SENSE
5V
SENSE
GATE 5V
OUT
3V
OUT
5V
IN
5V
IN
0.1µF0.01µF
IRF7413 5V
OUT
LTC1646
8 9 12 11 10 5 7
6
BAV16W
1646 F11
GND
COMPACT PCI
BACKPLANE
CONNECTOR
(MALE)
COMPACT PCI
CIRCUIT CARD
CONNECTOR
(FEMALE)
GND
5V
LONG
5V
4
3
21
Z1: BZX84C6V2
Z1
BD_SEL#
1k
100Ω
LONG GND
15
6
OFF/ON
LTC1646
GND
V(I/0)
PUSH-
BUTTON
SWITCH
1646 F12
1.2k
COMPACT PCI
BACKPLANE
CONNECTOR
(MALE)
COMPACT PCI
CIRCUIT CARD
CONNECTOR
(FEMALE)
LTC1646
17
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APPLICATIO S I FOR ATIO
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Figure 14. Recommended Layout for
Transient Protection Components
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VIAS TO
GND PLANE
3V
IN
GND
LTC1646*
*ADDITIONAL DETAILS OMITTED FOR CLARITY
DRAWING IS NOT TO SCALE! 1646 F14
5V
IN
TZ1
TZ2
C2
C3
Since there is no bulk capacitance to damp the parasitic
trace inductance, supply voltage transients excite para-
sitic resonant circuits formed by the power MOSFET
capacitance and the combined parasitic inductance from
the wiring harness, the backplane and the circuit board
traces. These ringing transients appear as a fast edge on
the 3.3V or 5V supply, exhibiting a peak overshoot to 2.5
times the steady-state value followed by a damped sinu-
soidal response whose duration and period is dependent
on the resonant circuit parameters. Since the absolute
maximum supply voltage of the LTC1646 is 10V, transient
protection against 3.3V and 5V supply voltage spikes and
ringing is highly recommended.
In these applications, there are two methods for eliminat-
ing these supply voltage transients: using Zener diodes to
clip the transient to a safe level and snubber networks.
Snubbers are RC networks whose time constants are
large enough to safely damp the inductance of the board’s
parasitic resonant circuits. As a starting point, the shunt
capacitors in these networks are chosen to be 10× to 100×
the power MOSFET’s C
OSS
under bias. The value of the
series resistor (R6 and R7 in Figure 13) is then chosen to
be large enough to damp the resulting series R-L-C circuit
and typically ranges from 1Ω to 10Ω. Note that in all
Figure 13. Place Transient Protection Device Close to the LTC1646
C1
0.01µF
C2
0.1µF
C3
0.1µF
3VIN
VIN2
3.3V
VIN1
5V
3VSENSE
8
3VOUT
7
5VIN
12
5VOUT
5
5VSENSE
119
GATE
10
R3
10ΩR4
10Ω
5VOUT
AT 5A
3VOUT
AT 7.6A
R5
1k
R1
0.005ΩQ2
IRF7413
Q1
IRF7413
R2
0.007Ω
Z1 Z2
LTC1646**
1646 F13
GND
6
Z1, Z2: BZX84C6V2
**ADDITIONAL DETAILS OMITTED FOR CLARITY
R6 2.7Ω
LONG 5V
R7 1.8Ω
LONG 3.3V
LTC1646 circuit schematics, Zener diodes and snubber
networks have been added to each 3.3V and 5V supply rail
and should be used always. These protection networks
should be mounted very close to the LTC1646’s supply
voltage using short lead lengths to minimize lead induc-
tance. This is shown schematically in Figure 13 and a
recommended layout of the transient protection devices
around the LTC1646 is shown in Figure 14.
LTC1646
18
1646fa
Table 6. N-Channel Power MOSFET Selection Guide
CURRENT LEVEL (A) PART NUMBER DESCRIPTION MANUFACTURER
0 to 2 MMDF3N02HD Dual N-Channel SO-8 ON Semiconductor
R
DS(ON)
= 0.1Ω
2 to 5 MMSF5N02HD Single N-Channel SO-8 ON Semiconductor
R
DS(ON)
= 0.025Ω
5 to 10 MTB50N06V Single N-Channel DD Pak ON Semiconductor
R
DS(ON)
= 0.028Ω
5 to 10 IRF7413 Single N-Channel SO-8 International Rectifier
R
DS(ON)
= 0.01Ω
5 to 10 Si4410DY Single N-Channel SO-8 Vishay-Siliconix
R
DS(ON)
= 0.01Ω
Table 7. Sense Resistor Selection Guide
CURRENT LIMIT VALUE PART NUMBER DESCRIPTION MANUFACTURER
1A LR120601R055F 0.055Ω, 0.5W, 1% Resistor IRC-TT
WSL1206R055 Vishay-Dale
2A LR120601R028F 0.028Ω, 0.5W, 1% Resistor IRC-TT
WSL1206R028 Vishay-Dale
5A LR120601R011F 0.011Ω, 0.5W, 1% Resistor IRC-TT
WSL2010R011 Vishay-Dale
7.6A WSL2512R007 0.007Ω, 1W, 1% Resistor Vishay-Dale
10A WSL2512R005 0.005Ω, 1W, 1% Resistor Vishay-Dale
PCB Layout Considerations
For proper operation of the LTC1646’s circuit breaker
function, a 4-wire Kelvin connection to the sense resistors
is highly recommended. A recommended PCB layout for
the sense resistor, the power MOSFET, and the GATE drive
components around the LTC1646 is illustrated in
Figure 15. In Hot Swap applications where load currents
can reach 10A, narrow PCB tracks exhibit more resistance
than wider tracks and operate at more elevated tempera-
tures. Since the sheet resistance of 1 ounce copper foil is
approximately 0.5mΩ/■■, track resistances add up quickly
in high current applications. Thus, to keep PCB track
resistance and temperature rise to a minimum, the sug-
gested trace width in these applications for 1 ounce
copper foil is 0.03" for each ampere of DC current.
In the majority of applications, it will be necessary to use
plated-through vias to make circuit connections from
component layers to power and ground layers internal to
the PC board. For 1 ounce copper foil plating, a general rule
is 1A of DC current per via, making sure the via is properly
dimensioned so that solder completely fills any void. For
other plating thicknesses, check with your PCB fabrication
facility.
Power MOSFET and Sense Resistor Selection
Table 6 lists some current MOSFET transistors that are
available and Table 7 lists some current sense resistors
that can be used with the LTC1646’s circuit breakers.
Table 8 lists supplier web site addresses for discrete
component mentioned throughout the LTC1646 data sheet.
APPLICATIO S I FOR ATIO
WUUU
LTC1646
19
1646fa
APPLICATIO S I FOR ATIO
WUUU
Table 8. Manufacturers’ Web Site
MANUFACTURER WEB SITE
International Rectifier www.irf.com
ON Semiconductor www.onsemi.com
IRC-TT www.irctt.com
Vishay-Dale www.vishay.com
Vishay-Siliconix www.vishay.com
Diodes, Inc. www.diodes.com
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
PACKAGE DESCRIPTIO
U
GN16 (SSOP) 0204
12
345678
.229 – .244
(5.817 – 6.198)
.150 – .157**
(3.810 – 3.988)
16 15 14 13
.189 – .196*
(4.801 – 4.978)
12 11 10 9
.016 – .050
(0.406 – 1.270)
.015 ± .004
(0.38 ± 0.10) × 45°
0° – 8° TYP
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
.008 – .012
(0.203 – 0.305)
TYP
.004 – .0098
(0.102 – 0.249)
.0250
(0.635)
BSC
.009
(0.229)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 BSC.0165 ±.0015
.045 ±.005
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
INCHES
(MILLIMETERS)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
LTC1646
20
1646fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2000
LT 1205 REV A • PRINTED IN USA
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
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LTC1422 Hot Swap Controller Single Supply Hot Swap in SO-8 from 3V to 12V
LT1640AL/LT1640AH Negative Voltage Hot Swap Controllers in SO-8 Negative High Voltage Supplies from –10V to – 80V
LT1641/LT1641-1 Positive Voltage Hot Swap Controller in SO-8 Supplies from 9V to 80V, Autoretry/Latches Off
LTC1642 Fault Protected Hot Swap Controller 3V to 15V, Overvoltage Protection Up to 33V
LTC1643L/LTC1643L-1/LTC1643H PCI Bus Hot Swap Controllers 3.3V, 5V, 12V, –12V Supplies for PCI Bus
LTC1644 CompactPCI Hot Swap Controller 3.3V, 5V, ±12V Local Reset Logic and Precharge
LTC1645 2-Channel Hot Swap Controller Operates from 1.2V to 12V, Power Sequencing
LTC1647 Dual Hot Swap Controller Dual ON Pins for Supplies from 3V to 15V
LTC4211 Hot Swap Controller with Multifunction Current Control Single Supply, 2.5V to 16.5V, MSOP
Figure 15. Recommended Layout for Power MOSFET, Sense Resistor, and Gate Components
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1646*
CURRENT FLOW
TO SOURCE
*ADDITIONAL DETAILS OMITTED FOR CLARITY
DRAWING IS NOT TO SCALE!
1646 F15
TRACK WIDTH W:
0.03" PER AMPERE
ON 1 OZ Cu FOIL
D
D
D
D
G
S
S
S
CURRENT FLOW
TO LOAD
CURRENT FLOW
TO LOAD
SENSE
RESISTOR SO-8
VIA TO GND
GNDGND
VOUT
5V
VIN
5V
VIA
R3
R5
C1
CTIMER
WW
W
TYPICAL APPLICATIO
U
