DATASHEET ISL84514, ISL84515 FN6025 Rev 5.00 June 9, 2014 Low-Voltage, Single Supply, SPST, Analog Switches The Intersil ISL84514 and ISL84515 devices are precision, analog switches designed to operate from a single +2.4V to +12V supply. Targeted applications include battery powered equipment that benefit from the devices' low power consumption (5W), and low leakage currents (1nA). Low rON and fast switching speeds over a wide operating supply range make these switches ideal for use in industrial equipment, portable instruments, and as input signal multiplexers for new generation, low supply voltage data converters. Some of the smallest packages available alleviate board space limitations, and make Intersil's newest line of low-voltage switches an ideal solution for space constrained products. The ISL8451x are single-pole/single-throw (SPST) switches, with the ISL84514 being normally open (NO), and the ISL84515 being normally closed (NC). Table 1 summarizes the performance of this family. For higher performance, pin compatible versions, see the ISL43110, ISL43111 data sheet. For 5V supply versions, see the ISL84516, ISL84517 data sheet. TABLE 1. FEATURES AT A GLANCE DESCRIPTION ISL84514 ISL84515 1 1 Configuration NO NC 3.3V rON 20 20 60ns/30ns 60ns/30ns 12 12 45ns/25ns 45ns/25ns 8 8 40ns/25ns 40ns/25ns Number of Switches 3.3V tON/tOFF 5V rON 5V tON/tOFF 12V rON 12V tON/tOFF Packages 8 Ld SOIC, 5 Ld SOT-23 Related Literature * Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" 10 (V+ = 12V) * rON flatness (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 * Charge injection (max) . . . . . . . . . . . . . . . . . . . . . . . . . . 10pC * Low power consumption (PD) . . . . . . . . . . . . . . . . . . . .<5W * Low leakage current (max at +85C) . . 20nA (off leakage) 40nA (on leakage) * Fast switching action - tON (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns - tOFF (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns * Minimum 2000V ESD protection per method 3015.7 * TTL, CMOS compatible * Pb-free (RoHS compliant) Applications * Battery powered, handheld, and portable equipment * Communications systems - Radios - Telecom infrustructure * Test equipment - Logic and spectrum analyzers - Portable meters * Medical equipment - Ultrasound and MRI - Electrocardiograph * Audio and video switching * General purpose circuits - +3V/+5V DACs and ADCs - Sample and hold circuits - Digital filters - Operational amplifier gain switching networks - High frequency analog switching - High-speed multiplexing - Integrator reset circuits * Application Note AN557 "Recommended Test Procedures for Analog Switches" Features * Drop-in replacements for MAX4514 and MAX4515 * Available in SOT-23 and SOIC packaging * Fully specified for 5V and 12V supplies * Single supply operation . . . . . . . . . . . . . . . . . . +2.4V to +12V * ON-resistance (rON max) . . . . . . . . . . . . . . 20 (V+ = 5V) FN6025 Rev 5.00 June 9, 2014 Page 1 of 12 ISL84514, ISL84515 Pinouts (Note 1)) ISL84514 (5 LD SOT-23) TOP VIEW ISL84514 (8 LD SOIC) TOP VIEW COM 1 2 7 GND N.C. 3 6 IN V+ 4 5 N.C. N.C. NO 2 4 IN GND 3 ISL84515 (5 LD SOT-23) TOP VIEW ISL84515 (8 LD SOIC) TOP VIEW COM 1 5 V+ COM 1 8 NO N.C. 2 7 GND N.C. 3 6 IN V+ 4 5 N.C. 5 V+ COM 1 8 NC NC 2 4 IN GND 3 NOTE: 1. Switches Shown for Logic "0" Input. Truth Table Ordering Information LOGIC NOTE: ISL84514 ISL84515 0 OFF ON 1 ON OFF Logic "0" 0.8V. Logic "1" 2.4V. Pin Description PIN FUNCTION V+ System Power Supply Input (+2.4V to +12V) GND Ground Connection IN Digital Control Input COM PART NUMBER (Notes 3, 4) ISL84514IBZ PART MARKING 84514 IBZ TEMP RANGE (C) PACKAGE (Pb-free) PKG. DWG. # -40 to +85 8 Ld SOIC M8.15 ISL84514IBZ-T 84514 IBZ (Note 2) -40 to +85 8 Ld SOIC Tape and Reel M8.15 ISL84514IHZ-T 514Z (Note 5) (Note 2) -40 to +85 5 Ld SOT-23, Tape and Reel P5.064 ISL84515IBZ -40 to +85 8 Ld SOIC M8.15 84515 IBZ ISL84515IBZ-T 84515 IBZ (Note 2) -40 to +85 8 Ld SOIC Tape M8.15 and Reel Analog Switch Common Pin ISL84515IHZ-T 515Z (Note 2) (Note 5) -40 to +85 5 Ld SOT-23, Tape and Reel NO Analog Switch Normally Open Pin NOTES: NC Analog Switch Normally Closed Pin N.C. No Internal Connection P5.064 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. For Moisture Sensitivity Level (MSL), please see product information page for ISL84514, ISL85415. For more information on MSL, please see tech brief TB363. 5. The part marking is located on the bottom of the part. FN6025 Rev 5.00 June 9, 2014 Page 2 of 12 ISL84514, ISL84515 Absolute Maximum Ratings Thermal Information V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V Input Voltages IN (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) NO, NC (Note 6). . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 30mA ESD Rating Human Body Model (Per MIL-STD-883 Method 3015) . . . . 2.5kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100V Thermal Resistance (Typical, Note 7) JA (C/W) 5 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 225 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170 Maximum Junction Temperature (Plastic Package). . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . . . -65C to 150C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 6. Signals on NO, NC, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings. 7. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply across the operating temperature range, -40C to +85C. MAX (Notes 9, 11) UNITS TEMP (C) MIN (Notes 9, 11) TYP Full 0 - V+ V V+ = 4.5V, ICOM = 1.0mA, VCOM = 3.5V, (see Figure 4) +25 - - 20 Full - - 25 V+ = 4.5V, ICOM = 1.0mA, VCOM = 1V, 2V, 3V +25 - - 3 Full - - 5 PARAMETER TEST CONDITIONS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON-resistance, rON rON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V, (Note 10) +25 -1 0.01 1 nA Full -20 - 20 nA COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V, (Note 10) +25 -1 0.01 1 nA Full -20 - 20 nA COM ON Leakage Current, ICOM(ON) V = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V, 4.5V, (Note 10) +25 -2 0.01 2 nA Full -40 - 40 nA Input Voltage High, VINH Full 2.4 - V+ V Input Voltage Low, VINL Full 0 - 0.8 V V+ = 5.5V, VIN = 0V or V+ Full -1 - 1 A VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (see Figure 1) +25 - - 150 ns Full - - 240 ns VNO or VNC = 3V, RL = 300, CL = 35pF, VIN = 0 to 3V, (see Figure 1) +25 - - 100 ns Full - - 150 ns Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0, (see Figure 2) +25 - 2 10 pC OFF-isolation RL = 50, CL = 15pF, f = 100kHz, (see Figure 3) +25 - >90 - dB +25 - 14 - pF DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 5) FN6025 Rev 5.00 June 9, 2014 Page 3 of 12 ISL84514, ISL84515 Electrical Specifications Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply across the operating temperature range, -40C to +85C. (Continued) MAX (Notes 9, 11) UNITS TEMP (C) MIN (Notes 9, 11) TYP f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 5) +25 - 14 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 5) +25 - 30 - pF +25 -1 0.0001 1 A Full -10 - 10 A PARAMETER COM OFF Capacitance, CCOM(OFF) TEST CONDITIONS POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 5.5V, VIN = 0V or V+, Switch On or Off Electrical Specifications - 12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 5V, VINL = 0.8V (Note 8), unless otherwise specified. Boldface limits apply across the operating temperature range, -40C to +85C. PARAMETER TEST CONDITIONS TEMP (C) MIN (Notes 9, 11) TYP Full 0 - V+ V +25 - - 10 Full - - 15 MAX (Notes 9, 11) UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON-resistance, rON rON Flatness, RFLAT(ON) V+ = 10.8V, ICOM = 1.0mA, VCOM = 10V V+ = 12V, ICOM = 1.0mA, VCOM = 3V, 6V, 9V +25 - - 3 Full - - 5 NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 13.2V, VCOM = 1V, 10V, VNO or VNC = 10V, 1V, (Note 10) +25 -2 - 2 nA Full -50 - 50 nA COM OFF Leakage Current, ICOM(OFF) V+ = 13.2V, VCOM = 10V, 1V, VNO or VNC = 1V, 10V, (Note 10) +25 -2 - 2 nA Full -50 - 50 nA COM ON Leakage Current, ICOM(ON) V+ = 13.2V, VCOM = 1V, 10V, or VNO or VNC = 1V, 10V, (Note 10) +25 -4 - 4 nA Full -100 - 100 nA Full 5 3 V+ V DIGITAL INPUT CHARACTERISTICS Input Voltage High, VINH Full 0 - 0.8 V V+ = 13.2V, VIN = 0V or V+ Full -1 - 1 A Turn-ON Time, tON VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 5V, (see Figure 1) +25 - - 150 ns Full - - 240 ns Turn-OFF Time, tOFF VNO or VNC = 10V, RL = 300, CL = 35pF, VIN = 0 to 5V, (see Figure 1) +25 - - 100 ns Full - - 150 ns Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0, (see Figure 2) +25 - 8 20 pC OFF-isolation RL = 50, CL = 15pF, f = 100kHz, (see Figure 3) +25 - >90 - dB NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 5) +25 - 14 - pF COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 5) +25 - 14 - pF COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V, (see Figure 5) +25 - 30 - pF Input Voltage Low, VINL Input Current, IINH, IINL DYNAMIC CHARACTERISTICS POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ FN6025 Rev 5.00 June 9, 2014 V+ = 13.2V, VIN = 0V or V+, Switch On or Off +25 -2 - 2 A Full -20 - 20 A Page 4 of 12 ISL84514, ISL84515 Electrical Specifications - 3.3V Supply Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 8), Unless Otherwise Specified. Boldface limits apply across the operating temperature range, -40C to +85C. PARAMETER TEST CONDITIONS TEMP (C) MIN (Notes 9, 11) TYP Full 0 - V+ V +25 - - 50 Full - - 75 +25 - - 5.5 Full - - 7.0 MAX (Notes 9, 11) UNITS ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON-resistance, rON rON Flatness, RFLAT(ON) V+ = 3V, ICOM = 1.0mA, VCOM = 1.5V ICOM = 1.0mA, VCOM = 0.5V, 1V, 1.5V NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V, (Note 10) +25 -1 0.01 1 nA Full -20 - 20 nA COM OFF Leakage Current, ICOM(OFF) V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V, (Note 10) +25 -1 0.01 1 nA Full -20 - 20 nA COM ON Leakage Current, ICOM(ON) V+ = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V, (Note 10) +25 -2 0.01 2 nA Full -40 - 40 nA Input Voltage High, VINH Full 2.4 - V+ V Input Voltage Low, VINL Full 0 - 0.8 V V+ = 3.6V, VIN = 0V or V+ Full -1 - 1 A VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V +25 - - 150 ns Full - - 240 ns VNO or VNC = 1.5V, RL = 300, CL = 35pF, VIN = 0 to 3V +25 - - 100 ns Full - - 150 ns CL = 1.0nF, VG = 0V, RG = 0 +25 - 4 10 pC +25 -1 - 1 A Full -10 - 10 A DIGITAL INPUT CHARACTERISTICS Input Current, IINH, IINL DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Charge Injection, Q POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 3.6V, VIN = 0V or V+, Switch On or Off NOTES: 8. VIN = input voltage to perform proper function. 9. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 10. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at +25C. 11. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. FN6025 Rev 5.00 June 9, 2014 Page 5 of 12 ISL84514, ISL84515 Test Circuits and Waveforms 3V or 5V LOGIC INPUT V+ tr < 20ns tf < 20ns 50% C 0V tOFF SWITCH INPUT SWITCH INPUT VOUT COM IN 90% SWITCH OUTPUT VOUT NO or NC 90% 0V LOGIC INPUT CL 35pF RL 300 GND tON Logic input waveform is inverted for switches that have the opposite logic sense. CL includes fixture and stray capacitance. V OUT = V FIGURE 1A. MEASUREMENT POINTS RL ----------------------(NO or NC) R + r L ON FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES V+ SWITCH OUTPUT VOUT VOUT RG ON ON LOGIC INPUT NO OR NC VG OFF C GND VOUT COM IN CL LOGIC INPUT Q = VOUT x CL FIGURE 2A. MEASUREMENT POINTS FIGURE 2B. TEST CIRCUIT FIGURE 2. CHARGE INJECTION V+ V+ C C rON = V1/1mA SIGNAL GENERATOR COM NO OR NC VCOM IN 0V OR V+ 1mA IN V1 0.8V OR VINH COM ANALYZER GND NO OR NC GND RL FIGURE 3. OFF-ISOLATION TEST CIRCUIT FN6025 Rev 5.00 June 9, 2014 FIGURE 4. rON TEST CIRCUIT Page 6 of 12 ISL84514, ISL84515 Test Circuits and Waveforms (Continued) V+ C NO OR NC IN IMPEDANCE ANALYZER 0V OR V+ COM GND FIGURE 5. CAPACITANCE TEST CIRCUIT Detailed Description The ISL84514 and ISL84515 analog switches offer precise switching capability from a single 2.4V to 12V supply with low ON-resistance, and high-speed operation. The devices are especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2.4V), low power consumption (5W), low leakage currents (2nA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high off-isolation. OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR IN VNO OR NC VCOM GND Supply Sequencing and Overvoltage Protection With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents, which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to GND (see Figure 6). To prevent forward biasing these diodes, V+ must be applied before any input signals, and input signal voltages must remain between V+ and GND. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 6). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low rON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 6). These additional diodes limit the analog signal from 1V below V+ to 1V above GND. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages FN6025 Rev 5.00 June 9, 2014 OPTIONAL PROTECTION DIODE FIGURE 6. OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL8451x construction is typical of most CMOS analog switches, except that there are only two supply pins: V+ and GND. Unlike switches with a 13V maximum supply voltage, the ISL8451x 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies, as well as margin for overshoot and noise spikes. The minimum recommended supply voltage is 2.4V. It is important to note that the input signal range, switching times, and ON-resistance degrade at lower supply voltages. Refer to the "Electrical Specifications" tables beginning on page 3 and "Typical Performance Curves" beginning on page 9 for details. V+ and GND power the internal CMOS switches and set their analog voltage limits. These supplies also power the internal logic and level shifters. The level shifters convert the input logic levels to switched V+ and GND signals to drive the analog switch gate terminals. Page 7 of 12 ISL84514, ISL84515 This family of switches cannot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. For a 5V single SPST switch, see the ISL84516, ISL84517 data sheet. Logic-Level Thresholds This switch family is TTL compatible (0.8V and 2.4V) over a supply range of 3V to 11V, and the full temperature range (see Figure 10). At 12V the low temperature VIH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family that provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation. High-Frequency Performance In 50systems, signal response is reasonably flat to 20MHz, with a -3dB bandwidth exceeding 200MHz (see Figure 13). Figure 13 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feed-through from a switch's input to its output. Off-isolation FN6025 Rev 5.00 June 9, 2014 is the resistance to this feed-through. Figure 14 details the high off-isolation provided by this family. At 10MHz, offisolation is about 50dB in 50systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease off-isolation due to the voltage divider action of the switch OFF impedance and the load impedance. Leakage Considerations Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and GND. One of these diodes conducts if any analog signal exceeds V+ or GND. Virtually, all the analog leakage current comes from the ESD diodes to V+ or GND. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and GND pins constitutes the analog-signal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog-signal paths and V+ or GND. Page 8 of 12 ISL84514, ISL84515 Typical Performance Curves TA = +25C, Unless Otherwise Specified 25 25 VCOM = (V+) - 1V rON () 15 +85C -40C 10 5 3 +25C 4 5 6 7 8 9 10 11 12 13 +25C 10 19 17 15 13 11 9 7 14 +85C 12 10 8 -40C 6 4 0 2 -40C V+ = 5V +85C +25C -40C V+ = 12V +25C 4 6 8 10 12 VCOM (V) V+ (V) FIGURE 7. ON-RESISTANCE vs SUPPLY VOLTAGE FIGURE 8. ON-RESISTANCE vs SWITCH VOLTAGE 50 3.0 40 2.5 -40C VINH VINH AND VINL (V) V+ = 5V 30 Q (pC) V+ = 3.3V +85C 15 20 rON () ICOM = 1mA 20 ICOM = 1mA 20 2.0 +25C -40C VINL 1.5 +25C +85C 1.0 10 +85C V+ = 3.3V 0 0 1 2 3 4 0.5 5 2 3 4 5 6 7 VCOM (V) 8 9 10 11 12 13 V+ (V) FIGURE 10. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE FIGURE 9. CHARGE INJECTION vs SWITCH VOLTAGE 60 140 VCOM = (V+) - 1V VCOM = (V+) - 1V 130 RL = 300 120 RL = 300 50 110 tOFF (ns) tON (ns) 100 90 +85C 80 70 40 +85C 30 +25C +25C 60 20 50 30 -40C -40C 40 10 2 3 4 5 6 7 V+ (V) 8 9 10 11 FIGURE 11. TURN-ON TIME vs SUPPLY VOLTAGE FN6025 Rev 5.00 June 9, 2014 12 2 3 4 5 6 7 V+ (V) 8 9 10 11 FIGURE 12. TURN-OFF TIME vs SUPPLY VOLTAGE Page 9 of 12 12 ISL84514, ISL84515 Typical Performance Curves TA = +25C, Unless Otherwise Specified (Continued) 10 0 V+ = 3V to 13V 20 RL = 50 GAIN V+ = 3.3V 30 -6 0 PHASE V+ = 12V 20 40 V+ = 3.3V RL = 50 VIN = 0.2VP-P to 2.5VP-P (V+ = 3.3V) VIN = 0.2VP-P to 5VP-P (V+ = 12V) 1 10 100 60 OFF-ISOLATION (dB) V+ = 12V PHASE () NORMALIZED GAIN (dB) -3 40 50 60 70 80 80 90 100 100 600 110 1k 10k 100k FREQUENCY (MHz) FIGURE 13. FREQUENCY RESPONSE 10M 100M 500M FIGURE 14. OFF-ISOLATION TRANSISTOR COUNT: Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND 1M FREQUENCY (Hz) ISL84514: 40 ISL84515: 40 PROCESS: Si Gate CMOS (c) Copyright Intersil Americas LLC 2003-2014. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6025 Rev 5.00 June 9, 2014 Page 10 of 12 ISL84514, ISL84515 Package Outline Drawing M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) 5.80 (0.228) AREA 0.50 (0.20) x 45 0.25 (0.01) 4.00 (0.157) 3.80 (0.150) 1 2 8 0 3 0.25 (0.010) 0.19 (0.008) SIDE VIEW "B" TOP VIEW 2.20 (0.087) SEATING PLANE 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 1 8 2 7 0.60 (0.023) 1.27 (0.050) 3 6 4 5 -C- 1.27 (0.050) 0.51(0.020) 0.33(0.013) SIDE VIEW "A 0.25(0.010) 0.10(0.004) 5.20(0.205) TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1994. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEDEC publication MS-012-AA ISSUE C. FN6025 Rev 5.00 June 9, 2014 Page 11 of 12 ISL84514, ISL84515 Package Outline Drawing P5.064 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 3, 4/11 8 0 3.00 3 2.80 (1.90) 5 0.22 0.08 5 4 3.00 2.60 1.70 1.50 3 2 (0.95) SEE DETAIL X 0.50 0.30 0.20 (0.008) M C TOP VIEW END VIEW 0.25 0.10 0.10 MIN 1.30 0.90 1.45 SEATING 0.90 PLANE C GAUGE PLANE SEATING PLANE 4 0.55 0.35 C 0.15 0.00 0.10 (0.004) C (0.60) SIDE VIEW 8 0 (0.25) DETAIL "X" 5x (0.60) 5x (1.2) 5 4 (2.4) NOTES: 1. Dimensioning and tolerance per ASME Y14.5M-1994. 3 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 3. Package length and width are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength measured at reference to gauge plane. 5. Lead thickness applies to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. (2x 0.95) 6. Controlling dimension: MILLIMETER. Dimensions in ( ) for reference only. (1.90) TYPICAL RECOMMENDED LAND PATTERN FN6025 Rev 5.00 June 9, 2014 Page 12 of 12