Supervisory Circuits with Watchdog
and Manual Reset in 5-Lead SOT-23
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A Document Feedback
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FEATURES
26 reset threshold options
2.5 V to 5 V in 100 mV increments
4 reset timeout options
1 ms, 20 ms, 140 ms, and 1120 ms (minimum)
4 watchdog timeout options
6.3 ms, 102 ms, 1.6 sec, and 25.6 sec (typical)
Manual reset input
Multiple reset output options
Low power consumption
Specified over wide temperature range (−40°C to +125°C)
Qualified for automotive applications
5-lead SOT-23 package
APPLICATIONS
Automotive infotainment
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. ADM8316
Figure 2. ADM8320
GENERAL DESCRIPTION
The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/
ADM8322 are supervisory circuits that monitor power supply
voltage levels and code execution integrity in microprocessor-based
systems. As well as providing power-on reset signals, an on-chip
watchdog timer can reset the microprocessor if it fails to strobe
within a preset timeout period. A reset signal can also be asserted
by an external push-button switch through a manual reset input.
The six devices feature different combinations of watchdog
input, manual reset input, and output stage configuration,
as shown in Table 6.
Each device is available in a choice of 26 reset threshold options
ranging from 2.5 V to 5 V in 100 mV increments. There are also
four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms
(minimum) and four watchdog timeout options of 6.3 ms, 102 ms,
1.6 sec, and 25.6 sec (typical).
The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/
ADM8322 are available in 5-lead SOT-23 packages and typically
consume only 10 µA, making them suitable for use in low
power, portable applications.
ADM8316
V
CC
V
CC
MR
GND WDI
RESET
RESET
GENERATOR
WATCHDOG
DETECTOR
DEBOUNCE
V
REF
11779-001
ADM8320
VCC
MR
GND WDI
RESET
RESET
GENERATOR
WATCHDOG
DETECTOR
VREF
11779-002
DEBOUNCE
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet
Rev. A | Page 2 of 15
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 10
Circuit Description..................................................................... 10
Push-Pull Reset Output ............................................................. 10
Open-Drain RESET Output ..................................................... 10
Manual Reset Input .................................................................... 10
Watchdog Input .......................................................................... 10
Applications Information .............................................................. 11
Watchdog Input Current ........................................................... 11
Negative Going VCC Transie nts ................................................. 11
Ensuring Reset Valid to VCC = 0 V ........................................... 11
Watchdog Software Considerations ......................................... 11
Options ............................................................................................ 12
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
Automotive Products ................................................................. 15
REVISION HISTORY
9/15—Rev. 0 to Rev. A
Changes to Table 10 ........................................................................ 13
10/13—Revision 0: Initial Version
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A | Page 3 of 15
SPECIFICATIONS
VCC = (VTH + 1.5%) to 5.5 V, TA = −40°C to +125°C, unless otherwise noted. Typical values are at TA = 25°C.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range1 0.9 5.5 V
VCC that Guarantees Valid Output 0.9 V
Supply Current (WDI Floating) 10 20 µA VCC = 5.5 V
10 18 µA VCC = 3.6 V
RESET THRESHOLD VOLTAGE2 VTH − 1% VTH VTH + 1% V TA = 25°C
VTH − 1.5% VTH VTH + 1.5% V TA = −40°C to +125°C
RESET THRESHOLD TEMPERATURE COEFFICIENT 20 ppm/°C
RESET THRESHOLD HYSTERESIS 2.5 × VTH mV
RESET TIMEOUT PERIOD See Table 7
Reset Timeout Option A 1 1.4 1.8 ms
Reset Timeout Option B 20 28 36 ms
Reset Timeout Option C 140 200 260 ms
Reset Timeout Option D 1120 1600 2080 ms
VCC TO RESET DELAY, tRD 90 µs VCC falling at 1 mV/µs
PUSH-PULL OUTPUT (ADM8316, ADM8318, ADM8319,
ADM8321, ADM8322)
RESET
Output Voltage
0.2
V
CC
≥ 0.9 V, I
SINK
= 25 µA
0.2 V VCC ≥ 1.2 V, ISINK = 100 µA
0.2 V VCC ≥ 2.7 V, ISINK = 1.2 mA
0.3 V VCC ≥ 4.5 V, ISINK = 3.2 mA
0.9 × VCC V VCC ≥ 2.7 V, ISOURCE = 500 µA
0.9 × VCC V VCC ≥ 4.5 V, ISOURCE = 800 µA
RESET
Rise Time
50
100
From 10% to 90% V
CC
, C
L
= 5 pF,
VCC = 3.3 V
RESET Output Voltage 0.2 V VCC ≥ 2.7 V, ISINK = 1.2 mA
0.3 V VCC ≥ 4.5 V, ISINK = 3.2 mA
0.9 × VCC V VCC ≥ 2.7 V, ISOURCE = 500 µA
0.9 × VCC V VCC ≥ 4.5 V, ISOURCE = 800 µA
OPEN-DRAIN OUTPUT (ADM8320, ADM8321, ADM8322)
RESET Output Voltage 0.2 V VCC ≥ 0.9 V, ISINK = 25 µA
0.2
V
CC
≥ 1.2 V, I
SINK
= 100 µA
0.2 V VCC ≥ 2.7 V, ISINK = 1.2 mA
0.3 V VCC ≥ 4.5 V, ISINK = 3.2 mA
Open-Drain Reset Output Leakage Current 1 µA
WATCHDOG INPUT (ADM8316, ADM8318, ADM8320,
ADM8321)
Watchdog Timeout Period, tWD See Table 8
Watchdog Timeout Option W 4.5 6.3 8.1 ms
Watchdog Timeout Option X 72 102 132 ms
Watchdog Timeout Option Y 1.12 1.6 2.24 sec
Watchdog Timeout Option Z 18.0 25.6 33.2 sec
WDI Pulse Width 50 ns VIL = 0.3 × VCC, VIH = 0.7 × VCC
WDI Input Threshold 0.3 × VCC 0.7 × VCC V
WDI Input Current 35 100 µA
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet
Rev. A | Page 4 of 15
Parameter Min Typ Max Unit Test Conditions/Comments
MANUAL RESET INPUT (ADM8316, ADM8319, ADM8320,
ADM8322)
VIL 0.8 V
VIH 2.0 V
MR Input Pulse Width 1 µs
MR Glitch Rejection 100 ns
MR Pull-Up Resistance 35 75 125 kΩ
MR to Reset Delay 350 ns VCC = 5 V
1 The device switches from undervoltage reset to normal operation when 1.5 V < VCC < 2.5 V.
2 The device monitors VCC through an internal factory trimmed voltage divider that programs the nominal reset threshold. Factory-trimmed reset thresholds are
available in approximately 100 mV increments from 2.5 V to 5 V.
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A | Page 5 of 15
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
Parameter Rating
VCC −0.3 V to +6 V
All Other Pins −0.3 V to (VCC + 0.3 V)
Output Current (RESET, RESET) 20 mA
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θJA Thermal Impedance, SOT-23 270°C/W
Lead Temperature
Soldering (10 sec)
300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet
Rev. A | Page 6 of 15
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. ADM8316/ADM8320 Pin Configuration
Table 3. ADM8316/ADM8320 Pin Function Descriptions
Pin No. Mnemonic Description
1 RESET Active Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. This pin is a push-pull
output stage for the ADM8316 and an open-drain output stage for the ADM8320.
2 GND Ground.
3 MR Manual Reset Input. This is an active low input that, when forced low for greater than the glitch filter time,
generates a reset. It features a 75 kΩ internal pull-up resistor.
4 WDI Watchdog Input. Generates a reset if the logic level on the pin remains low or high for the duration of the
watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is generated. Leave
this pin floating to disable the watchdog timer.
5 VCC Power Supply Voltage Being Monitored.
Figure 4. ADM8318/ADM8321 Pin Configuration
Table 4. ADM8318/ADM8321 Pin Function Descriptions
Pin No. Mnemonic Description
1 RESET Active Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. This pin is a push-pull
output stage for the ADM8318 and an open-drain output stage for the ADM8321.
2 GND Ground.
3 RESET Active High Push-Pull Reset Output.
4 WDI Watchdog Input. Generates a reset if the logic level on the pin remains low or high for the duration of the
watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is generated. Leave
this pin floating to disable the watchdog timer.
5 VCC Power Supply Voltage Being Monitored.
Figure 5. ADM8319/ADM8322 Pin Configuration
Table 5. ADM8319/ADM8322 Pin Function Descriptions
Pin No. Mnemonic Description
1 RESET Active low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. This pin is a push-pull
output stage for the ADM8319 and an open-drain output stage for the ADM8322.
2 GND Ground.
3 RESET Active High Push-Pull Reset Output.
4 MR Manual Reset Input. This is an active low input that, when forced low for greater than the glitch filter time,
generates a reset. It features a 75 kΩ internal pull-up resistor.
5 VCC Power Supply Voltage Being Monitored.
RESET
GND
MR
1
3
2
V
CC
5
WDI
4
ADM8316/
ADM8320
TOP VIEW
(Not to Scale)
11779-003
RESET
GND
RESET
1
3
2
V
CC
5
WDI
4
ADM8318/
ADM8321
TOP VIEW
(Not to Scale)
11779-004
MR
RESET
GND
RESET
1
3
2
V
CC
5
4
ADM8319/
ADM8322
TOP VIEW
(Not to Scale)
11779-005
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A | Page 7 of 15
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 6. Supply Current (ICC) vs. Temperature
Figure 7. Supply Current (ICC) vs. Supply Voltage (VCC)
Figure 8. Normalized Reset Threshold vs. Temperature
Figure 9. VCC to Reset Delay vs. Temperature
Figure 10. Manual Reset to Reset Propagation Delay vs. Temperature
Figure 11. Normalized Reset Timeout vs. Temperature
0
1
2
3
4
5
6
7
8
9
11
10
12
13
14
–40
ICC ( µA)
–20 020 40 60 80 100 120
TEMPERATURE (°C)
VCC = 5.0V
VCC = 3.0V
VCC = 1.5V
11779-006
0
2
4
6
8
10
12
I
CC
(µA)
V
CC
(V)
00.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6
11779-007
0.95
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
1.04
1.05
–40 –20 020 40 60 80 100 120
NORM ALIZED RE S E T T HRE S HOL D
TEMPERATURE (°C)
11779-008
0
10
20
30
40
50
60
70
80
90
100
V
CC
TO RESET DELAY (µ s)
TEMPERATURE (°C)
V
TH
= 2.93V
V
TH
= 2.5V
V
TH
= 5V
11779-009
–40 –20 020 40 60 80 100 120
0
50
100
150
200
250
300
350
400
450
500
PROPAGATION DELAY (n s)
TEMPERATURE (°C)
V
TH
= 2.93V
V
TH
= 2.5V
V
TH
= 5V
11779-010
–40 –20 020 40 60 80 100 120
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
NORMALIZED RESET TIMEOUT
TEMPERATURE (°C)
11779-011
–40 –20 020 40 60 80 100 120
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet
Rev. A | Page 8 of 15
Figure 12. Normalized Watchdog Timeout vs. Temperature
Figure 13. Maximum VCC Transient Duration vs. RESET Threshold Overdrive
Figure 14. Manual Reset (MR) Minimum Pulse Width vs. Temperature
Figure 15. Watchdog Input Minimum Pulse Width vs. Temperature
Figure 16. RESET Open-Drain VOL Voltage vs. VCC Voltage (VTH = 3 V)
Figure 17. RESET Push-Pull VOL Voltage vs. VCC Voltage (VTH = 4 V)
0.90
0.95
1.00
1.05
1.10
1.15
1.20
NORMALIZED WATCHDOG TIMEOUT
TEMPERATURE (°C)
11779-012
–40 –20 020 40 60 80 100 120
0
20
40
60
80
100
120
140
160
10 100 1000
MAXIMUM TRANSIENT DURAT IO N (µ s)
OVERDRIVE VOLTAGE (mV)
V
TH
= 2.93V
RESET ASSERTED ABOVE CURVE
V
TH
= 4.63V
V
TH
= 5V
11779-013
–40 –20 020 40 60 80 100 120
650
660
670
680
690
700
710
720
730
740
750
760
770
780
790
800
810
820
830
840
850
MR MINIMUM PULSE WIDTH (n s)
TEMPERATURE (°C)
11779-014
V
TH
= 2.5V
V
TH
= 2.93V
V
TH
= 5V
0
1
2
3
4
5
6
7
8
9
MINIMUM PULSE WIDTH (ns)
TEMPERATURE (°C)
–40 –20 020 40 60 80 100 120
NEGATIVE PULSE
POSITI VE PULSE
11779-015
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
RESET VOLTAGE (V)
VCC VO L T AGE (V)
0.008
0.058
0.108
0.158
0.208
0.258
0.308
11779-016
ISINK = 3.2mA
ISINK = 800 µA
0
0.05
0.10
0.15
0.20
0.25
0.30
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
RESET VOLTAGE (V)
V
CC
VOLTAGE (V)
11779-017
I
SINK
= 3.2mA
I
SINK
= 800µA
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A | Page 9 of 15
Figure 18. RESET Push-Pull VOH Voltage vs. VCC Voltage (VTH = 3 V)
Figure 19. RESET Push-Pull Rise Time vs. VCC Voltage
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
RESET VOLTAGE (V)
V
CC
VOLTAGE (V)
I
SOURCE
= 3.2mA
I
SOURCE
= 800µA
11779-018
16
17
18
19
20
21
22
23
24
25
2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4
RISE TIME (ns)
V
CC
VOLTAGE (V)
11779-019
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet
Rev. A | Page 10 of 15
THEORY OF OPERATION
CIRCUIT DESCRIPTION
The ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/
ADM8322 provide microprocessor supply voltage supervision
by controlling the microprocessor reset input. Code execution
errors are avoided during power-up, power-down, and brownout
conditions by asserting a reset signal when the supply voltage
is below a preset threshold and by allowing supply voltage
stabilization with a fixed timeout reset delay after the supply
voltage rises above the threshold. In addition, problems with
microprocessor code execution can be monitored and corrected
with a watchdog timer (ADM8316/ADM8318/ADM8320/
ADM8321). If the user detects a problem with system operation, a
manual reset input is available (ADM8316/ADM8319/ADM8320/
ADM8322) to reset the microprocessor, for example, by means
of an external push-button switch.
PUSH-PULL RESET OUTPUT
The ADM8316 features an active low push-pull reset output,
whereas the ADM8321/ADM8322 have active high push-pull
reset outputs. The ADM8318/ADM8319 feature dual active low
and active high push-pull reset outputs. For active low and active
high outputs, the reset signal is guaranteed to be valid for VCC
down to 0.9 V.
The reset output is asserted when VCC is below the reset threshold
(VTH), when MR is driven low, or when WDI is not serviced
within the watchdog timeout period (tWD). The reset output
remains asserted for the duration of the reset active timeout
period (tRP) after VCC rises above the reset threshold, after MR
transitions from low to high, or after the watchdog timer times
out. Figure 20 illustrates the behavior of the reset outputs.
Figure 20. Reset Timing Diagram
OPEN-DRAIN RESET OUTPUT
The ADM8320/ADM8321/ADM8322 have an active low, open-
drain reset output. This output structure requires an external
pull-up resistor to connect the reset output to a voltage rail no
higher than VCC. A resistor that complies with the logic low and
logic high voltage level requirements of the microprocessor
while supplying input current and leakage paths on the RESET
line is recommended. A 10 kΩ resistor is adequate in most
situations.
MANUAL RESET INPUT
The ADM8316/ADM8319/ADM8320/ADM8322 feature a manual
reset input (MR), which when driven low, asserts the reset output.
When MR transitions from low to high, the reset remains asserted
for the duration of the reset active timeout period before
deasserting. The MR input has a 75 kΩ, internal pull-up resistor
so that the input is always high when unconnected. An external
push-button switch can be connected between MR and ground
so that the user can generate a reset. Debounce circuitry for this
purpose is integrated on chip. Noise immunity is provided on the
MR input, and fast, negative going transients of up to 100 ns
(typical) are ignored. A 0.1 μF capacitor between MR and ground
provides additional noise immunity.
WATCHDOG INPUT
The ADM8316/ADM8318/ADM8320/ADM8321 feature a
watchdog timer that monitors microprocessor activity. A timer
circuit is cleared with every low-to-high or high-to-low logic
transition on the watchdog input pin (WDI), which detects pulses
as short as 50 ns. If the timer counts through the preset watchdog
timeout period (tWD), a reset is asserted. The microprocessor is
required to toggle the WDI pin to avoid asserting the reset pin.
Failure of the microprocessor to toggle WDI within the timeout
period, therefore, indicates a code execution error, and the reset
pulse generated restarts the microprocessor in a known state.
As well as logic transitions on WDI, the watchdog timer is also
cleared by a reset assertion due to an undervoltage condition on
VCC or due to MR being pulled low. When a reset asserts, the
watchdog timer clears and does not begin counting again until
the reset deassserts. The watchdog timer can be disabled by
leaving WDI floating or by tristating the WDI driver.
Figure 21. Watchdog Timing Diagram
V
CC
1V
V
CC
0V
V
CC
0V
V
TH
V
TH
0V
V
CC
RESET
RESET t
RD
t
RD
1V
t
RP
t
RP
11779-020
V
CC
1V
V
CC
0V
V
CC
0V
V
TH
0V
V
CC
WDI
RESET
t
RP
t
RP
t
WD
11779-021
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A | Page 11 of 15
APPLICATIONS INFORMATION
WATCHDOG INPUT CURRENT
To minimize the watchdog input current, leave WDI low for
the majority of the watchdog timeout period. When driven
high, WDI can draw as much as 100 μA. Pulsing WDI low to
high to low at a low duty cycle reduces the effect of the large
input current. When WDI is unconnected, a window comparator
disconnects the watchdog timer from the reset output circuitry
so that a reset is not asserted when the watchdog timer times out.
NEGATIVE GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply transients,
the ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/
ADM8322 are equipped with glitch rejection circuitry. The typical
performance characteristic in Figure 13 plots VCC transient
duration vs. reset threshold overdrive. The curves show
combinations of reset threshold overdrive and duration for
which a reset is not generated for 5 V, 4.63 V, and 2.93 V reset
threshold devices. For example, with the 2.93 V threshold, a
transient that goes 100 mV below the threshold and lasts 80 μs
typically does not cause a reset, but if the transient is any larger
in reset threshold overdrive or duration, a reset generates. An
optional 0.1 μF bypass capacitor mounted near VCC provides
additional glitch rejection.
ENSURING RESET VALID TO VCC = 0 V
Both active low and active high reset outputs are guaranteed to
be valid for VCC as low as 0.9 V. However, by using an external
resistor with push-pull configured reset outputs, valid outputs
for VCC as low as 0 V are possible. For an active low reset output, a
resistor connected between RESET and ground pulls the output
low when it is unable to sink current. For an active high reset
output, a resistor connected between RESET and VCC pulls the
output high when it is unable to source current. Use a large
resistance, such as 100 kΩ, so that it does not overload the
reset output when VCC is greater than 0.9 V.
Figure 22. Ensuring Reset Valid to VCC = 0 V
WATCHDOG SOFTWARE CONSIDERATIONS
In implementing the microprocessor watchdog strobe code, quickly
switching WDI low to high and then high to low (minimizing WDI
high time) is desirable for current consumption reasons. However,
a more effective way of using the watchdog function can be
considered.
A low to high to low WDI pulse within a given subroutine
prevents the watchdog from timing out. However, if the sub-
routine becomes stuck in an infinite loop, the watchdog cannot
detect this because the subroutine continues to toggle WDI. A
more effective coding scheme for detecting this error involves
using a slightly longer watchdog timeout. In the program that
calls the subroutine, WDI is set high. The subroutine sets WDI
low when it is called. If the program executes without error, WDI
is toggled high and low with every loop of the program. If the
subroutine enters an infinite loop, WDI is kept low, the watchdog
times out, and the microprocessor is reset (see Figure 23).
Figure 23. Watchdog Flow Diagram
Figure 24. Typical Application Circuit
ADM8316/
ADM8318/
ADM8319
VCC
RESET
100kΩ
ADM8318/
ADM8319/
ADM8321/
ADM8322
V
CC
RESET
100kΩ
11779-022
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE
SET WDI
LOW
RETURN
INFINITE LOOP:
WATCHDOG
TIMES OUT
RESET
11779-023
RESET RESET
WDI I/OMR
ADM8316
V
CC
MICROPROCESSOR
11779-024
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet
Rev. A | Page 12 of 15
OPTIONS
Table 6. Selection Table
Device No. Watchdog Manual Reset
Output Stage
RESET RESET
ADM8316 Yes Yes Push-pull No
ADM8318 Yes No Push-pull Push-pull
ADM8319
No
Yes
Push-pull
Push-pull
ADM8320 Yes Yes Open-drain No
ADM8321 Yes No Open-drain Push-pull
ADM8322 No Yes Open-drain Push-pull
Table 7. Reset Timeout Options
Suffix Minimum Typical Maximum Unit
A 1 1.4 1.8 ms
B 20 28 36 ms
C
140
200
260
ms
D 1120 1600 2080 ms
Table 8. Watchdog Timeout Options
Suffix Minimum Typical Maximum Unit
W 4.5 6.3 8.1 ms
X 72 102 132 ms
Y 1.12 1.6 2.24 sec
Z 18.0 25.6 33.2 sec
Table 9. Reset Voltage Threshold Options
Reset Threshold Number
T
A
= 25°C
T
A
= −40°C to +125°C
Unit
Minimum
Typical
Maximum
Minimum
Maximum
50
4.950
5.000
5.050
4.925
5.075
V
49
4.851
4.900
4.949
4.826
4.974
V
48
4.752
4.800
4.848
4.728
4.872
V
47
4.653
4.700
4.747
4.629
4.771
V
46
4.584
4.630
4.676
4.560
4.700
V
45
4.455
4.500
4.545
4.432
4.568
V
44
4.346
4.390
4.434
4.324
4.456
V
43
4.257
4.300
4.343
4.235
4.365
V
42
4.158
4.200
4.242
4.137
4.263
V
41
4.059
4.100
4.141
4.038
4.162
V
40
3.960
4.00
4.040
3.940
4.060
V
39
3.861
3.900
3.939
3.841
3.959
V
38
3.762
3.800
3.838
3.743
3.857
V
37
3.663
3.700
3.737
3.644
3.756
V
36
3.564
3.600
3.636
3.546
3.654
V
35
3.465
3.500
3.535
3.447
3.553
V
34
3.366
3.400
3.434
3.349
3.451
V
33
3.267
3.300
3.333
3.250
3.350
V
32
3.168
3.200
3.232
3.152
3.248
V
31
3.049
3.080
3.111
3.033
3.127
V
30
2.970
3.000
3.030
2.955
3.045
V
29
2.901
2.930
2.959
2.886
2.974
V
28
2.772
2.800
2.828
2.758
2.842
V
27
2.673
2.700
2.727
2.659
2.741
V
26
2.604
2.630
2.656
2.590
2.670
V
25
2.475
2.500
2.525
2.462
2.538
V
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A | Page 13 of 15
Table 10. Standard Models
Model Reset Threshold (V) Minimum Reset Timeout (ms) Typical Watchdog Timeout (sec)
ADM8316WAY27ARJZR7 2.7 1 1.6
ADM8316WBX30ARJZR7 3 20 0.102
ADM8316WBX46ARJZR7 4.63 20 0.102
ADM8316WDW49ARJZR7 4.9 1120 0.0063
ADM8316WDZ30ARJZR7 3 1120 25.6
ADM8318WCY46ARJZR7 4.63 140 1.6
ADM8319WB31ARJZR7 3.08 20 Not applicable
ADM8320WCY29ARJZR7 2.93 140 1.6
ADM8320WCZ33ARJZR7 3.3 140 25.6
ADM8321WAW30ARJZR7 3 1 0.0063
ADM8321WAX30ARJZR7 3 1 0.102
ADM8321WAY30ARJZR7 3 1 1.6
ADM8321WCY46ARJZR7 4.63 140 1.6
ADM8322WC46ARJZR7 4.63 140 Not applicable
ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322 Data Sheet
Rev. A | Page 14 of 15
OUTLINE DIMENSIONS
Figure 25. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Figure 26. Ordering Code Structure
ORDERING GUIDE
Model1, 2, 3, 4 Temperature Range Package Description Package Option Ordering Quantity5 Branding
ADM8316WxxxxARJZR7 −40°C to +125°C 5-Lead SOT-23 RJ-5 3,000 LMT
ADM8318WxxxxARJZR7 −40°C to +125°C 5-Lead SOT-23 RJ-5 3,000 LMW
ADM8319WxxxARJZR7 −40°C to +125°C 5-Lead SOT-23 RJ-5 3,000 LMV
ADM8320WxxxxARJZR7 −40°C to +125°C 5-Lead SOT-23 RJ-5 3,000 LMX
ADM8321WxxxxARJZR7 −40°C to +125°C 5-Lead SOT-23 RJ-5 3,000 LMY
ADM8322WxxxARJZR7 −40°C to +125°C 5-Lead SOT-23 RJ-5 3,000 LMZ
1 Complete the ordering code by inserting the reset timeout, watchdog timeout, and reset threshold (ADM8316/ADM8318/ADM8320/ADM8321) suffixes from Table 7
to Table 9. No watchdog timeout is available for ADM8319/ADM8322.
2 Contact sales for the availability of nonstandard models. See Table 10 for a list of standard models.
3 Z = RoHS Compliant Part.
4 W = Qualified for Automotive Applications.
5 A minimum of 12,000 (four reels) must be ordered for nonstandard models.
COMPLIANT TO JEDEC STANDARDS MO-178-AA
10°
5°
0°
SEATING
PLANE
1.90
BSC
0.95 BSC
0.60
BSC
5
1 2 3
4
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0.15 MAX
0.05 MIN
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.50 MAX
0.35 MIN
0.55
0.45
0.35
11-01-2010-A
Z: RoHS COMPLIANT
ADM83 W
_ __ _ _ _
ARJZR7
ORDERING QUANTITY
R7: 3000-PIECE REEL, RoHS COMPLIANT
PACKAGE CODE
RJ: 5-LEAD SOT-23
TEMPERATURERANGE
A: –40°C TO +125°C
RESET THRESHOLDNUMBER
(25 TO 50)
WATCHDOG TIMEOUT PERIOD
W: 6.3ms (TYP)
X: 102ms (TYP)
Y: 1.6sec (TYP)
Z: 25.6sec (TYP)
RESET TIMEOUT PERIOD
A: 1ms (MIN)
B: 20ms (MIN)
C: 140ms (MIN)
D: 1120ms (MIN)
GENERIC NUMBER
(16 TO 22)
W: AUTOMOTIVE QUAL
11779-025
Data Sheet ADM8316/ADM8318/ADM8319/ADM8320/ADM8321/ADM8322
Rev. A | Page 15 of 15
AUTOMOTIVE PRODUCTS
The ADM8316W/ADM8318W/ADM8319W/ADM8320W/ADM8321W/ADM8322W models are available with controlled manufacturing to
support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications
that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the
automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for
specific product ordering information and to obtain the specific Automotive Reliability reports for these models.
©2013–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11779-0-9/15(A)
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ADM8321WAY30ARJZR7 ADM8316WBX30ARJZR7 ADM8322WC46ARJZR7 ADM8320WCY29ARJZR7
ADM8319WB31ARJZR7 ADM8318WCY46ARJZR7 ADM8316WBX46ARJZR7 ADM8321WCY46ARJZR7