1
FEATURES
DESCRIPTION
APPLICATIONS
RELATED DEVICES
bq76PL102
www.ti.com
........................................................................................................................................................................................... SLUS887 DECEMBER 2008
PowerLAN™ Dual-Cell Li-Ion Battery Monitor with PowerPump™ Cell Balancing
2
Monitors One or Two Individual Cell Voltages,One Internal, and Two External Temperatures
The bq76PL102 PowerLAN dual-cell battery monitoris part of a complete scalable battery managementPart of a Complete Low-Cost Solution for
system for use with arrays of up to 12 Li-IonBattery Packs of up to 12 Series and One or
rechargeable cells. The bq76PL102 connects to oneMore Parallel Cells (When Used With
or two cells in a series string, performs voltage andbq78PL114).
temperature monitoring of each individual cell, andAdvanced PowerPump™ Balancing
reports these parameters over the PowerLANTechnology Equalizes Cells in Li-Ion Battery
communication network. Together with a bq78PL114Packs, Resulting in Longer Run Time and Cell
master-gateway battery controller, the bq76PL102Life.
forms a complete battery monitoring andmanagement system for higher cell-countPowerPump™ Cell Balancing Transfers
applications.Charge From Cell to Cell During all OperatingConditions No Wasteful Current Bleeding or
Partitioning of the battery monitor function on a perAssociated Heat Buildup.
cell basis permits connection and measurement closeto the cell. This results in superior accuracy andUnique PowerLAN™ Isolated Communications
management over competing solutions. This schemeTechnology Permits Simultaneous
also facilitates the PowerPump cell balancing system,Measurement of All Individual Cell Voltages in
a technique which actively balances capacities ofa Series String.
Li-Ion batteries without the excessive heat orVery Low Power Consumption:
limitations of bleed-balancing techniques. < 200 µA Active
The bq76PL102 PowerPump cell balancing < 50 µA Standby
technology uses a charge-transfer methodologywhich does not bleed off excess energy as heat, but < 1 µA Undervoltage Shutdown
instead moves energy dynamically from cell to cell asConnects Directly to Cells, No Resistive
needed. Balancing is performed during all batteryDividers
operational modes charge, discharge, and rest.Internal LDO Regulator for Support Circuitry
Balancing is automatically coordinated between allcells on a PowerLAN system. PowerPump balancingUltrasmall Footprint, 3-mm × 3-mm
technology results in longer run time and longer cellMillivolt Measurement Resolution Using
life.Delta-Sigma A/D Converter
The PowerLAN communications architecture hasSelf-Calibrating Time Base No Crystal
been engineered to provide robust communications inRequired
tough EMI/RFI environments while avoiding theexcessive power draw, high parts count, and elevatedcost of other solutions. PowerLAN permits easyUninterruptible Power Supplies (UPS)
scalability using series connections of bq76PL102dual-cell battery monitors. High-cell-count batteryPortable Medical and Test Equipment
systems of up to 12 series cells are easilyElectric Bikes and Mild-EV Battery Packs
constructed without complicated high-voltage cellMulticell Series Strings 5S
measurement restrictions.
The bq76PL102 works with the bq78PL114master-gateway battery controller and bq76PL104bq78PL114 Master Gateway Battery Controller
quad-cell monitors*.bq76PL104 Quad-Cell Battery Monitor WithPowerPump Cell Balancing*(*Note: bq76PL104 Available 2009.)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerPump, PowerLAN are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
Vref
XT1
XT2
PUMP2S
PUMP2N
PUMP1S
PUMP1N
V2
Oscillator
PowerLAN™ Communications
Control Logic
VLDO
+
+
SDI
SDO
V1
VSS
Internal
Temperature
PowerPump
BalancingLogic
D S-
A/D
D S-
A/D
2.5V
LDO
Typical
Temp
Sensor
Typical
Temp
Sensor
Cell Balancing Circuits
B0345-01
bq76PL102
SLUS887 DECEMBER 2008 ...........................................................................................................................................................................................
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Figure 1. bq76PL102 Simplified Internal Block Diagram
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Product Folder Link(s) :bq76PL102
bq76PL102 Cell
MonitorWith
PowerPump
Balancing
PowerLAN
Communication
Link
PowerLAN
MasterGateway
BatteryController
bq78PL114
Pack
Positive
Pack
Negative
Example8-cellconfigurationshown
+
SMBus
RSENSE
PackProtection
CircuitsandFuse
B0332-01
bq76PL102 Cell
MonitorWith
PowerPump
Balancing
AVAILABLE OPTIONS
bq76PL102
www.ti.com
........................................................................................................................................................................................... SLUS887 DECEMBER 2008
Figure 2. Example Multicell PowerLAN System Implementation
The bq76PL102 is currently available in a 3-mm square QFN-16 package, bq76PL102RGT, with a ratedoperational temperature range of 40 ° C to 85 ° C. (See Figure 5 for specific package information, dimensions, andtolerances.)
Order bq76PL102RGTT for 250 quantity, tape and reelOrder bq76PL102RGTR for 3000 quantity, tape and reel
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s) :bq76PL102
1
2
3
4
VSS
PUMP1S
VLDO
PUMP1N
TDI
PUMP2S
SDI
PUMP2N
12
11
10
9
16
V2
VPP
TMD
V1
TCK
XT1
SDO
XT2
15 14 13
5678
P0019-06
Thermal
Pad
RGTPackage
(TopView)
bq76PL102
SLUS887 DECEMBER 2008 ...........................................................................................................................................................................................
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Figure 3. bq76PL102 Pinout (Top View)
CAUTION:
This device is subject to damage from Electrostatic Discharge (ESD). Thedevice should be stored and handled using appropriate ESD precautions toprevent damage to the internal circuitry.
PIN FUNCTIONS
PIN
I/O
(1)
DESCRIPTION
(2)NAME NO.
PUMP1N 6 OD Charge-balance gate drive for cell 1 northPUMP1S 5 OD Charge-balance gate drive for cell 1 southPUMP2N 8 OD Charge-balance gate drive cell 2 northPUMP2S 7 OD Charge-balance gate drive cell 2 southSDI 4 I PowerLAN serial data input from lower south, downstream partSDO 9 O PowerLAN serial data output to north, upstream partXT1 14 IA External temperature sensor 1 input (calibrated 50 µA)XT2 13 IA External temperature sensor 2 input (calibrated 50 µA)TCK 10 NC Do not connectTDI 3 NC Do not connectTMD 11 NC Do not connectV1 15 IA Midpoint cell connection (cell 1 positive and cell 2 negative)V2 12 P, IA Connect to most-positive cell voltage (cell 2 positive)VLDO 2 P Low-dropout regulator output connect to VPP (bypass with 4.7 µF capacitor)VPP 16 P Connect to VLDOVSS 1 P Connect to most-negative cell voltage (cell 1 negative) P Thermal pad connect to VSS
(1) I - input, IA - analog input, O - output, OD - open-drain output, P - power, NC - no connect(2) Cell numbering convention is from more-negative (cell 1) to more-positive (cell 2) and is locally referenced.
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ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
bq76PL102
www.ti.com
........................................................................................................................................................................................... SLUS887 DECEMBER 2008
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE UNITS
T
A
Operating free-air temperature (ambient) 40 to 85 ° CT
stg
Storage temperature 65 to 150 ° CVoltage on SDO Note: not VSS-referenced (V1 0.5) to (V2 + 0.5)
(2)
VVoltage on SDI Limited by lower cell voltage (VSS 0.5) to (V1 + 0.5)
(2)
VVoltage on V1 (V1 VSS)
(2)
Maximum cell voltage 0.5 to 5 VVoltage on V2 (V2 V1)
(2)
Maximum cell voltage (not VSS-referenced) 0.5 to 5 VVoltage on XT1 or XT2 With respect to VSS (VSS 0.5) to (V1 + 0.5) VJEDEC, JESD22-A114 human-body model, R = 1500 ,ESD tolerance 2 kVC = 100 pFLead temperature, soldering Total time < 3 seconds < 300 ° C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under Recommended OperatingConditions is note implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) Cell numbering convention is from most negative (Cell 1) to most positive (Cell 2) and is locally referenced.
T
A
= 40 ° C to 85 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC CHARACTERISTICS
Two cell configuration 2.5 3.6 4.5V
CELL
(1)
Cell voltage input VOne cell configuration 2.5 3.6 4.5I
DD2
Operating current (cell 2) Measuring, reporting, or balancing 250 µAI
STBY
Standby-mode current (cell 2) Idle 50 µAI
UVM
(2)
Cell low-voltage-mode current (cell 2) V1 < 2.7 V 1 µAI
DD1
Quiescent current (Cell 1) All modes 3 µAV
OL
General I/O characteristics I
OL
< 1.0 mA 0 0.5 VV
OH
General I/O characteristics I
OH
< 1.0 mA V
LDO
0.1 VV
IL
General I/O characteristics 0.25 V
LDO
VV
IH
General I/O characteristics 0.75 V
LDO
V
CELL VOLTAGE MEASUREMENT CHARACTERISTICS
V1 measurement range 2.5 4.5 VV2 measurement range 1.6 4.5 VAnalog resolution < 1 mVAccuracy (After calibration) 25 ° C ± 5 mVAccuracy (After calibration) 0 ° C to 60 ° C ± 10 mVConversion time
(3)
80 ms
INTERNAL TEMPERATURE MEASUREMENT CHARACTERISTICS
Measurement range 30 85 ° CResolution 0.1 ° CAccuracy (after calibration) 0 ° C to 85 ° C ± 2 ° C
(1) Device remains operational to 1.85 V with reduced accuracy and performance.(2) Condition forced by bq78PL114 command and when V1 < 2.7 V.(3) Does not include delay due to internode timing delays.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s) :bq76PL102
FEATURE SET
OPERATION
Cell-Voltage Measurement
Cell-Temperature Measurement
Cell Balancing
bq76PL102
SLUS887 DECEMBER 2008 ...........................................................................................................................................................................................
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)T
A
= 40 ° C to 85 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
EXTERNAL TEMPERATURE SENSOR(s) TYPICAL CHARACTERISTICS
(4)
Measurement range
(5)
40 90 ° CResolution 0.2 ° C25 ° C ± 1 ° CAccuracy
(6)
0 ° C to 60 ° C ± 2 ° C
(4) Typical for dual-diode (MMBD4148 or equivalent) external sensor using recommended circuit.(5) Range of diode sensors may exceed operation limits of IC and battery cells.(6) Typical behavior after calibration; final result depends on specific component characteristics.
The bq76PL102 dual-cell li-ion battery monitor with PowerPump balancing implements battery voltagemeasurement, temperature measurement, and balancing for one or two Li-Ion cells in series, and any number inparallel (limited by other design considerations).
Functions include:Simultaneous, synchronous measurement of all cell voltages in a series stringAsynchronous reporting of most-recent measurements for each cellFully independent measurements on a cell-by-cell basisPowerPump cell balancing using charge transfer from cell to cellPowerLAN isolated communications to other bq76PL102 devices or bq78PL114 master-gatewaybattery-management controllerLow-power operation
Voltage measurements are made using one-per-cell precision delta-sigma analog-to-digital converters (ADC). Aninternal calibrated band-gap voltage reference is provided with each part. Measurements are performed whencommanded by the bq78PL114 master-gateway battery-management controller via the one-wire PowerLANserial communications bus. This allows all cells to be measured at exactly the same time under the same loadconditions.
Temperature measurements can be obtained using one internal and up to two external sensors. Each externalsensor consists of one (or two for increased accuracy) series-connected diodes and a capacitor for filtering. Theuse of dual diodes in a single SMT package is recommended (MMBD4148SE or equivalent). The diode can belocated up to 6 inches (15.c cm) from the circuit board. The RF filter capacitor should be co-located very close tothe diode to minimize unwanted noise coupling.
The temperature measurement subsystem uses the same dual ADCs that are used for measuring voltages.Temperature measurements are fully independent of voltage readings, and are ordinarily interleaved at afractional rate of the voltage readings by commands from the bq78PL114 master-gateway battery-managementcontroller.
Balancing is provided among any number of supported cells. The bq76PL102 and PowerLAN family ofmaster-gateway battery controllers is optimized for designs using more than four cells in series.
The patented PowerPump reactive cell balancing dramatically increases the useful life of battery systems byeliminating the cycle life fade of multicell batteries due to cell imbalance. PowerPump efficiently transfers chargefrom cell to cell, rather than simply bleeding off charging energy as heat. Charge is moved from higher-capacity
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Product Folder Link(s) :bq76PL102
PowerLAN Communications
Operations Modes
bq76PL102
www.ti.com
........................................................................................................................................................................................... SLUS887 DECEMBER 2008
cells to lower-capacity ones, and can be moved as needed between any number of series cell elements.Balancing is performed during all battery operational modes charge, discharge, and rest. Compared to resistivebleed balancing, virtually no energy is lost as heat. The actual balance current is externally scalable withcomponent selection and can range from 10 mA to 1 A (100 mA typical) depending on application or cellrequirements. (See the reference schematic, Figure 7 .)
Algorithms for cell balancing are centrally coordinated by the bq78PL114 PowerLAN master-gatewaybattery-management controller and directed across the array of bq76PL102 dual-cell Li-Ion battery monitors.Balancing is done in both directions by the bq76PL102s within the cell stack array: north or up the cell stack andsouth or down the cell stack. Each bq76PL102 node provides the circuitry to transfer (pump) the charge from cellto cell to provide balancing. The balancing algorithm is implemented in the bq78PL114 master-gateway batterycontroller, and commands are communicated to the bq76PL102s via the PowerLAN communications link. Bytracking the balancing required by individual cells, overall battery safety is enhanced often allowing earlydetection of internal micro-shorts or other cell failures.
Cell balancing pumping, or charge transfer from one cell to another, is accomplished using a circuit that forms asimple flyback converter under control of the bq76PL102, which is in turn controlled by the master gateway. Theoutputs of PUMP nd (cell number, direction) control MOSFET transistors which charge an inductor from one celland then discharge the inductor into an adjacent cell through the intrinsic body diode of the other MOSFET.PUMP1S: Pumps charge from cell 1 to the next lower cell (closer to battery negative). This signal is unusedby the first or lowest cell in the string.PUMP1N: Pumps charge from cell 1 to cell 2.PUMP2S: Pumps charge from cell 2 to cell 1PUMP2N: Pumps charge from cell 2 to the next higher cell in a pack (closer to battery positive). This signal isunused by the highest cell in the string.
PowerLAN communications technology is a patented serial network and protocol designed specifically for batterymanagement in a multicell environment. PowerLAN is used to initiate and report measurements of cell voltageand temperature, as well as control cell balancing. Using only a capacitor, PowerLAN isolates voltages fromadjacent bq76PL102 parts to permit high-voltage stack assemblies without compromising precision andaccuracy. PowerLAN is expandable to support up to 12 cells in series, with each bq76PL102 handling two seriescells. PowerLAN provides high ESD standoff and high immunity to noise generated by nearby digital circuitry orswitching currents. Each bq76PL102 has both a PowerLAN serial input and serial output pin. Received data isbuffered and retransmitted, permitting high numbers of nodes without loss of signal fidelity. Signals arecapacitor-coupled between nodes to provide high dc isolation.
The bq76PL102 normally operates in one of two modes: active or standby. The bq76PL102 is normally instandby mode and consumes typically less than 50 µA. The low-dropout regulator output is still functional in thismode, as are internal system protection functions (undervoltage, communications timeout, etc.)
When a PowerLAN communications event occurs, then the bq76PL102 transitions to active mode and powerconsumption increases to 200 A typically. The bq76PL102 stays in this mode to complete any measurements orcell-balancing pumping operations. Once activity in this mode ceases, the return to standby is automatic, thusreducing overall power consumption.
An undervoltage ultralow-power-consumption mode is also available when initiated by the bq78PL114master-gateway battery controller and when the cell voltages drop below a preset threshold. This mode is usedto preserve battery capacity during long periods of non-use and therefore has a power consumption ofapproximately 1 µA.
Note that cell balancing currents are external to the bq76PL102 and may be sized according to the needs of theapplication (typically 10 mA to 1 A). These currents are fixed by the cell-balancing circuitry and only enabled ordisabled by the bq76PL102 (under control of the bq78PL114) to achieve the necessary cell-balance operations.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
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COMPLEMENTARY PRODUCTS
PowerLAN Master Gateway Battery Controller
bq76PL102
SLUS887 DECEMBER 2008 ...........................................................................................................................................................................................
www.ti.com
The bq78PL114 master-gateway battery-management controller with PowerPump cell balancing from TexasInstruments is the central controller for a complete multicell battery system.
This advanced master-gateway battery controller works with up to 12 series cells monitored by bq76PL102 orbq76PL104* (*available 2009) cell monitors to provide battery voltage, temperature, current and safetymonitoring; state-of-charge and state-of-health information; system-wide internal PowerLAN communications; aswell as external communications of battery parameters via the industry-standard SMBus interface.
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Product Folder Link(s) :bq76PL102
PowerLAN Quad-Cell Battery Monitor* (Available 2009*)
bq78PL114
PowerLAN
GatewayBattery
Management
Controller
RPRE
+PACK+
RSENSE
PACK–
XT1–XT4
Temperature
Sensor(typ.)
SPROT
LED1–LED5
Typicalsix-cellconfigurationshown.
AdditionalcellsaddedviaPowerLANconnection.
Somecomponentsomittedforclarity.
V2
V3
V4
V1
VLDO2
CRFI
VLDO1
RSTN
SDO2
SDI3
Oneof4external
sensorsshown
P-LAN
5
CELL 6
CELL 5
V2
V1
SDI1
SDO0
Level-ShiftCircuits
CHG
DSG
PRE
ESDProtection
SMBCLK
SMBDAT
SMBus
ThermalPad
VSS
CSBAT
CCBAT
CCPACK
CSPACK
CellBalancing
Circuits
CellBalancingCircuits
bq76PL102
CELL 4
CELL 3
CELL 2
CELL 1
S0342-03
bq76PL102
www.ti.com
........................................................................................................................................................................................... SLUS887 DECEMBER 2008
Figure 4. bq78PL114 Simplified 6-Cell Gateway Controller Circuit With bq76PL102
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s) :bq76PL102
VSS
V1
V2
PUMP2S
PUMP2N
PUMP1N
1
+
+
bq76PL102
SDI
SDO
0.001
3300pF
3300pF
20k
20k
15µH
2k
3300pF
3300pF
20k
20k
15µH
2k
1
1
1
1
PowerPad
VLDO
VPP
PUMP1S
XTMPx
PowerLAN
1
0.001
To Node n + 1
To Node n 1
PowerPump™ Circuit
V1 n+1
+
V2 n
+
V1 n+1
V1 n
+
V2 n
V1 n
V2 n 1
+
Typical
Temperature
Sensor
MMBD4148SE
Typical 2cell circuit shown,
somecomponents omitted
forclarity.
PUMP1S (Next part below)
ToNode n 1
PUMP1S (Next part above)
ToNode n+1
S0388-01
bq76PL102
SLUS887 DECEMBER 2008 ...........................................................................................................................................................................................
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Figure 5. bq76PL102 Simplified Example Operating-Circuit Diagram
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bq76PL102
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........................................................................................................................................................................................... SLUS887 DECEMBER 2008
Figure 6. Higher-Balancing-Current bq76PL102 Operating-Circuit Diagram
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Product Folder Link(s) :bq76PL102
equivalent
resistance
UsedforSafetyEvents
UsedforDeviceTemp.
T1=CELL1TEMP.
T2=CELL2TEMP.
T3=CELL3TEMP.
T4=CELL4TEMP.
T5=CELL5TEMP
.
T6=CELL6TEMP.
T7=CELL7TEMP.
T8=CELL8TEMP.
TEMP-FETS=FETTEMP.&USEDFORSAFETY
.
TEMP-PCB=TEMP.OFU4
stargroundpoint located atR3
Keepthis connection toBATT-asshortandLowZaspossible.
1
CHG
2
DSG
3
PRE
4
EFCIC
5
EFCID
6
CCBAT
7CCPACK
8
VLDO1
9
CSBAT
10 CSPACK
11
OSCI
12
OSCO
13 SDO0
14 SDI1
15 P1N
16 P2S
17 P2N
18 SDO2
19 SDI3
20 P3S
21 P3N
22 P4S
23 P4N
24
P-LAN
25 RSTN
26
SPI-CLK
27
SPI-DI
28
SPI-DO
29
SELECT
30
SPROT
31
LEDEN
32
LED1
33
LED2
34
LED3
35
LED4
36
LED5
37
SMBCLK
38
SMBDAT
39 V4
40
XT4 41
XT3
42 V3
43 VLDO2
44 V2
45
XT2 46
XT1
47 V1
48 VSS
49 TAB
U4
bq78PL114
C5
10uF
R44
10K
C38
0.1uF
C27 1000pF
C28
10uF
C43
0.1uF
C7
1.0uF
R5
100K
C11
1000pF
R28
4.7K
R27
4.7K
R49
100R R50
100R
C9
10uF
C10 1000pF
R54
100R
R55
100R
R43
1.0M
R51
1.0M
15 V1
12 V2 14
T1 13
T2
11 TMD
10 TCK
3TDI
8P2N
7P2S
6P1N
5P1S
2
VLDO
16
VPP
9
SDO 4
SDI
17 TAB
1VSS
U3 BQ76PL102
C40
1.0uF
C44
1.0uF
C39
1.0uF
C41
1.0uF
R10
2K
R30 20K
R29 20K
C12
3300pF
C13
3300pF
Q1-A
FDC6327C
Q1-B
FDC6327C
L1
4.7uH
C30
22uF D10
MA21D3800L
D9
MA21D3800L
1
2
3
4
SMBUS-PORT
R3
0.005R
R6
1.0M
Z1
5.6VDC
T3
MMBD4148SE
C6 1000pF
T4
MMBD4148SE
C37 1000pF
TEMP-PCB
MMBD4148SE
C45
1000pF
TEMP-FETS
MMBD4148SE
C46
1000pF
R9
2K
R11 20K
R12 20K C14
3300pF
C15
3300pF
Q2-A
FDC6327C
Q2-B
FDC6327C
L2
4.7uH
D5
MA21D3800L
D6
MA21D3800L
R13
2K
R14 20K
R15 20K
C17
3300pF
C18
3300pF
Q3-A
FDC6327C
Q3-B
FDC6327C
L3
4.7uH
C19
22uF
D7
MA21D3800L
D8
MA21D3800L
R16
2K
R20 20K
R24 20K C21
3300pF
C22
3300pF
Q4-A
FDC6327C
Q4-B
FDC6327C
L4
4.7uH
C23
22uF
D11
MA21D3800L
D12
MA21D3800L
R31
2K
R32 20K
R33 20K
C20
3300pF
C24
3300pF
Q5-A
FDC6327C
Q5-B
FDC6327C
L5
4.7uH
C25
22uF
D13
MA21D3800L
D14
MA21D3800L
R34
2K
R35 20K
R36 20K C32
3300pF
C33
3300pF
Q6-A
FDC6327C
Q6-B
FDC6327C
L6
4.7uH
C34
22uF
D15
MA21D3800L
D16
MA21D3800L
R37
2K
R38 20K
R39 20K
C35
3300pF
C36
3300pF
Q7-A
FDC6327C
Q7-B
FDC6327C
L7
4.7uH
C47
22uF
D17
MA21D3800L
D18
MA21D3800L
C29
10uF
C51
10uF
T6
MMBD4148SE
C52
1000pF
T5
MMBD4148SE
C53
1000pF
C48 1000pF
C49
10uF
15 V1
12 V2 14
T1 13
T2
11 TMD
10 TCK
3TDI
8P2N
7P2S
6P1N
5P1S
2
VLDO
16
VPP
9
SDO 4
SDI
17 TAB
1VSS
U2 BQ76PL102
C54
10uF
C55
10uF
T8
MMBD4148SE
C56
1000pF
T7
MMBD4148SE
C57
1000pF
PACK+
PACK-
D
S
G
Q11
MMBFJ201
Q12
BC846ALT1G
Vcebr=65V
R53
560K
R56
200K
ZR2
12.0VDC
BZT52C12-7-F
R58
30K
R59
1.0M
Q13
IRF4905PBF
D
S
GQ8
MMBFJ201
Q9
BC846ALT1G
Vcebr=65V
R40
560K R41
200K
ZR1
12.0VDC
BZT52C12-7-F
R45
30K
R46
1.0M
Q10 IRF4905PBF
C60
0.1uF
C61
0.1uF
Q15
BC846ALT1G
Vcebr=65V
R17
1.0M
R52
30K
R60
1.0M
Q16
STB16NF06LT4 R18
C1
22uF
C2
22uF
R19
1.0M
R25
1.0M
D23
D24
D25
D26
D27
S1
C3
1000pF
Q14
BSS138
C4
0.1uF
Q17
FDV304P
R1
100K
T1
MMBD4148SE
C8 1000pF
T2
MMBD4148SE
C16 1000pF
C42
0.1uF
C50
0.1uF
-
+
CELL1
-
+
CELL2
-
+
CELL3
-
+
CELL4
-
+
CELL5
-
+
CELL6
-
+
CELL7
-
+
CELL8
VSS
VLDO1
VSS
VSS
VSS
VSS
VLDO1
S002
bq76PL102
SLUS887 DECEMBER 2008 ...........................................................................................................................................................................................
www.ti.com
Figure 7. Reference Schematic
12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s) :bq76PL102
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