FEATURES
DTrenchFETr Power MOSFET
DUltra-Low rSS(on)
DESD Protected: 4000 V
DNew MICRO FOOTt Chipscale Packaging Reduces
Footprint Area, Profile (0.65 mm) and On-Resistance
Per Footprint Area
APPLICATIONS
DBattery Protection Circuit
- 1-2 Cell Li+/LiP Battery Pack for Portable Devices
Si8902EDB
Vishay Siliconix
New Product
Document Number: 71862
S-21337—Rev. C, 05-Aug-02 www.vishay.com
1
Bi-Directional N-Channel 20-V (D-S) MOSFET
PRODUCT SUMMARY
VS1S2 (V) rS1S2(on) (W) IS1S2 (A)
0.045 @ VGS = 4.5 V 5.0
0.048 @ VGS = 3.7 V 4.8
20 0.057 @ VGS = 2.5 V 4.4
0.072 @ VGS = 1.8 V 3.9
1
G2
S2
G1
S1
N-Channel
4 kW
4 kW
MICRO FOOTt
Device Marking:
8902E = P/N Code
xxx = Date/Lot Traceability Code
S2S2
Bump Side View
G2G1
4
3
5
6
S1S1
2
Backside View
8902E
xxx
Pin 1 Identifier
ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)
Parameter Symbol 5 secs Steady State Unit
Source1—Source2 Voltage VS1S2 20
Gate-Source Voltage VGS "12 V
_aTA = 25_C5.0 3.9
Continuous Source1—Source2 Current (TJ = 150
_
C)aTA = 85_CIS1S2 3.4 2.8 A
Pulsed Source1—Source2 Current ISM 8
TA = 25_C 1.7 1
Maximum Power DissipationaTA = 85_CPD0.8 0.5 W
Operating Junction and Storage Temperature Range TJ, Tstg -55 to 150
VPR 215 _C
Package Reflow ConditionscIR/Convection 220
THERMAL RESISTANCE RATINGS
Parameter Symbol Typical Maximum Unit
t v 5 sec 60 75
Maximum Junction-to-AmbientaSteady State RthJA 95 120 _C/W
Maximum Junction-to-FootbSteady State RthJF 18 22
C/W
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
b. The Foot is defined as the top surface of the package.
c. Refer to IPC/JEDEC (J-STD-020A), no manual or hand soldering.
Si8902EDB
Vishay Siliconix New Product
www.vishay.com
2 Document Number: 71862
S-21337—Rev. C, 05-Aug-02
SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED)
Parameter Symbol Test Condition Min Typ Max Unit
Static
Gate Threshold Voltage VGS(th) VSS = VGS, ID = 980 mA 0.45 1.0 V
VSS = 0 V, VGS = "4.5 V "4mA
Gate-Body Leakage IGSS VSS = 0 V, VGS = "12 V "10 mA
VSS = 16 V, VGS = 0 V 1
m
Zero Gate Voltage Source Current IS1S2 VSS = 16 V, VGS = 0 V, TJ = 85_C 5 mA
On-State Source CurrentaIS(on) VSS = 5 V, VGS = 4.5 V 5 A
VGS = 4.5 V, ISS = 1 A 0.038 0.045
VGS = 3.7 V, ISS = 1 A 0.041 0.048
W
Source1—Source2 On-State ResistancearS1S2(on) VGS = 2.5 V, ISS = 1 A 0.048 0.057 W
VGS = 1.8 V, ISS = 1 A0.060 0.072
Forward Transconductanceagfs VSS = 10 V, ISS = 1 A 20 S
Dynamicb
Turn-On Delay Time td(on) 1 1.5
Rise Time trV
SS
= 10 V, R
L
= 10 W3 4.5
m
Turn-Off Delay Time td(off)
VSS = 10 V, RL = 10
W
ISS ^ 1 A, VGEN = 4.5 V, RG = 6 W17 26 ms
Fall Time tf10 15
Notes
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
0.01
100
10,000 Gate Current vs. Gate-Source Voltage
0
4
8
12
16
20
0 3 6 9 12 15
Gate-Current vs. Gate-Source Voltage
VGS - Gate-to-Source Voltage (V)
0.1
1
10
1,000
VGS - Gate-to-Source Voltage (V)
- Gate Current (IGSS mA)
0369 15
TJ = 25_C
TJ = 150_C
- Gate Current (mA)IGSS
IGSS @ 25_C (mA)
12
Si8902EDB
Vishay Siliconix
New Product
Document Number: 71862
S-21337—Rev. C, 05-Aug-02 www.vishay.com
3
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
0
2
4
6
8
10
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
0.00
0.02
0.04
0.06
0.08
0.10
0246810
0
2
4
6
8
10
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0.6
0.8
1.0
1.2
1.4
1.6
-50 -25 0 25 50 75 100 125 150
VGS = 5 thru 1.5 V
25_C
TC = 125_C
VGS = 4.5 V
IS1S2 = 1 A
VGS = 4.5 V
VGS = 2.5 V
-55_C
Output Characteristics Transfer Characteristics
On-Resistance vs. Drain Current
VDS - Drain-to-Source Voltage (V)
- Drain Current (A)ID
VGS - Gate-to-Source Voltage (V)
- Drain Current (A)ID
- On-Resistance (rDS(on) W)
ID - Drain Current (A)
On-Resistance vs. Junction Temperature
TJ - Junction Temperature (_C)
(Normalized)
- On-Resistance (rDS(on) W)
VGS = 1.8 V
1 V
VGS = 3.7 V
0.00
0.02
0.04
0.06
0.08
0.10
012345
IS1S2 = 1 A
On-Resistance vs. Gate-to-Source Voltage
- On-Resistance (rDS(on) W)
VGS - Gate-to-Source Voltage (V)
IS1S2 = 5 A
-0.4
-0.3
-0.2
-0.1
-0.0
0.1
0.2
-50 -25 0 25 50 75 100 125 150
IS1S2 = 980 mA
Threshold Voltage
Variance (V)VGS(th)
TJ - Temperature (_C)
Si8902EDB
Vishay Siliconix New Product
www.vishay.com
4 Document Number: 71862
S-21337—Rev. C, 05-Aug-02
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
0
5
30
Power (W)
Single Pulse Power, Junction-to-Ambient
Time (sec)
20
25
10-3 10-2 1 10 60010-1
10-4 100
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Normalized Thermal Transient Impedance, Junction-to-Ambient
Square Wave Pulse Duration (sec)
Normalized Ef fective Transient
Thermal Impedance
1. Duty Cycle, D =
2. Per Unit Base = RthJA = 95_C/W
3. TJM - TA = PDMZthJA(t)
t1
t2
t1t2
Notes:
4. Surface Mounted
PDM
1 1000100.10.01
15
10-3 10-2 110-1
10-4
2
1
0.1
0.01
0.2
0.1
0.05
0.02
Single Pulse
Duty Cycle = 0.5
Normalized Thermal Transient Impedance, Junction-to-Foot
Square Wave Pulse Duration (sec)
Normalized Ef fective Transient
Thermal Impedance
100
10
VDS - Drain-to-Source Voltage (V)
10
0.1
0.1 1 10 100
Limited
by rDS(on)
0.01
1
TC = 25_C
Single Pulse
0.1 s
1 s
10 s
dc
- Drain Current (A)ID
0.01 s
Safe Operating Area
0.001 s
0.0001 s
Si8902EDB
Vishay Siliconix
New Product
Document Number: 71862
S-21337—Rev. C, 05-Aug-02 www.vishay.com
5
PACKAGE OUTLINE
MICRO FOOT: 6−BUMP (2 X 3, 0.8−mm PITCH)
Recommended Land
Mark on Backside of Die
e
e
6 0.30 X 0.31
Note 3
Solder Mask -0.4
8902E
xxx D
E
s e
e
s
Bump Note 1
A
A2
A1
NOTES (Unless Otherwise Specified):
1. 6 solder bumps are Eutetic 63Sn/37Pb with diameter 0.37 - 0.41 mm
2. Backside surface is coated with a Ag/Ni/Ti layer
3. Non-solder mask defined copper landing pad.
4. Laser marks on the silicon die back
e
Note 2
b Diameter
e
MILLIMETERS* INCHES
Dim Min Max Min Max
A0.600 0.650 0.0236 0.0256
A10.260 0.290 0.102 0.114
A20.340 0.360 0.0134 0.0142
b0.370 0.410 0.0146 0.0161
D1.520 1.600 0.0598 0.0630
E2.320 2.400 0.0913 0.0945
e0.750 0.850 0.0295 0.0335
s0.380 0.400 0.0150 0.0157
* Use millimeters as the primary measurement.
