SSM07N70CP,R-A N-channel Enhancement-mode Power MOSFET BVDSS Dynamic dv/dt rating D Repetitive Avalanche Rated 1.2 R DS(ON) Fast Switching I Simple Drive Requirement 675V 7A D G S DESCRIPTION The SSM07N70C series is specially designed as a main switching device for universal 90~265VAC off-line AC/DC converter applications. Both TO-220 and TO-262 type provide high blocking voltage to overcome voltage surge and sag in the toughest power system with the best combination of fast switching,ruggedized design and cost-effectiveness. G D The TO-220 and TO-262 packages are widely preferred for all commercial and industrial applications. The device is well suited for switch-mode power supplies, AC-DC converters and high-current high-speed switching circuits. G D ABSOLUTE MAXIMUM RATINGS Symbol Parameter TO-220 (P) S S TO-262 (R) Rating Units VDS Drain-Source Voltage 675 V VGS Gate-Source Voltage 30 V ID @ TC=25C Continuous Drain Current, VGS @ 10V 7 A ID @ TC=100C Continuous Drain Current, VGS @ 10V 4.4 A 1 IDM Pulsed Drain Current 18 A PD @ TC=25C Total Power Dissipation 89 W 0.7 W/C 140 mJ Linear Derating Factor 2 EAS Single Pulse Avalanche Energy IAR Avalanche Current 7 A EAR Repetitive Avalanche Energy 7 mJ TSTG Storage Temperature Range -55 to 150 C TJ Operating Junction Temperature Range -55 to 150 C THERMAL DATA Symbol Parameter Value Unit Rthj-c Thermal Resistance Junction-case Max. 1.4 C/W Rthj-a Thermal Resistance Junction-ambient Max. 62 C/W 3/21/2005 Rev.2.01 www.SiliconStandard.com 1 of 6 SSM07N70CP,R-A Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units 675 - - V BVDSS Drain-Source Breakdown Voltage BV DSS/ Tj Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA - 0.6 - V/C RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=3.5A - - 1.2 VGS(th) Gate Threshold Voltage VDS=VGS, ID=250uA 2 - 4 V gfs Forward Transconductance VDS=10V, ID=3.5A - 4.5 - S VDS=675V, VGS=0V - - 10 uA Drain-Source Leakage Current (Tj=150 C) VDS=480V, VGS=0V - - 100 uA Gate-Source Leakage VGS= 30V - - 100 nA ID=7A - 32 - nC VGS=0V, ID=1mA o IDSS Drain-Source Leakage Current (Tj=25 C) o IGSS 3 Qg Total Gate Charge Qgs Gate-Source Charge VDS=480V - 8.6 - nC Qgd Gate-Drain ("Miller") Charge VGS=10V - 9 - nC VDD=300V - 17 - ns 3 td(on) Turn-on Delay Time tr Rise Time ID=7A - 15 - ns td(off) Turn-off Delay Time RG=10, VGS=10V - 35 - ns tf Fall Time RD=43 - 18 - ns Ciss Input Capacitance VGS=0V - 2075 - pF Coss Output Capacitance VDS=25V - 120 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 8 - pF Min. Typ. - - 7 A - - 18 A - - 1.5 V Source-Drain Diode Symbol IS ISM VSD Parameter Test Conditions VD=VG=0V , VS=1.5V Continuous Source Current ( Body Diode ) Pulsed Source Current ( Body Diode ) 3 Forward On Voltage 1 Tj=25C, IS=7A, VGS=0V Max. Units Notes: 1.Pulse width limited by safe operating area. 2.Starting Tj=25oC , VDD=50V , L=5mH , RG=25 , IAS=7A. 3.Pulse width <300us , duty cycle <2%. 3/21/2005 Rev.2.01 www.SiliconStandard.com 2 of 6 SSM07N70CP,R-A 12 T C =25 o C V G =10V V G =10V V G =6.0V V G =6.0V V G =5.5V ID , Drain Current (A) ID , Drain Current (A) 10 T C =150 o C 8 8 6 V G =5.0V 4 V G =5.5V 6 V G =5.0V 4 2 V G =4.0V 2 V G =4.0V 0 0 0 5 10 15 20 0 25 10 20 30 40 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 3 1.2 I D =3.5A V G =10V 2.5 Normalized R DS(ON) Normalized BVDSS (V) 1.1 1 2 1.5 1 0.9 0.5 0.8 0 -50 0 50 100 150 -50 0 T j , Junction Temperature ( o C) Fig 3. Normalized BVDSS vs. Junction Temperature 3/21/2005 Rev.2.01 50 100 150 T j , Junction Temperature ( o C) Fig 4. Normalized On-Resistance vs. Junction Temperature www.SiliconStandard.com 3 of 6 SSM07N70CP,R-A 8 100 7 80 ID , Drain Current (A) 6 5 PD (W) 60 4 40 3 2 20 1 0 0 25 50 75 100 125 150 0 50 o 100 150 o T c , Case Temperature ( C) Tc , Case Temperature( C) Fig 5. Maximum Drain Current vs. Case Temperature Fig 6. Typical Power Dissipation 1 Normalized Thermal Response (R thjc) 100 10 ID (A) 10us 100us 1 1ms o T c =25 C Single Pluse 10ms DUTY=0.5 0.2 0.1 0.1 0.05 PDM t SINGLE PULSE 0.02 T 0.01 Duty factor = t/T Peak Tj = P DM x Rthjc + TC 100ms 0 0.01 1 10 100 1000 10000 0.00001 0.0001 V DS (V) 0.01 0.1 1 10 t , Pulse Width (s) Fig 7. Maximum Safe Operating Area 3/21/2005 Rev.2.01 0.001 Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 4 of 6 SSM07N70CP,R-A 16 I D =7A 14 VGS , Gate to Source Voltage (V) f=1.0MHz 10000 Ciss V DS =320V 12 V DS =400V 10 C (pF) V DS =480V 8 Coss 100 6 4 Crss 2 0 1 0 5 10 15 20 25 30 35 40 45 1 50 5 9 13 17 21 25 29 V DS (V) Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 5 100 4 10 T j = 25 o C 3 VGS(th) (V) IS (A) T j = 150 o C 1 2 0.1 1 0 0.01 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 -50 0 V SD (V) Fig 11. Forward Characteristic of Reverse Diode 3/21/2005 Rev.2.01 50 100 150 T j , Junction Temperature ( o C) Fig 12. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 5 of 6 SSM07N70CP,R-A VDS 90% RD VDS D RG TO THE OSCILLOSCOPE 0.5x RATED VDS G + 10% VGS S 10 V VGS - td(on) Fig 13. Switching Time Circuit tr td(off) tf Fig 14. Switching Time Waveform VG VDS D 10V 0.8 x RATED VDS G S QG TO THE OSCILLOSCOPE QGS QGD VGS + 1~ 3 mA IG ID Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 3/21/2005 Rev.2.01 www.SiliconStandard.com 6 of 6