©2000 Fairchild Semiconductor International
September 2000
Rev. A, September 2000
FQB6N80 / FQI6N80
QFET
TM
FQB6N80 / FQI6N80
800V N-Ch annel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
Features
5.8A, 800V, RDS(on) = 1.95 @VGS = 10 V
Low gate charge ( typical 31 nC)
Low Crss ( typical 14 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximu m Ratings
TC = 25°C unless otherwise noted
Thermal Characteri stics
Symbol Parameter FQB6N80 / FQI6N80 Units
VDSS Drain-Source Voltage 800 V
IDDrain Current - Continuous (TC = 25°C) 5.8 A
- Continuous (TC = 100°C) 3.67 A
IDM Drain Current - Pulsed (Note 1) 23.2 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 680 mJ
IAR Avalanche Current (Note 1) 5.8 A
EAR Repetitive Avalanche Energy (Note 1) 15.8 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.0 V/ns
PDPower Dissipation (TA = 25°C) * 3.13 W
Power Dissipation (TC = 25°C) 158 W
- Derate above 25°C 1.27 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 0.79 °C/W
RθJA Thermal Resistance, Junction-to-Ambient * -- 40 °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
35
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35
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S
D
G
D2-PAK
FQB Series I2-PAK
FQI Series
GS
D
GS
D
Rev. A, September 2000
FQB6N80 / FQI6N80
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
©2000 Fairchild Semiconductor International
Electrical Characteristics
TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 38mH, IAS = 5.8A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 5.8A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parame ter Test Condit i ons Min Typ Max Units
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA800 -- -- V
BVDSS
/ TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.9 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 800 V, VGS = 0 V -- -- 10 µA
VDS = 640 V, TC = 125°C -- -- 100 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = VGS, ID = 250 µA3.0 -- 5.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V , ID = 2.9 A -- 1.5 1.95
gFS Forward Transconductance VDS = 50 V, ID = 2.9 A -- 5.9 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 1150 1500 pF
Coss Output Capacitance -- 125 160 pF
Crss Reverse Transfer Capacitance -- 14 18 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 400 V, ID = 5.8 A,
RG = 25
-- 30 70 ns
trTurn-On Rise Time -- 70 150 ns
td(off) Turn-Off De l a y Time -- 65 140 ns
tfTurn -Off Fa ll Time -- 45 100 ns
QgTotal Gate Charge VDS = 640 V, ID = 5.8 A,
VGS = 10 V
-- 31 nC
Qgs Gate-Source Charge -- 7.1 -- nC
Qgd Gate-Drain Charge -- 15 -- nC
Drain-Source Di ode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 5.8 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 23.2 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 5.8 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, I S = 5.8 A,
dIF / dt = 100 A/µs
-- 650 -- ns
Qrr Reverse Recovery Charge -- 5.7 - - µC
FQB6N80 / FQI6N80
Rev. A, September 2000©2000 Fairchild Semiconductor International
0.2 0.4 0.6 0.8 1.0 1.2
10-1
100
101
150
Notes :
1. VGS = 0V
2. 250μ
s Pulse Test
25
IDR, Reverse Drain Current [A]
VSD, Sour c e-Drain vo ltag e [V]
0 4 8 12 16
0
1
2
3
4
VGS = 20V
VGS = 10V
N ote : T J = 25
RDS(ON) [Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
246810
10-1
100
101
150oC
25oC
-55oC
No tes :
1. VDS = 50V
2. 250μ
s Pu lse T es t
ID, Drain Cur re nt [A]
VGS, Gate-Source Voltage [V]
10-1 100101
10-1
100
101
VGS
To p : 15 .0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
B o tto m : 5 .5 V
No tes :
1. 250μ
s Pu lse Tes t
2. TC = 25
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
0 5 10 15 20 25 30 35
0
2
4
6
8
10
12
VDS = 400V
VDS = 160V
VDS = 640V
Note : ID = 5.8A
VGS, Gate-Source Voltage [V]
QG, Tota l Ga t e Cha rg e [nC]
10-1 100101
0
200
400
600
800
1000
1200
1400
1600
1800
2000 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
N o te s :
1 . V GS = 0 V
2 . f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitanc e Ch a racteristics Figure 6. Gate Charge C haracteris tics
Figure 3. On-Resistanc e Variation vs
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation with Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ics
©2000 Fairchild Semiconductor International
FQB6N80 / FQI6N80
Rev. A, September 2000
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
No te s :
1 . ZθJC(t) = 0.7 9 /W Ma x.
2 . D u ty F a c to r, D= t 1/t2
3 . TJM - T C = PDM * Z θJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC
(t), T herm al R esponse
t1, Sq u a re W a ve P u lse D u ra tio n [se c ]
25 50 75 100 125 150
0
1
2
3
4
5
6
ID, Drain Current [A]
TC, Case Temperature [
]
100101102103
10-2
10-1
100
101
102
10μ
s
DC10 ms 1 m s
100μ
s
Op e r a tio n in T h is A re a
is Limited by R DS(on)
Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. VGS = 10 V
2. ID = 2.9 A
RDS(ON) , (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
Notes :
1 . VGS = 0 V
2 . ID = 250 μ
A
BV DSS , (N ormaliz e d )
Drain-Source Breakdow n Voltage
TJ, Junction Tem perature [oC]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature
Figu re 7. Breakdown Voltage Variation
vs Temperature Figure 8. On-Resistance Variation
vs Temperature
Figure 11. Transient Thermal Respons e Cur ve
t1
PDM
t2
FQB6N80 / FQI6N80
Rev. A, September 2000©2000 Fairchild Semiconductor International
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
©2000 Fairchild Semiconductor International
FQB6N80 / FQI6N80
Rev. A, September 2000
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD con troll ed by pulse per iod
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD con troll ed by pulse per iod
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
FQB6N80 / FQI6N80
Rev. A, September 2000©2000 Fairchild Semiconductor International
Package Dimensions
10.00 ±0.20
10.00 ±0.20
(8.00)
(4.40)
1.27 ±0.10 0.80 ±0.10
0.80 ±0.10
(2XR0.45)
9.90 ±0.20 4.50 ±0.20
0.10 ±0.15
2.40 ±0.20
2.54 ±0.30
15.30 ±0.30
9.20 ±0.20
4.90 ±0.20
1.40 ±0.20
2.00 ±0.10
(0.75)
(1.75)
(7.20)
0°~3°
1.20 ±0.20
9.20 ±0.20
15.30 ±0.30
4.90 ±0.20
(0.40)
2.54 TYP 2.54 TYP
1.30 +0.10
–0.05
0.50 +0.10
–0.05
D2PAK
©2000 Fairchild Semiconductor International
FQB6N80 / FQI6N80
Rev. A, September 2000
Package Dimensions (Continued)
9.90 ±0.20
2.40 ±0.20
4.50 ±0.20
1.27 ±0.10 1.47 ±0.10
(45°)
0.80 ±0.10
10.00 ±0.20
2.54 TYP2.54 TYP
13.08 ±0.20
9.20 ±0.20
1.20 ±0.20
10.08 ±0.20 MAX13.40
MAX 3.00
(0.40)
(1.46)
(0.94)
1.30 +0.10
0.05
0.50 +0.10
0.05
I2PAK
©2000 Fairchild Semiconductor International
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DOME
E2CMOS™
EnSigna™
FACT™
FACT Quiet Series™
FAST®
FASTr™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE
OPTOLOGIC™
OPTOPLANAR™
POP™
PowerTrench®
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL.
As used herein:
1. Life support devices or systems are devic es or syst em s
which, (a) ar e intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production T his datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconduct or reserv es the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. F1
VCX™