TL082BCDR**CH-AST - TEXAS INSTRUMENTS

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

The SY88773V low-power, limiting post amplifier is

designed for use in fiber optic receivers. The device connects

to typical transimpedance amplifiers (TIAs). The linear signal

output from TIAs can contain significant amounts of noise

and may vary in amplitude over time. The SY88773V

quantizes these signals and outputs typically 800mVPP

voltage-limited waveforms.

The SY88773V operates from a single +3.3V ±10% or

+5V ±10% power supply, over an industrial temperature

range of –40°C to +85°C. With its wide bandwidth and high

gain, signals with data rates up to 3.2Gbps and as small as

10mVpp can be amplified to drive devices with CML inputs

or AC-coupled PECL inputs.

The SY88773V incorporates a loss-of-signal (LOS), open-

collector TTL output with internal 4.75kΩ pull-up resistor. A

programmable, loss-of-signal level set pin (LOSLVL) sets

the sensitivity of the input amplitude detection. LOS asserts

high if the input amplitude falls below the threshold set by

LOSLVL and de-asserts low otherwise. LOS can be fed

back to the enable (/EN) input to maintain output stability

under a loss-of-signal condition. /EN de-asserts the true

output signal without removing the input signal. Typically

4.6dB LOS hysteresis is provided to prevent chattering.

Please see Micrel’s website at www.micrel.com for a

complete selection of optical module ICs. The following table

summarizes the differences between devices in Micrel’s

latest family of Limiting Amplifiers.

All support documentation can be found on Micrel’s web

site at www.micrel.com.

Integrated 50ΩLOS Active LOW

Part Number Input Termination or SD or HIGH Enable

SY88773V No LOS LOW

SY88823V No SD HIGH

SY88843V Yes SD HIGH

SY88973V Yes LOS LOW

Table 1. Limiting Amplifiers Selection Guide

DESCRIPTION

■Multi-rate up to 3.2Gbps operation

■Wide gain-bandwidth product

•38dB differential gain

•2GHz 3dB bandwidth

■ Low noise 50Ω CML data outputs

•800mVPP output swing

•60ps edge rates

•5ps(RMS) typ. random jitter

•15ps(PP) typ. deterministic jitter

■Chatter-free, Loss-of-Signal (LOS) output

•4.6dB electrical hysteresis

•OC-TTL output with internal 4.75kΩ pull-up

resistor

■Programmable LOS sensitivity using single external

resistor

■Integrated input bias reference

■TTL /EN input allows feedback from LOS

■Wide operating range

•Single 3.3V ±10% or 5V ±10% power supply

•–40°C to +85°C industrial temperature range

■Available in tiny 10-pin EPAD-MSOP and

16-pin MLF™ packages

FEATURES

3.3V/5V 3.2Gbps CML

LOW-POWER LIMITING POST

AMPLIFIER WITH TTL LOS SY88773V

APPLICATIONS

■1.25Gbps and 2.5Gbps Gigabit Ethernet

■1.062Gbps and 2.125Gbps Fibre Channel

■155Mbps, 622Gbps, 1.25Gbps, and 2.5Gbps SONET/

SDH

■Gigabit interface converter (GBIC)

■Small form factor (SFF) and small form factor

pluggable (SFP) transceivers

■Parallel 10G Ethernet

■High-gain line driver and line receiver

Rev.: C Amendment: /0

Issue Date: November 2005

Micro

LeadFrame and MLF are trademarks of Amkor Technology

TYPICAL PERFORMANCE

3.3V, 25°C, 10mV

Input

@3.2Gbps 2

–1 PRBS, R

LOAD

= 50Ω to V

TIME (50ps/div.)

Output Swing

(75mV/div.)

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

FUNCTIONAL BLOCK DIAGRAM

Limiting

Amplifer CML

Buffer

GND

Level

Detect

/EN

LOS

DIN

/DIN

REF

LOSLVL

DOUT

/DOUT

OC-TTL

Buffer

2.8kΩ4.75kΩ

VCC

REF

Generator

TTL

Buffer

25kΩ

VCC

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

Pin Number Pin Number

(MSOP) (MLF™) Pin Name Type Pin Function

1 15 /EN TTL Input: Enable: De-asserts true data output when high.

Default is high. Incorporates 25kΩ pull-up to VCC.

2, 3 1, 4 DIN, /DIN Differential Differential Data Input. Inputs must be biased to meet

Data Input common-mode range.

4 6 REF Reference Voltage: Bypass with 0.01µF low ESR

capacitor from REF to VCC to stabilize LOSLVL and REF.

5 14 LOSLVL Input: Loss-of-Signal Level Set: A resistor from this pin to VCC

Default is sets the threshold for the data input amplitude at which the

maximum sensitivity. LOS output will be asserted.

6 2, 3, 10, 11 GND Ground Device Ground. Exposed pad must be soldered

Exposed Pad Exposed Pad (or equivalent) to the same potential as the ground pins.

7 7 LOS Open Collector Loss-of-Signal: Asserts high when the data input

TTL Output with amplitude falls below the threshold set by LOSLVL.

internal 4.75kΩ

pull-up resistor

8, 9 9, 12 DOUT, /DOUT Differential Differential Data Output.

CML Output

10 5, 8, 13, 16 VCC Power Supply Positive Power Supply. Bypass with 0.1µF0.01µF low

ESR capacitors. 0.01µF capacitors should be as close as

possible to VCC pins.

PIN DESCRIPTION

16 15 14 13

5678

DIN

GND

/DIN

DOUT

GND

/DOUT

VCC

LOSLVL

/EN

VCC

LOS

REF

VCC

16-Pin MLF (MLF-16)

1/EN

DIN

/DIN

REF

LOSLVL

10 VCC

DOUT

/DOUT

LOS

GND

10-Pin EPAD-MSOP (K10-2)

PACKAGE/ORDERING INFORMATION

Ordering Information(1)

Package Operating Package Lead

Part Number Type Range Marking Finish

SY88773VKI K10-2 Industrial 773V Sn-Pb

SY88773VKITR(2) K10-2 Industrial 773V Sn-Pb

SY88773VMI MLF-16 Industrial 773V Sn-Pb

SY88773VMITR(2) MLF-16 Industrial 773V Sn-Pb

SY88773VEY(3) K10-2 Industrial 773V with Pb-Free

Pb-Free bar-line indicator Matte-Sn

SY88773VEYTR(2, 3) K10-2 Industrial 773V with Pb-Free

Pb-Free bar-line indicator Matte-Sn

SY88773VMG(3) MLF-16 Industrial 773V with Pb-Free

Pb-Free bar-line indicator NiPdAu

SY88773VMGTR(2, 3) MLF-16 Industrial 773V with Pb-Free

Pb-Free bar-line indicator NiPdAu

Notes:

1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.

2. Tape and Reel.

3. Pb-Free package is recommended for new designs.

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

Absolute Maximum Ratings(1)

Supply Voltage (VCC) ....................................... 0V to +7.0V

/EN, LOSLVL Voltage ............................................0 to VCC

REF Current ...............................................................±1mA

LOS Current ...............................................................±5mA

DOUT, /DOUT Current.............................................±25mA

DIN, /DIN Current.....................................................±10mA

Storage Temperature (TS) .......................–65°C to +150°C

Lead Temperature (soldering, 20 sec.) ................... +260°C

Operating Ratings(2)

Supply Voltage (VCC) ..............................+3.0V to +3.6V or

............................................................ +4.5V to +5.5V

Ambient Temperature (TA).........................–40°C to +85°C

Junction Temperature (TJ) .......................–40°C to +120°C

Package Thermal Resistance(3)

MLF™

θJA (Still-Air).....................................................61°C/W

ψJB ................................................................................... 38°C/W

EPAD-MSOP

θJA (Still-Air).....................................................38°C/W

ψJB ................................................................................... 22°C/W

VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C; typical values at VCC = 3.3V, TA = 25°C.

Symbol Parameter Condition Min Typ Max Units

ICC Power Supply Current 3.3V, Note 4 28 42 mA

5V, Note 4 30 45 mA

Power Supply Current 3.3V, Note 5 45 62 mA

5V, Note 5 47 65 mA

VREF REF Voltage VCC–1.3 V

VLOSLVL LOSLVL Voltage Range VREF VCC V

VOH DOUT, /DOUT HIGH Voltage Note 6 VCC–0.020 VCC–0.005 VCC V

VOL DOUT, /DOUT LOW Voltage 3.3V, Note 6 VCC–0.475 VCC–0.400 VCC–0.350 V

5V, Note 6 VCC–0.510 VCC–0.400 VCC–0.350 V

VOFFSET Differential Output Offset Note 6 ±80 mV

ZOSingle-Ended Output Impedance 40 50 60 Ω

VIHCMR Input Common Mode Range Note 7 GND+2.15 VCC V

DC ELECTRICAL CHARACTERISTICS

VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C.

Symbol Parameter Condition Min Typ Max Units

VOH LOS Output HIGH Level Sourcing 100µA 2.4 VCC V

VOL LOS Output LOW Level Sinking 2mA 0.5 V

VIH /EN Input HIGH Voltage 2.0 V

VIL /EN Input LOW Voltage 0.8 V

IIH /EN Input HIGH Current VIN = 2.7V 20 µA

VIN = VCC 100 µA

IIL /EN Input LOW Current VIN = 0.5V –0.3 mA

Notes:

1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied

at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Ratlng conditions for extended

periods may affect device reliability.

2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.

3. Thermal performance assumes the use of 4-layer PCB. Exposed pad must be soldered (or equivalent) to the device's most negative potential on the

PCB.

4. Excludes current of CML output stage. See “Detailed Description.”

5. Total device current with no output load.

6. Output levels are based on a 50Ω to VCC load impedance. If the load impedance is different, the output level will be changed. Amplifier is in limiting

mode.

7. The VIHCMR range is referenced to the most positive side of the differential input signal.

TTL DC ELECTRICAL CHARACTERISTICS

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

VCC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C, RLOAD = 50Ω to VCC; typical values at VCC = 3.3V, TA = 25°C.

Symbol Parameter Condition Min Typ Max Units

PSRR Power Supply Rejection Ratio 35 dB

tr,tfOutput Rise/Fall Time Note 8 60 120 ps

(20% to 80%)

tJITTER Deterministic Note 9 15 psPP

Random 5ps

RMS

VID Differential Input Voltage Swing 10 1800 mVPP

VOD Differential Output Voltage Swing 3.3V, Note 8 700 800 950 mVPP

5V, Note 8 700 800 1020 mVPP

HYS LOS Hysteresis Note 10 2 4.6 8 dB

tOFF LOS Release Time 0.1 0.5 µs

tON LOS Assert Time 0.2 0.5 µs

VSR LOS Sensitivity Range Note 11 10 35 mVPP

B–3dB –3dB Bandwidth 2.0 GHz

AV(Diff) Differential Voltage Gain 32 38 dB

S21 Single-Ended Small-Signal Gain 26 32 dB

Notes:

8. Amplifier in limiting mode. Input is a 200MHz square wave, tr < 300ps.

9. Deterministic jitter measured using 2.488Gbps K28.5 pattern, VID = 10mVPP. Random jitter measured using 2.488Gbps K28.7 pattern, VID = 10mVPP.

10. Electrical signal.

11. This is the detectable range of input amplitudes that can assert LOS. The input amplitude to de-assert LOS is 2–8dB higher than the assert

amplitude. See “Typical Operating Characteristics” for graphs showing how to choose a particular VLOSLVL or RLOSLVL for a particular LOS assert,

and its associated de-assert, amplitude. If increased LOS sensitivity and hysteresis are required, an application note entitled “Notes on Sensitivity

and Hysteresis in Micrel Post Amplifiers” is available at http://www.micrel.com/product-info/app_hints+notes.shtml.

AC ELECTRICAL CHARACTERISTICS

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

TYPICAL OPERATING CHARACTERISTICS

100

0 0.2 0.4 0.6 0.8 1.0 1.2

VID (mVpp)

VCC – VLOSLVL (V)

VID to Assert/De-assert LOS

vs. VLOSLVL

100

0.1 1 10 100

VID (mVpp)

RLOSLVL(kΩ)

VID to Assert/De-assert LOS

vs. RLOSLVL

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

S21 (dB)

FREQUENCY (GHz)

Single-Ended Small-Signal

Gain vs. Frequency

-40 -15 10 35 60 85

CURRENT (mA)

TEMPERATURE (°C)

Power Supply Current

vs. Temperature

700

720

740

760

780

800

820

840

860

880

900

-40 -15 10 35 60 85

VOD (mVpp)

TEMPERATURE (°C)

Differential Output Voltage

Swing vs. Temperature

(Amplifier in Limiting Mode)

100

200

300

400

500

600

700

800

900

0 5 10 15 20 25 30 35 40 45 50

VOD (mVpp)

VID (mVpp)

Differential Output Voltage Swing

vs. Differential Input Voltage Swing

VCC = 3.3V, TA = 25°C, RLOAD = 50Ω to VCC, unless otherwise stated.

10mVpp Input @3.2Gbps 231–1 PRBS

TIME (50ps/div.)

Output Swing

(75mV/div.)

1.8Vpp Input @3.2Gbps 231–1 PRBS

TIME (50ps/div.)

Output Swing

(75mV/div.)

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

DETAILED DESCRIPTION

The SY88773V low-power, limiting post amplifier operates

from a single +3.3V or +5V power supply, over temperatures

from –40°C to +85°C. Signals with data rates up to 3.2Gbps

and as small as 10mVpp can be amplified. Figure 1 shows

the allowed input voltage swing. The SY88773V generates

an LOS output, providing feedback to /EN for output stability.

LOSLVL sets the sensitivity of the input amplitude detection.

Input Amplifier/Buffer

The SY88773V input is designed for VREF as its nominal

DC bias point. If AC-coupling to the SY88773V, REF can

be used as the DC bias point by externally connecting the

inputs through appropriate termination resistors to REF. If

DC-coupling to the SY88773V, ensure the upstream device’s

output swing meets the SY88773V’s common mode range.

Figure 2 shows a simplified schematic of the input structure.

The high-sensitivity of the input amplifier detects and

amplifies signals as small as 10mVpp. The input amplifier

allows input signals as large as 1800mVpp. Input signals

are linearly amplified with a typically 38dB differential voltage

gain. Since it is a limiting amplifier, the SY88773V outputs

typically 800mVpp voltage-limited waveforms for input signals

that are greater than 10mVpp. Applications requiring the

SY88773V to operate with high-gain should have the

upstream TIA placed as close as possible to the SY88773V’s

input pins to ensure the device’s best performance.

Output Buffer

The SY88773V’s CML output buffer is designed to drive

50Ω lines. The output buffer requires appropriate termination

for proper operation. An external 50Ω resistor to VCC or

equivalent for each output pin provides appropriate output

buffer termination. Figure 3 shows a simplified schematic of

the output structure and includes an appropriate termination

method. Of course, driving a downstream device with a

CML input that is internally terminated with 50Ω to VCC

eliminates the need for external termination. As noted in

the previous section, the amplifier outputs, typically 800mVpp,

waveforms across 25Ω total loads. The output buffer, thus,

switches typically 16mA tail-current. Figure 4 shows the

power supply current measurement which excludes the

16mA tail-current.

Loss-of-Signal

The SY88773V incorporates a chatter-free, LOS open-

collector TTL output with internal 4.75kΩ pull-up resistor as

shown in Figure 5. LOS is used to determine that the input

amplitude is too small to be considered a valid input. LOS

asserts high if the input amplitude falls below the threshold

set by LOSLVL and de-asserts low otherwise. LOS can be

fed back to the enable (/EN) input to maintain output stability

under a loss-of-signal condition. /EN de-asserts low the

true output signal without removing the input signals.

Typically, 4.6dB LOS hysteresis is provided to prevent

chattering.

Loss-of-Signal Level Set

A programmable, loss-of-signal level set pin sets the

threshold of the input amplitude detection. Connecting an

external resistor between VCC and LOSLVL sets the voltage

at LOSLVL. This voltage ranges from VCC to VREF. The

external resistor creates a voltage divider between VCC

and REF as shown in Figure 6. If desired, an appropriate

external voltage may be applied rather than using a resistor.

The relationship between VLOSLVL and RLOSLVL is given by:

VV–R

R+

LOSLVL CC LOSLVL

LOSLVL

=13 28

where voltages are in volts and resistances are in kΩ.

The smaller the external resistor, which implies a smaller

voltage difference from LOSLVL to VCC, the lower the LOS

sensitivity. Hence, larger input amplitude is required to de-

assert LOS. The “Typical Operating Characteristics” section

contains graphs showing the relationship between the input

amplitude detection sensitivity and VLOSLVL or RLOSLVL.

Hysteresis

The SY88773V provides typically 4.6dB LOS electrical

hysteresis. By definition, a power ratio measured in dB is

10log(power ratio). Power is calculated as V2IN/R for an

electrical signal. Hence, the same ratio can be stated as

20log(voltage ratio). While in linear mode, the electrical

voltage input changes linearly with the optical power and,

hence, the ratios change linearly. Therefore, the optical

hysteresis in dB is half the electrical hysteresis in dB given

in the datasheet. The SY88773V provides typically 2.3dB

LOS optical hysteresis. As the SY88773V is an electrical

device, this datasheet refers to hysteresis in electrical terms.

With 4.6dB LOS hysteresis, a voltage factor of 1.7 is required

to de-assert LOS.

Hysteresis and Sensitivity Improvement

If increased LOS sensitivity and hysteresis are required,

an application note entitled “Notes on Sensitivity and

Hysteresis in Micrel Post Amplifiers” is available at http://

www.micrel.com/product-info/app_hints+notes.shtml.

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

DATA+ 5mV (Min.)

900mV (Max.)

10mV

(Min.)

1800mV

(Max.)

DATA–

(DATA+) – (DATA–)

(mV)

(mV

)

Figure 1. VIS and VID Definition

GND

VCC

ESD

STRUCTURE

DIN

Figure 2. Input Structure

50Ω

GND

VCC

16mA

/DOUT

AC-Coupling

Capacitors

= 50Ω

VCC

50Ω50Ω

50Ω

ESD

STRUCTURE

DOUT 0.1µF

Figure 3. Output Structure

50Ω

GND

16mA

50Ω

VCC

16mA

ICC

ESD

STRUCTURE

Figure 4. Power Supply Current Measurement

LOS

4.75kΩ

Figure 5. LOS Output Structure

LOSLVL

VCC

REF

2.8kΩ

Figure 6. LOSLVL Setting Circuit

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

TYPICAL APPLICATIONS CIRCUIT

/EN

GND

CDR

SY88773V

100kΩ0.1µF

From

Transimpedance

Amp.

DOUT

/DOUT

LOSLVL

DIN

/DIN

0.1µF

LOS

50Ω50ΩREF

Part Number Function Data Sheet Link

SY88773V 3.3V/5V 3.2Gbps CML Low-Power, http://www.micrel.com/_PDF/HBW/sy88773v.pdf

Limiting Post Amplifier w/ TTL LOS

SY88823V 3.3V/5V 3.2Gbps CML Low-Power, http://www.micrel.com/_PDF/HBW/sy88823v.pdf

Limiting Post Amplifier w/ TTL SD

SY88843V 3.3V/5V 3.2Gbps CML Low-Power, http://www.micrel.com/_PDF/HBW/sy88843v.pdf

Limiting Post Amplifier w/ TTL SD

SY88973V 3.3V/5V 3.2Gbps CML Low-Power, http://www.micrel.com/_PDF/HBW/sy88973v.pdf

Limiting Post Amplifier w/ TTL LOS

Application Notes Notes on Sensitivity and Hysteresis http://www.micrel.com/product-info/app_hints+notes.shtml

in Micrel Post Amplifiers

RELATED PRODUCT AND SUPPORT DOCUMENTATION

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

10 LEAD EPAD-MSOP (K10-2)

Rev.01

+0.05

-0.05

+0.002

-0.002

+0.08

-0.08

+0.003

-0.003

+0.15

-0.15

+0.004

-0.004

+0.008

-0.008

+0.003

-0.003

+0.07

-0.08

+0.003

-0.003

+0.10

-0.10

+0.004

-0.004

+0.15

-0.15

+0.006

-0.006

SY88773V

Micrel, Inc.

M9999-110905

hbwhelp@micrel.com or (408) 955-1690

16-PIN

Micro

LEADFRAME™ (MLF-16)

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com

The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.

Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can

reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into

the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s

use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify

Micrel for any damages resulting from such use or sale.

Package

EP- Exposed Pad

Die

CompSide Island

Heat Dissipation

Heavy Copper Plane

Heat Dissipation

PCB Thermal Consideration for 16-Pin MLF™ Package

(Always solder, or equivalent, the exposed pad to the PCB)

Package Notes:

1. Package meets Level 2 qualification.

2. All parts are dry-packaged before shipment.

3. Exposed pads must be soldered to a ground for proper thermal management.