1
Motorola TMOS Power MOSFET Transistor Device Data
N–Channel Enhancement Mode
Silicon Gate TMOS E–FET
t
SOT–223 for Surface Mount
This advanced E–FET is a TMOS power MOSFET designed to
withstand high energy in the avalanche and commutation modes.
This device is also designed with a low threshold voltage so it is
fully enhanced with 5 Volts. This new energy efficient device also
offers a drain–to–source diode with a fast recovery time. Designed
for low voltage, high speed switching applications in power
supplies, converters and PWM motor controls, these devices are
particularly well suited for bridge circuits where diode speed and
commutating safe operating areas are critical and offer additional
safety margin against unexpected voltage transients. The device is
housed in the SOT–223 package which is designed for medium
power surface mount applications.
•Silicon Gate for Fast Switching Speeds
•Low Drive Requirement to Interface Power Loads to Logic
Level ICs, VGS(th) = 2 Volts Max
•Low RDS(on) — 0.18 Ω max
•The SOT–223 Package can be Soldered Using Wave or Re-
flow. The Formed Leads Absorb Thermal Stress During Sol-
dering, Eliminating the Possibility of Damage to the Die
•Available in 12 mm Tape and Reel
Use MMFT3055ELT1 to order the 7 inch/1000 unit reel.
Use MMFT3055ELT3 to order the 13 inch/4000 unit reel.
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Symbol Value Unit
Drain–to–Source Voltage VDS 60
Vdc
Gate–to–Source Voltage — Continuous VGS ±15
Vdc
Drain Current — Continuous
Drain Current — Pulsed ID
IDM 1.5
6Adc
Total Power Dissipation @ TA = 25°C
Derate above 25°CPD(1) 0.8
6.4 Watts
mW/°C
Operating and Storage Temperature Range TJ, Tstg –65 to 150 °C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 V, VGS = 5 V, Peak IL= 1.5 A, L = 0.2 mH, RG = 25 Ω)EAS 178 mJ
DEVICE MARKING
3055L
THERMAL CHARACTERISTICS
Thermal Resistance — Junction–to–Ambient (surface mounted) RθJA 156 °C/W
Maximum Temperature for Soldering Purposes,
Time in Solder Bath TL260
5°C
Sec
(1) Power rating when mounted on FR–4 glass epoxy printed circuit board using recommended footprint.
TMOS is a registered trademark of Motorola, Inc.
E–FET is a trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 3
Order this document
by MMFT3055EL/D
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
MEDIUM POWER
LOGIC LEVEL TMOS FET
1.5 AMP
60 VOLTS
RDS(on) = 0.18 OHM
Motorola Preferred Device
CASE 318E–04, STYLE 3
TO–261AA
D
S
G
2,4
3
1
123
4
MMFT3055EL
2Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage, (VGS = 0, ID = 250 µA) V(BR)DSS 60 — — Vdc
Zero Gate Voltage Drain Current, (VDS = 60 V, VGS = 0) IDSS — — 10 µAdc
Gate–Body Leakage Current, (VGS = 15 V, VDS = 0) IGSS — — 100 nAdc
ON CHARACTERISTICS
Gate Threshold Voltage, (VDS = VGS, ID = 1.0 mA) VGS(th) 1 — 2 Vdc
Static Drain–to–Source On–Resistance, (VGS = 5 V, ID = 0.75 A) RDS(on) — — 0.18 Ohms
Drain–to–Source On–Voltage, (VGS = 5 V, ID = 1.5 A) VDS(on) — — 0.36 Vdc
Forward Transconductance, (VDS = 15 V, ID = 0.75 A) gFS — 2.1 — mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 V,
VGS = 0,
f = 1 MHz)
Ciss — 500 —
pF
Output Capacitance
(VDS = 25 V,
VGS = 0,
f = 1 MHz)
Coss — 175 —
pF
Reverse Transfer Capacitance
f = 1 MHz)
Crss — 40 —
SWITCHING CHARACTERISTICS
Turn–On Delay Time
(VDD= 25 V, ID = 6 A
VGS = 5 V, RG = 50 ohms,
RGS = 25 ohms)
td(on) — 20 —
ns
Rise Time
(VDD= 25 V, ID = 6 A
VGS = 5 V, RG = 50 ohms,
RGS = 25 ohms)
tr— 95 —
ns
Turn–Off Delay Time
VGS = 5 V, RG = 50 ohms,
RGS = 25 ohms)
td(off) — 38 —
ns
Fall Time
GS = 25 ohms)
tf— 50 —
Total Gate Charge
(VDS = 48 V, ID = 1.5 A,
VGS = 5 Vdc)
See Figures 15 and 16
Qg— 7 15
nC
Gate–Source Charge
(VDS = 48 V, ID = 1.5 A,
VGS = 5 Vdc)
See Figures 15 and 16
Qgs — 1.3 —
nC
Gate–Drain Charge
See Figures 15 and 16
Qgd — 6.3 —
SOURCE DRAIN DIODE CHARACTERISTICS(1)
Forward On–Voltage IS = 1.5 A, VGS = 0 VSD — 1.0 — Vdc
Forward Turn–On Time
IS = 1.5 A, VGS = 0,
dlS/dt = 400 A/µs,
VR = 30 V
ton Limited by stray inductance
Reverse Recovery Time
dlS/dt = 400 A/µs,
VR = 30 V
trr — 55 — ns
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%
MMFT3055EL
3
Motorola TMOS Power MOSFET Transistor Device Data
RDS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS)RDS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS)
RDS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS)
Figure 1. On Region Characteristics
D
I , DRAIN CURRENT (AMPS)
0 1.0 2.0 3.0 4.0 5.0
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
TJ = 25
°
C
6.0 V
5.5 V 4.5 V
5.0 V 4.0 V
3.5 V
3.0 V
VGS = 2.5 V
GS(TH)
V , GATE THRESHOLD VOLTAGE
Figure 2. Gate–Threshold Voltage Variation
With Temperature
1.2
1.1
1.0
0.9
0.8
0.7
–50 0 50 100 150
TJ, JUNCTION TEMP (
°
C)
(NORMALIZED)
Figure 3. Transfer Characteristics
D
I , DRAIN CURRENT (AMPS)
0 2.0 4.0 6.0 7.0
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
TJ = –55
°
C25
°
C
Figure 4. On–Resistance versus Drain Current
0 1.0 2.0 3.0 4.0
ID, DRAIN CURRENT (AMPS)
Figure 5. On–Resistance versus
Gate–to–Source Voltage
2.0 3.0 4.0 5.0 6.0 7.0
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
TJ = 25
°
C
ID = 1.5 A
8.0
0.1
0.2
0.3
0.4
0.5
0
Figure 6. On–Resistance versus
Junction Temperature
0.4
0.3
0.2
0.1
0
–50 0 50 100 150
TJ, JUNCTION TEMP (
°
C)
VGS = 5 V
ID = 1.5 A
0
0.05
0.10
0.15
0.20
0.25
0.30
TJ = 100
°
C
55
°
C
25
°
C
VDS = 8 V VGS = 5 V
VDS = VGS
ID = 1.0 mA
10
8.0
6.0
4.0
2.0
0
10
8.0
6.0
4.0
2.0
0
100
°
C
MMFT3055EL
4Motorola TMOS Power MOSFET Transistor Device Data
FORWARD BIASED SAFE OPERATING AREA
The FBSOA curves define the maximum drain–to–source
voltage and drain current that a device can safely handle
when it is forward biased, or when it is on, or being turned on.
Because these curves include the limitations of simultaneous
high voltage and high current, up to the rating of the device,
they are especially useful to designers of linear systems. The
curves are based on an ambient temperature of 25°C and a
maximum junction temperature of 150°C. Limitations for re-
petitive pulses at various ambient temperatures can be de-
termined by using the thermal response curves. Motorola
Application Note, AN569, “Transient Thermal Resistance–
General Data and Its Use” provides detailed instructions.
SWITCHING SAFE OPERATING AREA
The switching safe operating area (SOA) is the boundary
that the load line may traverse without incurring damage to
the MOSFET. The fundamental limits are the peak current,
IDM and the breakdown voltage, BVDSS. The switching SOA
is applicable for both turn–on and turn–off of the devices for
switching times less than one microsecond.
Figure 7. Maximum Rated Forward Biased
Safe Operating Area
D
I , DRAIN CURRENT (AMPS)
1.0
0.1
0.01
0.1 10 100
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
10
VGS = 15 V
SINGLE PULSE
TA = 25
°
C
1 s
20 ms
100 ms
DC
500 ms
1.0
RDS(on) LIMIT
THERMAL LIMIT
1.0
0.1
0.001
r(t), EFFECTIVE THERMAL RESISTANCE
t, TIME (s)
0.1
0.01
0.2
0.02
0.01
D = 0.5
SINGLE PULSE
(NORMALIZED)
0.05 R
θ
JA(t) = r(t) R
θ
JA
R
θ
JA = 156
°
C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) R
θ
JA(t)
P(pk)
t1t2
DUTY CYCLE, D = t1/t2
Figure 8. Thermal Response
1.0E–05 1.0E–04 1.0E–03 1.0E–02 1.0E–01 1.0E+00 1.0E+01
COMMUTATING SAFE OPERATING AREA (CSOA)
The Commutating Safe Operating Area (CSOA) of Figure 10 defines the limits of safe operation for commutated source–drain
current versus re–applied drain voltage when the source–drain diode has undergone forward bias. The curve shows the limita-
tions of IFM and peak VDS for a given rate of change of source current. It is applicable when waveforms similar to those of Figure
9 are present. Full or half–bridge PWM DC motor controllers are common applications requiring CSOA data.
Device stresses increase with increasing rate of change of source current so dIS/dt is specified with a maximum value. Higher
values of dIS/dt require an appropriate derating of IFM, peak VDS or both. Ultimately dIS/dt is limited primarily by device, package,
and circuit impedances. Maximum device stress occurs during trr as the diode goes from conduction to reverse blocking.
VDS(pk) is the peak drain–to–source voltage that the device must sustain during commutation; IFM is the maximum forward
source–drain diode current just prior to the onset of commutation.
VR is specified at 80% rated BVDSS to ensure that the CSOA stress is maximized as IS decays from IRM to zero.
RGS should be minimized during commutation. TJ has only a second order effect on CSOA.
Stray inductances in Motorola’s test circuit are assumed to be practical minimums. dVDS/dt in excess of 10 V/ns was at-
tained with dIS/dt of 400 A/µs.
MMFT3055EL
5
Motorola TMOS Power MOSFET Transistor Device Data
RG
t
VDS
L
IL
VDD
Figure 9. Commutating Waveforms
tP
BVDSS
VDD
IL(t)
t, (TIME)
Figure 10. Commutating Safe Operating Area (CSOA)
15 V VGS
0
90% IFM dlS/dt
IS
10% trr
tfrr 0.25 IRM
IRM
ton
VDS VfVdsL
VR
VDS(pk)
MAX. CSOA
STRESS AREA
Figure 11. Commutating Safe Operating Area
Test Circuit
S
I , SOURCE CURRENT (AMPS)
Figure 12. Unclamped Inductive Switching
Test Circuit
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
+
–
+
–
Figure 13. Unclamped Inductive Switching
Waveforms
VR
VGS
IFM
20 V
RGS DUT
ISLi
VR = 80% OF RATED VDSS
VdsL = Vf + Li
⋅
dlS/dt
0 20 40 60 80
0
2.0
4.0
6.0
8.0
10
VDS
MMFT3055EL
6Motorola TMOS Power MOSFET Transistor Device Data
VGS VDS
Figure 14. Capacitance Variation With Voltage
SAME
DEVICE TYPE
AS DUT
Vin
+18 V VDD
5 V 100 k
0.1
µ
F
FERRITE
BEAD DUT
100
2N3904
2N3904
47 k
15 V
100 k
Vin = 15 Vpk; PULSE WIDTH
≤
100
µ
s, DUTY CYCLE
≤
10%.
1 mA
47 k
1000
800
200
400
600
0205 0 5 10 15
Figure 15. Gate Charge versus
Gate–To–Source Voltage
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
Crss
Ciss
Coss
Figure 16. Gate Charge Test Circuit
, GATE–TO–SOURCE VOLTAGE (VOLTS)
GS
V
1200
1400
1600
0 2.5 7.5 12.5 17.5 22.5
0
2.0
4.0
6.0
8.0
10 TJ = 25
°
C
VDS = 48 V
ID = 1.5 A
Qg, TOTAL GATE CHARGE (nC)
TJ = 25
°
C
VGS = 0
1800
1015
Ciss
Crss
Coss
VDS = 0
MMFT3055EL
7
Motorola TMOS Power MOSFET Transistor Device Data
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must be
the correct size to insure proper solder connection interface
between the board and the package. With the correct pad
geometry, the packages will self align when subjected to a
solder reflow process.
SOT–223
0.079
2.0
0.15
3.8
0.248
6.3
0.079
2.0
0.059
1.5 0.059
1.5 0.059
1.5
0.091
2.3
0.091
2.3
mm
inches
SOT–223 POWER DISSIPATION
The power dissipation of the SOT–223 is a function of the
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined by
TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from the
device junction to ambient, and the operating temperature, TA.
Using the values provided on the data sheet for the SOT–223
package, PD can be calculated as follows:
PD = TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25°C, one can
calculate the power dissipation of the device which in this case
is 800 milliwatts.
PD = 150°C – 25°C
156°C/W = 800 milliwatts
The 156°C/W for the SOT–223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 800 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–223 package. One is to increase the area of the
drain pad. By increasing the area of the drain pad, the power
dissipation can be increased. Although one can almost double
the power dissipation with this method, one will be giving up
area on the printed circuit board which can defeat the purpose
of using surface mount technology. A graph of RθJA versus
drain pad area is shown in Figure 17.
R , Thermal Resistance, Junction
to Ambient ( C/W)
θ
JA
°
A, Area (square inches)
0.0 0.2 0.4 0.6 0.8 1.0
160
140
120
100
80
Figure 17. Thermal Resistance versus Drain Pad
Area for the SOT–223 Package (Typical)
Board Material = 0.0625
″
G–10/FR–4, 2 oz Copper TA = 25
°
C
0.8 Watts
1.25 Watts* 1.5 Watts
*Mounted on the DPAK footprint
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
MMFT3055EL
8Motorola TMOS Power MOSFET Transistor Device Data
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass or
stainless steel with a typical thickness of 0.008 inches. The
stencil opening size for the SOT–223 package should be the
same as the pad size on the printed circuit board, i.e., a 1:1
registration.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•Always preheat the device.
•The delta temperature between the preheat and soldering
should be 100°C or less.*
•When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
•The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
•After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•Mechanical stress or shock should not be applied during
cooling
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones, and a figure
for belt speed. Taken together, these control settings make up
a heating “profile” for that particular circuit board. On
machines controlled by a computer , the computer remembers
these profiles from one operating session to the next. Figure
18 shows a typical heating profile for use when soldering a
surface mount device to a printed circuit board. This profile will
vary among soldering systems but it is a good starting point.
Factors that can affect the profile include the type of soldering
system in use, density and types of components on the board,
type of solder used, and the type of board or substrate material
being used. This profile shows temperature versus time. The
line on the graph shows the actual temperature that might be
experienced on the surface of a test board at or near a central
solder joint. The two profiles are based on a high density and
a low density board. The Vitronics SMD310 convection/in-
frared reflow soldering system was used to generate this
profile. The type of solder used was 62/36/2 Tin Lead Silver
with a melting point between 177–189°C. When this type of
furnace is used for solder reflow work, the circuit boards and
solder joints tend to heat first. The components on the board
are then heated by conduction. The circuit board, because it
has a large surface area, absorbs the thermal energy more
efficiently, then distributes this energy to the components.
Because of this effect, the main body of a component may be
up to 30 degrees cooler than the adjacent solder joints.
STEP 1
PREHEAT
ZONE 1
“RAMP”
STEP 2
VENT
“SOAK”
STEP 3
HEATING
ZONES 2 & 5
“RAMP”
STEP 4
HEATING
ZONES 3 & 6
“SOAK”
STEP 5
HEATING
ZONES 4 & 7
“SPIKE”
STEP 6
VENT STEP 7
COOLING
200
°
C
150
°
C
100
°
C
50
°
C
TIME (3 TO 7 MINUTES TOTAL) TMAX
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
205
°
TO 219
°
C
PEAK AT
SOLDER JOINT
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
100
°
C
150
°
C
160
°
C
170
°
C
140
°
C
Figure 18. Typical Solder Heating Profile
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
MMFT3055EL
9
Motorola TMOS Power MOSFET Transistor Device Data
PACKAGE DIMENSIONS
CASE 318E–04
TO–261AA
SOT–223
ISSUE H
STYLE 3:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
H
S
F
A
B
D
G
L
4
1 2 3
0.08 (0003)
C
MK
J
DIM
AMIN MAX MIN MAX
MILLIMETERS
0.249 0.263 6.30 6.70
INCHES
B0.130 0.145 3.30 3.70
C0.060 0.068 1.50 1.75
D0.024 0.035 0.60 0.89
F0.115 0.126 2.90 3.20
G0.087 0.094 2.20 2.40
H0.0008 0.0040 0.020 0.100
J0.009 0.014 0.24 0.35
K0.060 0.078 1.50 2.00
L0.033 0.041 0.85 1.05
M0 10 0 10
S0.264 0.287 6.70 7.30
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
_ _ _ _
MMFT3055EL
10 Motorola TMOS Power MOSFET Transistor Device Data
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability , including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “T ypicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer .
Literature Distribution Centers:
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JAPAN: Nippon Motorola Ltd.; 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan.
ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center , No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
MMFT3055EL/D
*MMFT3055EL/D*
◊
