1:2 Single-Ended, Low Cost
Active RF Splitter
ADA4303-2
Rev. 0
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
FEATURES
Ideal for CATV applications
Excellent frequency response
1.7 GHz, −3 dB bandwidth
1 dB flatness to 1.2 GHz
Low noise figure: 4.4 dB
Low distortion
Composite second order (CSO): −62 dBc
Composite triple beat (CTB): −72 dBc
1 dB compression point of 8.5 dBm
3 dB of gain per output channel
24 dB isolation between output channels
75 Ω input and outputs
Small package size
12-lead, 3 mm × 3 mm lead frame chip scale package
APPLICATIONS
Set-top boxes
Home gateways
CATV distribution systems
FUNCTIONAL BLOCK DIAGRAM
VIN
VO2
VO1
GND
VCC
0.01µF
IL
1µH
5
V
5
V
ADA4303-2
249
249
0.01µF
0.01µF
0.1µF0.1µF
06364-001
Figure 1.
Splitter modules
Digital cable ready (DCR) TVs
GENERAL DESCRIPTION
The ADA4303-2 is a 75 Ω, two-output active splitter for use
in applications where a lossless signal split is required. Typical
applications include multituner digital set-top boxes, cable
splitter modules, multituner/digital cable ready (DCR)
televisions, and home gateways where traditional solutions
require discrete passive splitter modules with separate fixed
gain amplifiers.
The ADA4303-2 is a low cost alternative that simplifies designs
and improves system performance by integrating a signal
splitter element and a gain block into a single IC. The ADA4303-2
is available in a 12-lead chip scale package (LFCSP_VQ) and
operates in the extended industrial temperature range of −40°C
to +85°C.
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
50 100 40001000
GAIN (dB)
FREQUENCY (MHz)
TA = +85°C
TA = +25°C
TA = –40°C
06364-010
Figure 2. Gain (S21) vs. Frequency
ADA4303-2
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions..............................5
Typical Performance Characteristics ..............................................6
Applications........................................................................................8
Circuit Description .......................................................................8
Evaluation Board ...........................................................................8
RF Layout Considerations............................................................8
Power Supply..................................................................................8
Outline Dimensions ..........................................................................9
Ordering Guide .............................................................................9
REVISION HISTORY
10/06—Revision 0: Initial Version
ADA4303-2
Rev. 0 | Page 3 of 12
SPECIFICATIONS
VCC = 5 V, RIN = RL = 75 Ω, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
Bandwidth (−3 dB) 1700 MHz
Specified Frequency Range 54 865 MHz
Gain (S21) f = 100 MHz 2.0 3.0 4.0 dB
1 dB Gain Flatness 1200 MHz
NOISE/DISTORTION PERFORMANCE
Noise Figure @ 54 MHz 4.0 4.3 dB
@ 550 MHz 4.3 4.9 dB
@ 865 MHz 4.4 5.1 dB
Output IP3 f1 = 97.25 MHz, f2 = 103.25 MHz 26.5 dBm
Output IP2 f1 = 97.25 MHz, f2 = 103.25 MHz 44.0 dBm
Composite Triple Beat (CTB) 135 Channels, 15 dBmV/Channel, f = 865 MHz −72 −66 dBc
Composite Second-Order (CSO) 135 Channels, 15 dBmV/Channel, f = 865 MHz −62 −60 dBc
Cross Modulation (CXM) 135 Channels, 15 dBmV/Channel, 100% modulation
@ 15.75 kHz, f = 865 MHz
−68 −65 dBc
INPUT CHARACTERISTICS
Input Return Loss (S11) Referenced to 75 Ω
@ 54 MHz −15.0 −11.5 dB
@ 550 MHz −19.5 −14.0 dB
@ 865 MHz −12.0 −7.5 dB
Output-to-Input Isolation (S12) Any output, 54 MHz to 865 MHz
@ 54 MHz −31.8 −29.0 dB
@ 550 MHz −32.0 −29.5 dB
@ 865 MHz −32.5 −30.0 dB
OUTPUT CHARACTERISTICS
Output Return Loss (S22) Referenced to 75 Ω
@ 54 MHz −31.2 −23.0 dB
@ 550 MHz −19.4 −14.0 dB
@ 865 MHz −15.5 −11.0 dB
Output-to-Output Isolation Between any two outputs, 54 MHz to 865 MHz
@ 54 MHz −24.6 dB
@ 550 MHz −24.0 dB
@ 865 MHz −24.5 dB
1 dB Compression Output referred, f = 100 MHz 8.5 dBm
POWER SUPPLY
Nominal Supply Voltage 4.5 5.0 5.5 V
Quiescent Supply Current 78 90 mA
ADA4303-2
Rev. 0 | Page 4 of 12
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage 5.5 V
Power Dissipation See Figure 3
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum
Rating may cause permanent damage to the device. This is
a stress rating only; functional operation of the device at
these or any other conditions above those indicated in the
operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions; that is, θJA is
specified for a device (including exposed pad) soldered to
the circuit board.
Table 3. Thermal Resistance
Package Type θJA Unit
12-Lead LFCSP_VQ (exposed pad) 99.2 °C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4303-2
package is limited by the associated rise in junction
temperature (TJ) on the die. At approximately 150°C, which
is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature
limit can change the stresses that the package exerts on the
die, permanently shifting the parametric performance of
the ADA4303-2. Exceeding a junction temperature of 150°C
for an extended period can result in changes in the silicon
devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the
voltage between the supply pins (VS) times the quiescent
current (IS). The power dissipated due to the load drive depends
upon the particular application. The power due to load drive is
calculated by multiplying the load current by the associated
voltage drop across the device. RMS voltages and currents must
be used in these calculations.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package
leads/exposed pad from metal traces, through-holes, ground,
and power planes reduces the θJA.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 12-lead LFCSP_VQ
(99.2°C/W) on a JEDEC standard 4-layer board.
0
–40 –20
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMPERATURE (°C)
06364-016
0.5
1.0
2.0
1.5
2.5
–60 0 20 40 60 80 100 120
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
ADA4303-2
Rev. 0 | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
NC = NO CONNECT
1VCC
2VIN
3GND
9VO1
8VO2
7GND
4
GND
5
GND
6
NC
12 VCC
11 IL
10 NC
ADA4303-2
TOP V IEW
06364-002
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 VCC Supply Pin
2 VIN Input
3 GND Ground
4 GND Ground
5 GND Ground
6 NC No Connection
7 GND Ground
8 VO2 Output 2
9 VO1 Output 1
10 NC No Connection
11 IL Bias Pin
12 VCC Supply Pin
ADA4303-2
Rev. 0 | Page 6 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
–
50
–53
–56
–59
–62
–65
–68
–71
–74
–77
–80
50 100 1000
CSO (dBc)
FREQUENCY (MHz)
T
A
= +25°C
T
A
= +85°C
T
A
= –40°C
06364-004
Figure 5. Composite Second-Order (CSO) vs. Frequency
–
60
–63
–66
–69
–72
–75
–78
–81
–84
–87
–90
50 100 1000
CTB (dBc)
FREQUENCY (MHz)
T
A
= +25°C T
A
= –40°C
06364-005
T
A
= +85°C
Figure 6. Composite Triple Beat (CTB) vs. Frequency
–
60
–63
–66
–69
–72
–75
–78
–81
–84
–87
–90
50 100 1000
CXM (dBc)
FREQUENCY (MHz)
T
A
= +25°C
T
A
= +85°C
T
A
= –40°C
06364-006
Figure 7. Cross Modulation (CXM) vs. Frequency
10
2
4
6
8
0
50 100 1000
NOISE FIGURE (dB)
FREQUENCY (MHz)
T
A
= +25°C
T
A
= +85°C
T
A
= –40°C
06364-007
Figure 8. Noise Figure vs. Frequency
60
55
50
45
40
35
30
25
20
50 100 1000
OUTPUT IP2 (dBm)
FREQUENCY (MHz)
06364-008
Figure 9. Output IP2 vs. Frequency
40
35
30
25
20
15
10
5
0
50 100 1000
OUTPUT IP3 (dBm)
FREQUENCY (MHz)
06364-009
Figure 10. Output IP3 vs. Frequency
ADA4303-2
Rev. 0 | Page 7 of 12
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
50 100 40001000
GAIN (dB)
FREQUENCY (MHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
06364-010
Figure 11. Gain (S21) vs. Frequency
–
30
–31
–32
–33
–34
–35
–36
–37
–38
–39
–40
50 100 40001000
ISOLATION (dB)
FREQUENCY (MHz)
06364-011
Figure 12. Output-to-Input Isolation (S12) vs. Frequency
0
–5
–10
–15
–20
–25
–30
–35
–40
–45
50 100 40001000
ISOLATION (dB)
FREQUENCY (MHz)
06364-012
Figure 13. Output-to-Output Isolation vs. Frequency
0
–5
–10
–15
–20
–25
–30
50 100 1000
INPUT RETURN LOSS (dB)
FREQUENCY (MHz)
06364-013
Figure 14. Input Return Loss (S11) vs. Frequency
0
–10
–20
–5
–15
–25
–30
–35
–40
50 100 1000
OUTPUT RETURN LOSS (dB)
FREQUENCY (MHz)
06364-014
Figure 15. Output Return Loss (S22) vs. Frequency
90
65
70
75
80
85
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80
QUIESCENT SUPPLY CURRENT (mA)
TEMPERATURE (°C)
06364-015
–60 –50 90 100
Figure 16. Quiescent Supply Current vs. Temperature
ADA4303-2
Rev. 0 | Page 8 of 12
APPLICATIONS
The ADA4303-2 active splitter is primarily intended for use
in the downstream path of television set-top boxes (STBs) that
contain multiple tuners. It is typically located directly after the
diplexer in a CATV customer premise unit. The ADA4303-2
provides a single-ended input and two single-ended outputs
that allow the delivery of the RF signal to two different signal
paths. These paths can include, but are not limited to, a main
picture tuner, a picture-in-picture (PIP) tuner, an out-of-band
(OOB) tuner, a digital video recorder (DVR), and a cable
modem (CM).
The ADA4303-2 exhibits composite second-order (CSO) and
composite triple beat (CTB) products that are −62 dBc and
−72 dBc, respectively. The use of the SiGe process also allows
the ADA4303-2 to achieve a noise figure (NF) of less than 4.5 dB.
CIRCUIT DESCRIPTION
The ADA4303-2 consists of a low noise buffer amplifier followed
by a resistive power divider. This arrangement provides 3 dB of
gain relative to the RF signal present at the input of the device.
The input and each output must be properly matched to a 75 Ω
environment for distortion and noise performance to match the
data sheet specifications. In addition, to achieve the specified gain,
a 1% 249 Ω resistor should be installed to ground on each output.
AC coupling capacitors of 0.01 μF are recommended for the
input and outputs.
A 1 μH RF choke (Coilcraft chip inductor 0805LS-102X) is
required to correctly bias internal nodes of the ADA4303-2.
It should be connected between the 5 V supply and IL (Pin 11).
EVALUATION BOARD
The ADA4303-2 evaluation board allows designers to assess the
performance of the part in their particular applications. The board
includes 75 Ω coaxial connectors and 75 Ω controlled-impedance
signal traces that carry the input and output signals. Power (5 V)
is applied to the red VCC loop connector, and ground is connected
to the black GND loop connector.
The board has two 249 Ω resistors between each output and
ground that set the gain of the overall circuit to 3 dB and
improve output-to-output isolation. A schematic of the
ADA4303-2 evaluation board is shown in Figure 17.
RF LAYOUT CONSIDERATIONS
Appropriate impedance matching techniques are mandatory
when designing a circuit board for the ADA4303-2. Improper
characteristic impedances on traces can cause reflections that
can lead to poor linearity. The characteristic impedance of the
signal trace from each output should be 75 Ω.
POWER SUPPLY
The 5 V supply should be applied to each of the VCC pins and
RF choke via a low impedance power bus. The power bus should
be decoupled to ground using a 10 μF tantalum capacitor and
a 0.1 μF ceramic chip capacitor located close to the ADA4303-2.
In addition, the VCC pins should be decoupled to ground with
a 0.1 μF ceramic chip capacitor located as close to each of the
pins as possible.
1
ADA4303-2
C3
0.01F
249
L1
1.0H
VCC GND
VCC
VIN
2
3
45
7
9
6
8
101112
J3
J2
J1
GND
GND
GND
GND
NC NC
NC = NO CONNECT
IL
VCC
VO2
VO1
C2
0.01F
C4
0.01F
C5
10µF
+
C6
0.1µF
C1
0.1µF
249
06364-003
Figure 17. ADA4303-2 Evaluation Board Schematic
ADA4303-2
Rev. 0 | Page 9 of 12
OUTLINE DIMENSIONS
*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-1
EXCEPT FOR EXPOSED PAD DIMENSION.
1
0.50
BSC
0.60 MAX PIN 1
INDICATOR
0.75
0.55
0.35
0.25 MIN
0.45
TOP
VIEW
12° MAX 0.80 MAX
0.65 TYP
PIN 1
INDICATOR
1.00
0.85
0.80
0.30
0.23
0.18
0.05 MAX
0.02 NOM
0.20 REF
*1.45
1.30 SQ
1.15
12
4
10
6
7
9
3
2.75
BSC SQ
3.00
BSC SQ
2
5
8
11
COPLANARITY
0.08
EXPOSED PAD
(BOTTOM VIEW)
SEATING
PLANE
Figure 18. 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin Quad
(CP-12-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Ordering Quantity Branding
ADA4303-2ACPZ-RL1−40°C to +85°C 12-Lead LFCSP_VQ CP-12-1 5000 H0V
ADA4303-2ACPZ-R71−40°C to +85°C 12-Lead LFCSP_VQ CP-12-1 1500 H0V
ADA4303-2ACPZ-R21−40°C to +85°C 12-Lead LFCSP_VQ CP-12-1 250 H0V
ADA4303-2ACPZ-EB1 Evaluation Board
1 Z = Pb-free part.
ADA4303-2
Rev. 0 | Page 10 of 12
NOTES
ADA4303-2
Rev. 0 | Page 11 of 12
NOTES
ADA4303-2
Rev. 0 | Page 12 of 12
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06364-0-10/06(0)
