Automotive Power
Data Sheet
Rev. 1.0, 2017-03-03
TLE9861QXA20
Microcontroller with PWM Interface and H-Bridge MOSFET Driver for Automotive
Applications
BF-Step
TLE9861QXA20
Table of Contents
Data Sheet 2 Rev. 1.0, 2017-03-03
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 Device Pinout and Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Device Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 Power Management Unit (PMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2.2 PMU Modes Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.3 Power Supply Generation Unit (PGU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3.1 Voltage Regulator 5.0V (VDDP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3.2 Voltage Regulator 1.5V (VDDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3.3 External Voltage Regulator 5.0V (VDDEXT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6 System Control Unit - Digital Modules (SCU-DM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.3 Clock Generation Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.3.1 Low Precision Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.3.2 High Precision Oscillator Circuit (OSC_HP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.3.2.1 External Input Clock Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.3.2.2 External Crystal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7 System Control Unit - Power Modules (SCU-PM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8 ARM Cortex-M3 Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
9DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9.3.1 DMA Mode Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
10 Address Space Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
11 Memory Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
11.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
11.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
11.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
11.3 NVM Module (Flash Memory) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table of Contents
TLE9861QXA20
Table of Contents
Data Sheet 3 Rev. 1.0, 2017-03-03
12 Interrupt System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
12.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
12.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
12.2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
13 Watchdog Timer (WDT1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
13.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
13.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
14 GPIO Ports and Peripheral I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
14.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
14.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
14.2.1 Port 0 and Port 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
14.2.2 Port 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
14.3 TLE9861QXA20 Port Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
14.3.1 Port 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
14.3.1.1 Port 0 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
14.3.2 Port 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
14.3.2.1 Port 1 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
14.3.3 Port 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
14.3.3.1 Port 2 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
15 General Purpose Timer Units (GPT12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
15.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
15.1.1 Features Block GPT1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
15.1.2 Features Block GPT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
15.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
15.2.1 Block Diagram GPT1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
15.2.2 Block Diagram GPT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
16 Timer2 and Timer21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
16.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
16.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
16.2.1 Timer2 and Timer21 Modes Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
17 Timer3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
17.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
17.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
17.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
17.3.1 Timer3 Modes Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
18 Capture/Compare Unit 6 (CCU6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
18.1 Feature Set Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
18.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
18.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
19 UART1/UART2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
19.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
19.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
19.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
19.3 UART Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
20 High Voltage PWM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
20.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
20.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
20.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
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Data Sheet 4 Rev. 1.0, 2017-03-03
21 High-Speed Synchronous Serial Interface (SSC1/SSC2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
21.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
21.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
21.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
22 Measurement Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
22.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
22.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
22.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
23 Measurement Core Module (incl. ADC2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
23.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
23.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
23.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
23.2.2 Measurement Core Module Modes Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
24 10-Bit Analog Digital Converter (ADC1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
24.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
24.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
24.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
25 High-Voltage Monitor Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
25.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
25.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
25.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
26 Bridge Driver (incl. Charge Pump) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
26.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
26.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
26.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
26.2.2 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
27 Current Sense Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
27.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
27.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
27.2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
28 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
28.1 H-Bridge Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
28.2 ESD Immunity According to IEC61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
29 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
29.1 General Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
29.1.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
29.1.2 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
29.1.3 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
29.1.4 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
29.1.5 Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
29.2 Power Management Unit (PMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
29.2.1 PMU I/O Supply (VDDP) Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
29.2.2 PMU Core Supply (VDDC) Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
29.2.3 VDDEXT Voltage Regulator (5.0V) Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
29.2.4 VPRE Voltage Regulator (PMU Subblock) Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
29.2.4.1 Load Sharing Scenarios of VPRE Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
29.2.5 Power Down Voltage Regulator (PMU Subblock) Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
29.3 System Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
TLE9861QXA20
Table of Contents
Data Sheet 5 Rev. 1.0, 2017-03-03
29.3.1 Oscillators and PLL Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
29.3.2 External Clock Parameters XTAL1, XTAL2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
29.4 Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
29.4.1 Flash Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
29.5 Parallel Ports (GPIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
29.5.1 Description of Keep and Force Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
29.5.2 DC Parameters of Port 0, Port 1, TMS and Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
29.5.3 DC Parameters of Port 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
29.6 PWM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
29.6.1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
29.7 High-Speed Synchronous Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
29.7.1 SSC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
29.8 Measurement Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
29.8.1 System Voltage Measurement Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
29.8.2 Central Temperature Sensor Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
29.8.3 ADC2-VBG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
29.8.3.1 ADC2 Reference Voltage VBG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
29.8.3.2 ADC2 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
29.9 ADC1 Reference Voltage - VAREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
29.9.1 Electrical Characteristics VAREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
29.9.2 Electrical Characteristics ADC1 (10-Bit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
29.10 Reserved . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
29.11 High-Voltage Monitoring Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
29.11.1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
29.12 MOSFET Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
29.12.1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
29.13 Operational Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
29.13.1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
30 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
31 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
VQFN-48-31
Type Package Marking
TLE9861QXA20 VQFN-48-31
Data Sheet 6 Rev. 1.0, 2017-03-03
Microcontroller with PWM Interface and H-Bridge
MOSFET Driver for Automotive Applications
TLE9861QXA20
1Overview
Summary of Features
• 32 bit ARM Cortex M3 Core
– up to 24 MHz clock frequency
– one clock per machine cycle architecture
• On-chip memory
– 36 kByte Flash including
– 4 kByte EEPROM (emulated in Flash)
– 1024 Byte 100 Time Programmable Memory (100TP)
– 3 kByte RAM
– Boot ROM for startup firmware and Flash routines
• On-chip OSC and PLL for clock generation
– PLL loss-of-lock detection
• MOSFET driver including charge pump
• 10 general-purpose I/O Ports (GPIO)
• 5 analog inputs, 10-bit A/D Converter (ADC1)
• 16-bit timers - GPT12, Timer 2, Timer 21 and Timer 3
• Capture/compare unit for PWM signal generation (CCU6)
• 2 full duplex serial interfaces (UART)
• 2 synchronous serial channels (SSC)
• On-chip debug support via 2-wire SWD
• Bidirectional PWM interface
• 1 high voltage monitoring input
• Single power supply from 5.5 V to 27 V
• Extended power supply voltage range from 3 V to 28 V
• Low-dropout voltage regulators (LDO)
• High speed operational amplifier for motor current sensing via shunt
• 5 V voltage supply for external loads (e.g. Hall sensor)
• Core logic supply at 1.5 V
• Programmable window watchdog (WDT1) with independent on-chip clock source
• Power saving modes
– MCU slow-down Mode
– Sleep Mode
– Stop Mode
– Cyclic wake-up Sleep Mode
• Power-on and undervoltage/brownout reset generator
TLE9861QXA20
Overview
Data Sheet 7 Rev. 1.0, 2017-03-03
• Overtemperature protection
• Short circuit protection
• Loss of clock detection with fail safe mode entry for low system power consumption
• Temperature Range Tj = -40 °C to +150 °C
• Package VQFN-48 with LTI feature
• Green package (RoHS compliant)
• AEC qualified
TLE9861QXA20
Overview
Data Sheet 8 Rev. 1.0, 2017-03-03
1.1 Abbreviations
The following acronyms and terms are used within this document. List see in Table 1.
Table 1 Acronyms
Acronyms Name
AHB Advanced High-Performance Bus
APB Advanced Peripheral Bus
CCU6 Capture Compare Unit 6
CGU Clock Generation Unit
CMU Cyclic Management Unit
CP Charge Pump for MOSFET driver
CSA Current Sense Amplifier
DPP Data Post Processing
ECC Error Correction Code
EEPROM Electrically Erasable Programmable Read Only Memory
EIM Exceptional Interrupt Measurement
FSM Finite State Machine
GPIO General Purpose Input Output
H-Bridge Half Bridge
ICU Interrupt Control Unit
IEN Interrupt Enable
IIR Infinite Impulse Response
LDM Load Instruction
LDO Low DropOut voltage regulator
LSB Least Significant Bit
LTI Lead Tip Inspection
MCU Memory Control Unit
MF Measurement Functions
MSB Most Significant Bit
MPU Memory Protection Unit
MRST Master Receive Slave Transmit
MTSR Master Transmit Slave Receive
MU Measurement Unit
NMI Non Maskable Interrupt
NVIC Nested Vector Interrupt Controller
NVM Non-Volatile Memory
OTP One Time Programmable
OSC Oscillator
PBA Peripheral Bridge
PCU Power Control Unit
TLE9861QXA20
Overview
Data Sheet 9 Rev. 1.0, 2017-03-03
PD Pull Down
PGU Power supply Generation Unit
PLL Phase Locked Loop
PPB Private Peripheral Bus
PU Pull Up
PWM Pulse Width Modulation
RAM Random Access Memory
RCU Reset Control Unit
RMU Reset Management Unit
ROM Read Only Memory
SCU-DM System Control Unit - Digital Modules
SCU-PM System Control Unit - Power Modules
SFR Special Function Register
SOW Short Open Window (for WDT)
SPI Serial Peripheral Interface
SSC Synchronous Serial Channel
STM Store Instruction
SWD ARM Serial Wire Debug
TCCR Temperature Compensation Control Register
TMS Test Mode Select
TSD Thermal Shut Down
UART Universal Asynchronous Receiver Transmitter
VBG Voltage reference Band Gap
VCO Voltage Controlled Oscillator
VPRE Pre Regulator
WDT Watchdog Timer in SCU-DM
WDT1 Watchdog Timer in SCU-PM
WMU Wake-up Management Unit
100TP 100 Time Programmable
Table 1 Acronyms
Acronyms Name
TLE9861QXA20
Block Diagram
Data Sheet 10 Rev. 1.0, 2017-03-03
2 Block Diagram
Figure 1 Block Diagram
CP1L
CP2L
CP2H
CP1H
TLE9861_block_diagram_bus_architecture.vsd
TEST / DEBUG
INTERFACE
ARM
CORTEX-M3 FLASH SRAM ROM
Multilayer AHB Matrix
PBA0
MOSFET
Driver
PMU –
Power
Control
System
Functions
MON
PBA1
UART1
UART2
SSC1
SSC2
T2
T21
PLL
GPIO P0.1 – P0.4
P1.0 – P1.4
GH2
MON
MU
MF / ADC2
PWM
T3
uDMA
Controller VDDC
VDDP
VDDEXT
RESET
VS
GND_PWM
PWM_IO
SH2
GL2
GH1
GL1
SH1
VDH
systembus slave slave slave
slaveslave
MICRO DMA
CONTROLLER
slave
P0.0
TMS
GPT12
CCU6
CP
VSD
VCP
SL
DPP2
OP AMP OP2
OP1
SCU_DM
SCU_PM
WDT1/
CLKWDT
WDT
ADC 1
DPP1
P2.0, P2.2, P2.3, P2.4, P2.5
(AN0, AN2, AN3, AN4, AN5)
GND_REF
VAREF
MU-VAREF
OP AMP
VBAT_SENSE
OP AMP
SCU_DM
XTAL1
XTAL2
TLE9861QXA20
Device Pinout and Pin Configuration
Data Sheet 11 Rev. 1.0, 2017-03-03
3 Device Pinout and Pin Configuration
3.1 Device Pinout
Figure 2 Device Pinout
VS 45
VDH 44
PWM_IO 43
14 MON
17 P1.2
18 P0. 4
19 GND
20 TMS
22 RESET
21 P0.0
23 P0.1
24 P0.3
25 P0.2
26 P1.3
27 P1.4
28 GND
29 P2.0/XTAL1
30 P2.2/XTAL2
31 P2.5
32 P2.4
33 GND_REF
35 P2.3
36 OP 2
34 VA RE F
GL2 12
nu 11
SL 10
GH1 9
SH1 8
GH2 7
GND 39
13 GL 1
VDDEXT 41
GND_PWM 42
nu 5
SH2 6
VDDC 38
OP1 37
15 P1.0
16 P1.1
VDDP 40
EP
TLE 9861
EP
VSD 47
CP 1L 1
VCP 2
CP2H 3
CP2L 4
CP1H 48
VBAT _SENSE 46
Note: = Low voltage pins
TLE9861QXA20
Device Pinout and Pin Configuration
Data Sheet 12 Rev. 1.0, 2017-03-03
3.2 Pin Configuration
After reset, all pins are configured as input (except supply pin) with one of the following settings:
• Pull-up device enabled only (PU)
• Pull-down device enabled only (PD)
• Input with both pull-up and pull-down devices disabled (I)
• Output with output stage deactivated = high impedance state (Hi-Z)
The functions and default states of the TLE9861QXA20 external pins are provided in the following table.
Type: indicates the pin type.
• I/O: Input or output
• I: Input only
• O: Output only
• P: Power supply
Not all alternate functions listed.
Table 2 Pin Definitions and Functions
Symbol Pin Number Type Reset
State1)
Function
P0 Port 0
Port 0 is a 5-bit bidirectional general purpose I/O port. Alternate
functions can be assigned and are listed in the port description.
Main function is listed below.
P0.0 21 I/O I/PU SWD Serial Wire Debug Clock
P0.1 23 I/O I/PU GPIO General Purpose IO
Alternate function mapping see Table 8
P0.2 25 I/O I/PD GPIO General Purpose IO
Alternate function mapping see Table 8
Note: For a functional SWD connection this
GPIO must be tied to zero!
P0.3 24 I/O I/PU GPIO General Purpose IO
Alternate function mapping see Table 8
P0.4 18 I/O I/PD GPIO General Purpose IO
Alternate function mapping see Table 8
P1 Port 1
Port 1 is a 5-bit bidirectional general purpose I/O port. Alternate
functions can be assigned and are listed in the Port description.
The principal functions are listed below.
P1.0 15 I/O I GPIO General Purpose IO
Alternate function mapping see Table 9
P1.1 16 I/O I GPIO General Purpose IO
Alternate function mapping see Table 9
P1.2 17 I/O I GPIO General Purpose IO
Alternate function mapping see Table 9
P1.3 26 I/O I GPIO General Purpose IO, used for Inrush Transistor
Alternate function mapping see Table 9
P1.4 27 I/O I GPIO General Purpose IO
Alternate function mapping see Table 9
TLE9861QXA20
Device Pinout and Pin Configuration
Data Sheet 13 Rev. 1.0, 2017-03-03
P2 Port 2
Port 2 is a 5-bit general purpose input-only port.
Alternate functions can be assigned and are listed in the Port
description. Main function is listed below.
P2.0/XTAL1 29 I/I I AN0 ADC analog input 0
Alternate function mapping see Table 10
P2.2/XTAL2 30 I/O I AN2 ADC analog input 2
Alternate function mapping see Table 10
P2.3 35 I I AN3 ADC analog input 3
Alternate function mapping see Table 10
P2.4 32 I I AN4 ADC analog input 4
Alternate function mapping see Table 10
P2.5 31 I I AN5 ADC analog input 5
Alternate function mapping see Table 10
Power Supply
VS 45 P – Battery supply input
VDDP 40 P – 2)I/O port supply (5.0 V). Connect external buffer capacitor.
VDDC 38 P – 3)Core supply (1.5 V during Active Mode).
Do not connect external loads, connect external buffer
capacitor.
VDDEXT 41 P – External voltage supply output (5.0 V, 20 mA)
GND 19 P – GND digital
GND 28 P – GND digital
GND 39 P – GND analog
Monitor Input
MON 14 I – High Voltage Monitor Input
PWM Interface
PWM_IO 43 I/O – PWM interface input/output
GND_PWM 42 P – PWM ground
Charge Pump
CP1H 48 P – Charge Pump Capacity 1 High, connect external C
CP1L 1 P – Charge Pump Capacity 1 Low, connect external C
CP2H 3 P – Charge Pump Capacity 2 High, connect external C
CP2L 4 P – Charge Pump Capacity 2 Low, connect external C
VCP 2 P – Charge Pump Capacity
VSD 47 P – Battery supply input for Charge Pump
MOSFET Driver
VDH 44 P – Voltage Drain High Side MOSFET Driver
SH2 6 P – Source High Side FET 2
GH2 7 P – Gate High Side FET 2
Table 2 Pin Definitions and Functions (cont’d)
Symbol Pin Number Type Reset
State1)
Function
TLE9861QXA20
Device Pinout and Pin Configuration
Data Sheet 14 Rev. 1.0, 2017-03-03
SH1 8 P – Source High Side FET 1
GH1 9 P – Gate High Side FET 1
SL 10 P – Source Low Side FET
GL2 12 P – Gate Low Side FET 2
GL1 13 P – Gate Low Side FET 1
Others
GND_REF 33 P – GND for VAREF
VAREF 34 I/O – 5V ADC1 reference voltage, optional buffer or input
OP1 37 I – Negative operational amplifier input
OP2 36 I – Positive operational amplifier input
TMS 20 I
I/O
I/PD TMS
SWD
Test Mode Select input
Serial Wire Debug input/output
RESET 22 I/O – Reset input, not available during Sleep Mode
VBAT_SENSE 46 I – Battery supply voltage sense input
EP – – – Exposed Pad, connect to GND
1) Only valid for digital IOs
2) Also named VDD5V.
3) Also named VDD1V5.
Table 2 Pin Definitions and Functions (cont’d)
Symbol Pin Number Type Reset
State1)
Function
TLE9861QXA20
Modes of Operation
Data Sheet 15 Rev. 1.0, 2017-03-03
4 Modes of Operation
This highly integrated circuit contains analog and digital functional blocks. An embedded 32-bit microcontroller is
available for system and interface control. On-chip, low-dropout regulators are provided for internal and external
power supply. An internal oscillator provides a cost effective clock that is particularly well suited for PWM
communications. A PWM interface is available as a communication interface. Driver stages for an H-Bridge with
external MOSFET are integrated, featuring PWM capability, protection features and a charge pump for operation
at low supply voltage. A 10-bit SAR ADC is implemented for high precision sensor measurement. An 8-bit ADC is
used for diagnostic measurements.
The Micro Controller Unit supervision and system protection (including a reset feature) is complemented by a
programmable window watchdog. A cyclic wake-up circuit, supply voltage supervision and integrated temperature
sensors are available on-chip.
All relevant modules offer power saving modes in order to support automotive applications connected to terminal
30. A wake-up from power-save mode is possible via a PWM interface, via the monitoring input or using a
programmable time period (cyclic wake-up).
Featuring LTI, the integrated circuit is available in a VQFN-48-31 package with 0.5 mm pitch, and is designed to
withstand the severe conditions of automotive applications.
The TLE9861QXA20 has several operation modes mainly to support low power consumption requirements.
Reset Mode
The Reset Mode is a transition mode used e.g. during power-up of the device after a power-on reset, or after wake-
up from Sleep Mode. In this mode, the on-chip power supplies are enabled and all other modules are initialized.
Once the core supply VDDC is stable, the device enters Active Mode. If the watchdog timer WDT1 fails more than
four times, the device performs a fail-safe transition to Sleep Mode.
Active Mode
In Active Mode, all modules are activated and the TLE9861QXA20 is fully operational.
Stop Mode
Stop Mode is one of two major low power modes. The transition to the low power modes is performed by setting
the corresponding bits in the mode control register. In Stop Mode the embedded microcontroller is still powered,
allowing faster wake-up response times. Wake-up from this mode is possible through LIN bus activity, by using
the high-voltage monitoring pin or the corresponding 5V GPIOs.
Stop Mode with Cyclic Wake-Up
The Cyclic Wake-Up Mode is a special operating mode of the Stop Mode. The transition to the Cyclic Wake-Up
Mode is done by first setting the corresponding bits in the mode control register followed by the Stop Mode
command. In addition to the cyclic wake-up behavior (wake-up after a programmable time period), asynchronous
wake events via the activated sources (LIN and/or MON) are available, as in normal Stop Mode.
Sleep Mode
The Sleep Mode is a low-power mode. The transition to the low-power mode is done by setting the corresponding
bits in the MCU mode control register or in case of failure, see below. In Sleep Mode the embedded microcontroller
power supply is deactivated allowing the lowest system power consumption. A wake-up from this mode is possible
by PWM Interface activity, the High Voltage Monitor Input pin or Cyclic Wake-up.
Sleep Mode in Case of Failure
TLE9861QXA20
Modes of Operation
Data Sheet 16 Rev. 1.0, 2017-03-03
Sleep Mode is activated after 5 consecutive watchdog failures or in case of supply failure (5 times). In this case,
MON is enabled as the wake source and Cyclic Wake-Up is activated with 1s of wake time.
Sleep Mode with Cyclic Wake-Up
The Cyclic Wake-Up Mode is a special operating mode of the Sleep Mode. The transition to Cyclic Wake-Up Mode
is performed by first setting the corresponding bits in the mode control register followed by the Sleep and Stop
Mode command. In addition to the cyclic wake-up behavior (wake-up after a programmable time period),
asynchronous wake events via the activated sources (PWM interface and/or MON) are available, as in normal Sleep
Mode.
When using Sleep Mode with cyclic wake-up the voltage regulator is switched off and started again with the wake.
A limited number of registers is buffered during sleep, and can be used by SW e.g. for counting sleep/wake cycles.
MCU Slow Down Mode
In MCU Slow Down Mode the MCU frequency is reduced for saving power during operation. PWM communication
is still possible. LS MOSFET can be activated.
Wake-Up Source Prioritization
All wake-up sources have the same priority. In order to handle the asynchronous nature of the wake-up sources,
the first wake-up signal will initiate the wake-up sequence. Nevertheless all wake-up sources are latched in order
to provide all wake-up events to the application software. The software can clear the wake-up source flags. This
is to ensure that no wake-up event is lost.
As default wake-up source, the MON input is activated after power-on reset only. Additionally, the device is in
Cyclic Wake-Up Mode with the max. configurable dead time setting.
The following table shows the possible power mode configurations including the Stop Mode.
Table 3 Power Mode Configurations
Module/Function Active Mode Stop Mode Sleep Mode Comment
VDDEXT ON/OFF ON (no dynamic
load)/OFF
OFF –
Bridge Driver ON/OFF OFF OFF
PWM TRx ON/OFF wake-up only/
OFF
wake-up only/
OFF
–
VS sense ON/OFF
brownout
detection
brownout detection POR on VS brownout det. done in
PCU
VBAT_SENSE ON/OFF OFF OFF –
GPIO 5V (wake-up) n.a. disabled/static OFF –
GPIO 5V (active) ON ON OFF –
WDT1 ON OFF OFF –
CYCLIC WAKE n.a. cyclic wake-up/
cyclic sense/OFF
cyclic wake-up/
OFF
–
Measurement ON1) OFF OFF –
MCU ON/slow-
down/STOP
STOP2) OFF –
CLOCK GEN (MC) ON OFF OFF –
TLE9861QXA20
Modes of Operation
Data Sheet 17 Rev. 1.0, 2017-03-03
Wake-Up Levels and Transitions
The wake-up can be triggered by rising, falling or both signal edges for the monitor input, by PWM interface or by
cyclic wake-up.
LP_CLK (18 MHz) ON OFF OFF WDT1
LP_CLK2 (100 kHz) ON/OFF ON/OFF ON/OFF for cyclic wake-up
1) May not be switched off due to safety reasons
2) MC PLL clock disabled, MC supply reduced to 1.1 V
Table 3 Power Mode Configurations (cont’d)
Module/Function Active Mode Stop Mode Sleep Mode Comment
TLE9861QXA20
Power Management Unit (PMU)
Data Sheet 18 Rev. 1.0, 2017-03-03
5 Power Management Unit (PMU)
5.1 Features
• System modes control (startup, sleep, stop and active)
• Power management (cyclic wake-up)
• Control of system voltage regulators with diagnosis (overload, short, overvoltage)
• Fail safe mode detection and operation in case of system errors (watchdog fail)
• Wake-up sources configuration and management (PWM Interface, MON, GPIOs)
• System error logging
5.2 Introduction
The power management unit is responsible for generating all required voltage supplies for the embedded MCU
(VDDC, VDDP) and the external supply (VDDEXT). The power management unit is designed to ensure fail-safe
behavior of the system IC by controlling all system modes including the corresponding transitions. Additionally, the
PMU provides well defined sequences for the system mode transitions and generates hierarchical reset priorities.
The reset priorities control the reset behavior of all system functionalities especially the reset behavior of the
embedded MCU. All these functions are controlled by a state machine. The system master functionality of the
PMU make use of an independent logic supply and system clock. For this reason, the PMU has an "Internal logic
supply and system clock" module which works independently of the MCU clock.
TLE9861QXA20
Power Management Unit (PMU)
Data Sheet 19 Rev. 1.0, 2017-03-03
5.2.1 Block Diagram
The following figure shows the structure of the Power Management Unit. Table 4 describes the submodules in
more detail.
Figure 3 Power Management Unit Block Diagram
Table 4 Description of PMU Submodules
Mod.
Name
Modules Functions
Power Down
Supply
Independent supply voltage
generation for PMU
This supply is dedicated to the PMU to ensure an
independent operation from generated power supplies
(VDDP, VDDC).
LP_CLK
(= 18 MHz)
- Clock source for all PMU
submodules
- Backup clock source for System
- Clock source for WDT1
This ultra low power oscillator generates the clock for the
PMU.
This clock is also used as backup clock for the system in
case of PLL Clock failure and as an independent clock
source for WDT1.
LP_CLK2
(= 100 kHz)
Clock source for PMU This ultra low power oscillator generates the clock for the
PMU in Stop Mode and in the cyclic modes.
Peripherals Peripheral blocks of PMU These blocks include the analog peripherals to ensure a
stable and fail-safe PMU startup and operation (bandgap,
bias).
Power_Management_7x.vsd
Power Down Supply
LP_CLK
LP_CLK2
Peripherals
Power Supply Generation Unit
(PGU)
LDO for External Supply
VDDEXT
PMU-WMU
P1.0...P1.4
P0.0...P0.4
LIN
MON
PMU-PCU PMU-SFR
PMU-RMU
PMU-CMU
e.g. for WDT 1
e.g. for cyclic
wake and sense
VS
VDDP
VDDC
VDDEXT
Power Management Unit
PMU-Control
I
N
T
E
R
N
A
L
B
U
S
TLE9861QXA20
Power Management Unit (PMU)
Data Sheet 20 Rev. 1.0, 2017-03-03
Power Supply
Generation
Unit (PGU)
Voltage regulators for VDDP and
VDDC
This block includes the voltage regulators for the pad
supply (VDDP) and the core supply (VDDC).
VDDEXT Voltage regulator for VDDEXT to
supply external modules (e.g.
sensors)
This voltage regulator is a dedicated supply for external
modules and can also be used for cyclic sense operations
(e.g. with hall sensor).
PMU-SFR All Extended Special Function
registers that are relevant to the
PMU.
This module contains all registers needed to control and
monitor the PMU.
PMU-PCU Power Control Unit of the PMU This block is responsible for controlling all power related
actions within the PGU Module. It also contains all
regulator related diagnostics such as undervoltage and
overvoltage detection as well as overcurrent and short
circuit diagnostics.
PMU-WMU Wake-Up Management Unit of the
PMU
This block is responsible for controlling all wake-up related
actions within the PMU Module.
PMU-CMU Cyclic Management Unit of the PMU This block is responsible for controlling all actions in cyclic
mode.
PMU-RMU Reset Management Unit of the PMU This block generates resets triggered by the PMU such as
undervoltage or short circuit reset, and passes all resets to
the relevant modules and their register.
Table 4 Description of PMU Submodules (cont’d)
Mod.
Name
Modules Functions
TLE9861QXA20
Power Management Unit (PMU)
Data Sheet 21 Rev. 1.0, 2017-03-03
5.2.2 PMU Modes Overview
The following state diagram shows the available modes of the device.
Figure 4 Power Management Unit System Modes
start-up
active
stop
sleep
Stop
command
(from MCU)
LIN-wake or
MON-wake or
GPIO-wake or
cyclic _wake or
PMU_PIN = 1 or
SUP_TMOUT = 1
VDDC =stable and
error_supp<5
error_supp=5
V
S
> 4V and V
S
ramp up
or
V
S
< 3V and V
S
ramp down
LIN-wake or
MON-wake
or
cyclic -wake
VDDC / VDDP =
fail (short circuit)
Æerror_supp ++
Sleep command (from MCU) or
WDT1_SEQ_FAIL = 1 (Æerror_wdt = 5)
or
VDDC / VDDP = overload PMU_PIN = 1 or
PMU_SOFT = 1 or
(PMU_Ext_WDT = 1 and
WDT1_SEQ_FAIL = 0
Æerror_wdt ++)
cyclic -sense
TLE9861QXA20
Power Management Unit (PMU)
Data Sheet 22 Rev. 1.0, 2017-03-03
5.3 Power Supply Generation Unit (PGU)
5.3.1 Voltage Regulator 5.0V (VDDP)
This module represents the 5 V voltage regulator, which provides the pad supply for the parallel port pins and other
5 V analog functions (e.g. PWM Interface).
Features
• 5 V low-drop voltage regulator
• Overcurrent monitoring and shutdown with MCU signaling (interrupt)
• Overvoltage monitoring with MCU signaling (interrupt)
• Undervoltage monitoring with MCU signaling (interrupt)
• Undervoltage monitoring with reset (Undervoltage Reset, VDDPUV)
• Pre-Regulator for VDDC Regulator
• GPIO Supply
• Pull Down Current Source at the output for Sleep Mode only (typ. 5 mA)
The output capacitor CVDDP is mandatory to ensure proper regulator functionality.
Figure 5 Module Block Diagram of VDDP Voltage Regulator
5V LDO
LDO Supervision
VS
PMU_5V_OVERLOAD
PMU_5V_OVERVOLT
VDDP Regulator
V
I
A
VPRE VDDP
CVDDP
GND (Pin 39)