S-57M1 Series
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HIGH-SPEED BIPOLAR HALL EFFECT LATCH
© ABLIC Inc., 2011-2013 Rev.1.2_02
1
The S-57M1 Series, developed by CMOS technology, is a high-accuracy Hall IC that operates with a high-sensitivity, a high-
speed detection and low current consumption.
The output voltage changes when the S-57M1 Series detects the intensity level of magnetic flux density and a polarity
change. Using the S-57M1 Series with a magnet makes it possible to detect the rotation status in various devices.
High-density mounting is possible by using the small SOT-23-3 package.
Due to its high-accuracy magnetic characteristics, the S-57M1 Series can make operation’s dispersion in the system
combined with magnet smaller.
Caution This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to
ABLIC Inc. is indispensable.
Features
Pole detection: Bipolar latch
Detection logic for magnetism*1: VOUT = "L" at S pole detection
V
OUT = "H" at S pole detection
Output form*1: Nch open-drain output, CMOS output
Magnetic sensitivity: BOP = 3.0 mT typ.
Operation cycle (current consumption): tCYCLE = 50 s (1400 A) typ.
Power supply voltage range: VDD = 2.7 V to 5.5 V
Operation temperature range: Ta = 40C to 125C
Lead-free (Sn 100%), halogen-free*2
*1. The option can be selected.
*2. Refer to " Product Name Structure" for details.
Applications
Motor
Housing equipment
Industrial equipment
Package
SOT-23-3
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HIGH-SPEED BIPOLAR HALL EFFECT LATCH
S-57M1 Series Rev.1.2_02
2
Block Diagrams
1. Nch open-drain output product
OUT
VDD
VSS
*1 *1
Chopping
stabilized amplifier
*1. Parasitic diode
Figure 1
2. CMOS output product
OUT
VDD
VSS
*1
*1
*1
Chopping
stabilized amplifier
*1. Parasitic diode
Figure 2
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2_02 S-57M1 Series
3
Product Name Structure
1. Product name
S-57M1 x B x 1 B - M3T1 U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package name (abbreviation) and packing specifications*1
M3T1: SOT-23-3, Tape
Operation temperature
B: Ta = 40C to 125C
Magnetic sensitivity
1: BOP = 3.0 mT typ.
Detection logic for magnetism
L: VOUT = "L" at S pole detection
H: VOUT = "H" at S pole detection
Pole detection
B: Bipolar latch
Output form
N: Nch open-drain output
C: CMOS output
*1. Refer to the tape drawing.
2. Package
Table 1 Package Drawing Codes
Package Name Dimension Tape Reel
SOT-23-3 MP003-C-P-SD MP003-C-C-SD MP003-Z-R-SD
3. Product name list
Table 2
Product Name Output Form Pole Detection Detection Logic
for Magnetism
Magnetic Sensitivity
(BOP)
S-57M1NBL1B-M3T1U Nch open-drain output Bipolar latch VOUT = "L" at S pole
detection 3.0 mT typ.
S-57M1NBH1B-M3T1U Nch open-drain output Bipolar latch VOUT = "H" at S pole
detection 3.0 mT typ.
S-57M1CBH1B-M3T1U CMOS output Bipolar latch VOUT = "H" at S pole
detection 3.0 mT typ.
Remark Please contact our sales office for products other than the above.
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
S-57M1 Series Rev.1.2_02
4
Pin Configuration
1. SOT-23-3
23
1
Top view
Table 3
Pin No. Symbol Description
1 VSS GND pin
2 VDD Power supply pin
3 OUT Output pin
Figure 3
Absolute Maximum Ratings
Table 4
(Ta = 25C unless otherwise specified)
Item Symbol Absolute Maximum Rating Unit
Power supply voltage VDD VSS 0.3 to VSS 7.0 V
Output current IOUT 2.0 mA
Output voltage
Nch open-drain output
product VOUT VSS 0.3 to VSS 7.0 V
CMOS output product VSS 0.3 to VDD 0.3 V
Power dissipation PD 430*1 mW
Operation ambient temperature Topr 40 to 125 C
Storage temperature Tstg 40 to 150 C
*1. When mounted on board
[Mounted board]
(1) Board size: 114.3 mm 76.2 mm t1.6 mm
(2) Name: JEDEC STANDARD51-7
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2_02 S-57M1 Series
5
Electrical Characteristics
Table 5
(Ta = 25C, VDD = 5.0 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Power supply voltage VDD 2.7 5.0 5.5 V
Current consumption IDD Average value 1400 2000 A 1
Output voltage VOUT
Nch open-drain output
product
Output transistor Nch,
IOUT = 2 mA 0.4 V 2
CMOS output product
Output transistor Nch,
IOUT = 2 mA 0.4 V 2
Output transistor Pch,
IOUT = 2 mA
VDD
0.4 V 3
Leakage current ILEAK Nch open-drain output product
Output transistor Nch, VOUT = 5.5 V 1 A 4
Operation cycle tCYCLE 50 100 s
Magnetic Characteristics
Table 6
(Ta = 25C, VDD = 5.0 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit Test Circuit
Operation point*1 S pole BOP 1.4 3.0 4.0 mT 5
Release point*2 N pole BRP 4.0 3.0 1.4 mT 5
Hysteresis width*3 BHYS B
HYS = BOP B
RP 6.0 mT 5
*1. B
OP: Operation point
BOP is the value of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux density applied
to the S-57M1 Series by the magnet (S pole) is increased (by moving the magnet closer).
VOUT retains the status until a magnetic flux density of the N pole higher than BRP is applied.
*2. B
RP: Release point
BRP is the value of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux density applied
to the S-57M1 Series by the magnet (N pole) is increased (by moving the magnet closer).
VOUT retains the status until a magnetic flux density of the S pole higher than BOP is applied.
*3. B
HYS: Hysteresis width
BHYS is the difference of magnetic flux density between BOP and BRP.
Remark The unit of magnetic density mT can be converted by using the formula 1 mT = 10 Gauss.
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
S-57M1 Series Rev.1.2_02
6
Test Circuits
S-57M1
Series
VDD
VSS
OUT A
V
Figure 5 Test Circuit 2
S-57M1
Series
VDD
VSS
OUT A
V
Figure 6 Test Circuit 3
S-57M1
Series
VDD
VSS
OUT
A
R
*1
100 k
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 4 Test Circuit 1
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2_02 S-57M1 Series
7
S-57M1
Series
VDD
VSS
OUT A
V
Figure 7 Test Circuit 4
S-57M1
Series
VDD
VSS
OUT
V
R
*1
100 k
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 8 Test Circuit 5
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
S-57M1 Series Rev.1.2_02
8
Standard Circuit
S-57M1
Series
VDD
VSS
OUT
C
IN
R
*1
100 k
0.1
F
*1. Resistor (R) is unnecessary for the CMOS output product.
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation. Perform
t
horough evaluation using the actual application to set the constant.
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2_02 S-57M1 Series
9
Operation
1. Direction of applied magnetic flux
The S-57M1 Series detects the magnetic flux density which is vertical to the marking surface.
Figure 10 shows the direction in which magnetic flux is being applied.
Marking surface
S
N
Figure 10
2. Position of Hall sensor
Figure 11 shows the position of Hall sensor.
The center of this Hall sensor is located in the area indicated by a circle, which is in the center of a package as
described below.
The following also shows the distance (typ. value) between the marking surface and the chip surface of a package.
1
Top view
2 3
0.7 mm (typ.)
The center of Hall sensor;
in this 0.3 mm
Figure 11
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
S-57M1 Series Rev.1.2_02
10
3. Basic operation
The S-57M1 Series changes the output voltage (VOUT) according to the level of the magnetic flux density and a polarity
change (N pole or S pole) applied by a magnet.
Definition of the magnetic field is performed every operation cycle indicated in " Electrical Characteristics".
3. 1 Product with VOUT = "L" at S pole detection
When the magnetic flux density of the S pole perpendicular to the marking surface exceeds the operation point
(BOP) after the S pole of a magnet is moved closer to the marking surface of the S-57M1 Series, VOUT changes from
"H" to "L". When the N pole of a magnet is moved closer to the marking surface of the S-57M1 Series and the
magnetic flux density of the N pole is higher than the release point (BRP), VOUT changes from "L" to "H". In case of
BRP B BOP, VOUT retains the status.
Figure 12 shows the relationship between the magnetic flux density and VOUT.
S pole N pole
Ma
g
netic Flux densit
y
(
B
)
V
OUT
0
B
RP
B
OP
B
HYS
H
L
Figure 12
3. 2 Product with VOUT = "H" at S pole detection
When the magnetic flux density of the S pole perpendicular to the marking surface exceeds BOP after the S pole of a
magnet is moved closer to the marking surface of the S-57M1 Series, VOUT changes from "L" to "H". When the N
pole of a magnet is moved closer to the marking surface of the S-57M1 Series and the magnetic flux density of the
N pole is higher than BRP, VOUT changes from "H" to "L". In case of BRP B BOP, VOUT retains the status.
Figure 13 shows the relationship between the magnetic flux density and VOUT.
S pole
N pole
Magnetic Flux density (B)
V
OUT
0
B
RP
B
OP
B
HYS
H
L
Figure 13
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
Rev.1.2_02 S-57M1 Series
11
Precautions
If the impedance of the power supply is high, the IC may malfunction due to a supply voltage drop caused by feed-
through current. Take care with the pattern wiring to ensure that the impedance of the power supply is low.
Note that the IC may malfunction if the power supply voltage rapidly changes.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
Large stress on this IC may affect on the magnetic characteristics. Avoid large stress which is caused by bend and
distortion during mounting the IC on a board or handle after mounting.
ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
HIGH-SPEED BIPOLAR HALL EFFECT LATCH
S-57M1 Series Rev.1.2_02
12
Marking Specification
1. SOT-23-3
23
1
Top view
(1) (2) (3) (4)
(1) to (3): Product code (Refer to Product name vs. Product code.)
(4): Lot number
Product name vs. Product code
Product Name Product Code
(1) (2) (3)
S-57M1NBL1B-M3T1U W 7 A
S-57M1NBH1B-M3T1U W 7 B
S-57M1CBH1B-M3T1U W 7 C
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
No. MP003-C-P-SD-1.1
MP003-C-P-SD-1.1
SOT233-C-PKG Dimensions
2.9±0.2
0.95±0.1
1.9±0.2
+0.1
-0.06
0.16
0.4±0.1
1
23
mm
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
No. MP003-C-C-SD-2.0
MP003-C-C-SD-2.0
SOT233-C-Carrier Tape
1.4±0.2
0.23±0.1
4.0±0.1
2.0±0.1
4.0±0.1
ø1.5 +0.1
-0
ø1.0
3.2±0.2
Feed direction
1
23
+0.25
-0
mm
No.
TITLE
ANGLE
UNIT
ABLIC Inc.
QTY. 3,000
No. MP003-Z-R-SD-1.0
MP003-Z-R-SD-1.0
SOT233-C-Reel
ø13±0.2
12.5max.
9.2±0.5
Enlarged drawing in the central part
mm
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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