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©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
www.fairchildsemi.com
1
FDMA910PZ Single P-Channel PowerTrench® MOSFET
June 2014
FDMA910PZ
Single P-Channel PowerTrench® MOSFET
-20 V, -9.4 A, 20 mΩ
Features
Max rDS(on) = 20 mΩ at VGS = -4.5 V, ID = -9.4 A
Max rDS(on) = 24 mΩ at VGS = -2.5 V, ID = -8.6 A
Max rDS(on) = 34 mΩ at VGS = -1.8 V, ID = -7.2 A
Low Profile - 0.8 mm maximum in the new package MicroFET
2x2 mm
HBM ESD protection level > 2.8k V typical (Note 3)
Free from halogenated compounds and antimony oxides
RoHS Compliant
General Description
This device is designed specifically for battery charge or load
switching in cellular handset and other ultraportable
applications.It features a MOSFET with low on-state resistance
and zener diode protection against ESD. The MicroFET 2X2
package offers exceptional thermal performance for its physical
size and is well suited to linear mode applications.
D
DS
G
D
D
Pin 1
Drain Source
MicroFET 2X2 (Bottom View)
5
16
2
34
D
D
S
D
D
G
Bottom Drain Contact
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage -20 V
VGS Gate to Source Voltage ±8 V
ID
-Continuous TA = 25°C (Note 1a) -9.4 A
-Pulsed -45
PD
Power Dissipation TA = 25°C (Note 1a) 2.4 W
Power Dissipation TA = 25°C (Note 1b) 0.9
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 52 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1b) 145
Device Marking Device Package Reel Size Tape Width Quantity
910 FDMA910PZ MicroFET 2X2 7” 8 mm 3000 units
FDMA910PZ Single P-Channel PowerTrench® MOSFET
www.fairchildsemi.com
2
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
Electrical Characteristics TJ = 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V -20 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = -250 μA, referenced to 25 °C -12 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1 μA
IGSS Gate to Source Leakage Current VGS = ±8 V, VDS = 0 V ±1 μA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA -0.4 -0.5 -1.5 V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = -250 μA, referenced to 25 °C 3 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = -4.5 V, ID = -9.4 A 16 20
mΩ
VGS = -2.5 V, ID = -8.6 A 19 24
VGS = -1.8 V, ID = -7.2 A 24 34
VGS = -4.5 V, ID = -9.4 A,
TJ = 125 °C 20 25
gFS Forward Transconductance VDD = -5 V, ID = -9.4 A 52 S
Ciss Input Capacitance VDS = -10 V, VGS = 0 V,
f = 1 MHz
2110 2805 pF
Coss Output Capacitance 414 620 pF
Crss Reverse Transfer Capacitance 388 580 pF
td(on) Turn-On Delay Time
VDD = -10 V, ID = -9.4 A,
VGS = -4.5 V, RGEN = 6 Ω
9.4 19 ns
trRise Time 19 34 ns
td(off) Turn-Off Delay Time 135 216 ns
tfFall Time 103 165 ns
QgTotal Gate Charge VGS = -4.5 V, VDD = -10 V,
ID = -9.4 A
21 29 nC
Qgs Gate to Source Charge 2.5 nC
Qgd Gate to Drain “Miller” Charge 6 nC
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = -2 A (Note 2) -0.6 -1.2 V
VGS = 0 V, IS = -9.4 A (Note 2) -0.8 -1.2 V
trr Reverse Recovery Time IF = -9.4 A, di/dt = 100 A/μs 23 37 ns
Qrr Reverse Recovery Charge 6.3 13 nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
a. 52 °C/W when mounted
on a 1 in2 pad of 2 oz copper.
b. 145 °C/W when mounted on a
minimum pad of 2 oz copper.
FDMA910PZ Single P-Channel PowerTrench® MOSFET
www.fairchildsemi.com
3
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
Typical Characteristics TJ = 25 °C unless otherwise noted
Figure 1.
0.0 0.5 1.0 1.5 2.0
0
15
30
45
VGS = -1.5 V
VGS = -4.5 V
VGS = -2.5 V
VGS = -1.8 V
VGS = -3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
-ID, DRAIN CURRENT (A)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
On-Region Characteristics Figure 2.
0153045
0
1
2
3
VGS = -2.5 V
VGS = -1.8 V
VGS = -3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
VGS = -4.5 V
VGS = -1.5 V
N o r m a l i z e d O n - R e s i s t a n c e
vs Drain Current and Gate Voltage
F i g u r e 3 . N o r m a l i z e d O n - R e s i s t a n c e
-75 -50 -25 0 25 50 75 100 125 150
0.8
0.9
1.0
1.1
1.2
1.3
1.4
ID = -9.4 A
VGS = -4.5 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
vs Junction Temperature
Figure 4.
1.01.52.02.53.03.54.04.5
0
15
30
45
60
TJ = 125 oC
ID = -9.4 A
TJ = 25 oC
-VGS, GATE TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
O n -R es i s t an ce v s G a t e to
Source Voltage
Figure 5. Transfer Characteristics
0.5 1.0 1.5 2.0
0
15
30
45
TJ = 25 oC
VDS = -5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 150 oC
-ID, DRAIN CURRENT (A)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
-IS, REVERSE DRAIN CURRENT (A)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
S ou r ce to D ra i n D io d e
Forward Voltage vs Source Current
FDMA910PZ Single P-Channel PowerTrench® MOSFET
www.fairchildsemi.com
4
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
Figure 7.
0 5 10 15 20 25
0.0
1.5
3.0
4.5
ID = -9.4 A
VDD = -12 V
VDD = -8 V
-VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = -10 V
Gate Charge Characteristics Figure 8.
0.1 1 10 20
100
1000
5000
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
C a p a c i t a n c e v s D r a i n
to Source Voltage
Figure 9.
03691215
10-10
10-9
10-8
10-7
10-6
10-5
10-4
10-3
10-2
10-1
VDS = 0 V
TJ = 125 oC
TJ = 25 oC
-VGS, GATE TO SOURCE VOLTAGE (V)
-Ig, GATE LEAKAGE CURRENT (A)
G a t e L e a k a g e C u r r e n t v s G a t e t o
Source Voltage
Figure 10.
0.01 0.1 1 10 100
0.01
0.1
1
10
100
THIS AREA IS
LIMITED BY rDS(on)
100 μs
1 ms
100 ms
1 s
DC
10 s
10 ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 145 oC/W
TA = 25 oC
-ID, DRAIN CURRENT (A)
-VDS, DRAIN to SOURCE VOLTAGE (V)
F or w ar d B i as S af e
Operating Area
Figure 11. Single Pulse Maximum Power Dissipation
10-4 10-3 10-2 10-1 110
100 1000
0.5
1
10
100
1000
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 145 oC/W
TA = 25 oC
t, PULSE WIDTH (sec)
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMA910PZ Single P-Channel PowerTrench® MOSFET
www.fairchildsemi.com
5
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
10-4 10-3 10-2 10-1 110
100 1000
0.001
0.01
0.1
1
2
SINGLE PULSE
RθJA = 145 oC/W
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMA910PZ Single P-Channel PowerTrench® MOSFET
www.fairchildsemi.com
6
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
Dimensional Outline and Pad Layout
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
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7www.fairchildsemi.com
FDMA910PZ Single P-Channel PowerTrench® MOSFET
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
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