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TDA7266MA
June 2003
WIDE SUPPL Y VOLTAGE RAN GE (3 - 1 8 V)
MINIMUM EXTERNAL COMPONENTS
NO SWR CAPACITO R
N O B OOT STRAP
NO BOUCHEROT CELLS
INTERNALLY FIXED GAIN
STAND-BY & MUTE FUNCTIONS
SHORT CIRCUIT PROTECTION
THERMAL OVERLOAD PROTECTION
DESCRIPTION
The TDA7266MA is a mono bridge am plifier speciall y
designed for TV and Portable Radio applications. Pin to pin compatible with: TDA7266S, TDA7266,
TDA7266M, TDA7266MA, TDA7266B, TDA7297SA
& TDA7297.
SIP9
ORDERING NUMBER: TDA7266MA
7W MONO BRIDGE AMPLIFIER
Figure 1. Block and Application Diagram
1
C5 C6
2
4
Vref
ST-BY/
MUTE 5
IN
0.22µF
C1
C2
10µF
R1 10k
VCC
3
D03AU1459_mod
+
-
-
+
OUT1+
OUT1-
7
6
S-GND
PW-GND
470µF 100nF
TECHNOLOGY BI20II
TDA7266MA
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ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
PIN CONNECTION
(Top view)
Symbol Parameter Value Unit
VsSupply Voltage 20 V
IOOutput Peak Current (internally limited) 2 A
Top Operating Temperature 0 to 70 °C
Tstg, TjStorage and Junction Temperature -40 to 150 °C
Symbol Parameter Value Unit
Rth j-case Thermal Resistance Junction-case 9 °C/W
ELECTRICAL CHARACTERISTCS
(V
CC
= 11V, R
L
= 8
, f = 1KHz, T
amb
= 25°C unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
VCC Supply Range 3 11 18 V
IqTotal Quiescent Current 50 65 mA
VOS Output Offset Voltage 120 mV
POOutput Power THD 10% 6.3 7 W
THD Total Harmonic Distortion PO = 1W 0.05 0.2 %
PO = 0.1W to 2W
f = 100Hz to 15KHz 1%
SVR Supply Voltage Rejection f = 100Hz, VR =0.5V 40 56 dB
AMUTE Mute Attenuation 60 80 dB
TwThermal Threshold 150 °C
GVClosed Loop Voltage Gain 25 26 27 dB
RiInput Resis tance 25 30 K
1
2
3
4
5
6
7
8 N.C.
PGND
SGND
STBY/MUTE
IN
VCC
OUT-
OUT+
9 N.C.
D03AU1460
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TDA7266MA
APPLICATION SUGGESTION
STAND-BY AND MUTE FUNCTIONS
Figure 2. Micro pr ocess or Drivin g Sig nals
The St-by and mute ter minals are tied toget her and they are con nected to the supply line via an exter nal voltage
divider.
The device is switched-on/off from the supply line and the external capacitor C4 is intended to delay the St-by
and mute threshold exceeding, avoiding "Popping" problems.
VTMUTE Mute Threshold for VCC > 6.4V; Vo = -30dB 2.3 2.9 4.1 V
for VCC < 6.4V; Vo = -30dB VCC/2
-1 VCC/2
-075 VCC/2
-0.5 V
VTST-BY St-by Threshold 0.8 1.3 1.8 V
IST-BY St-by Current V6 = GND 100 µA
eNTotal Output Voltage A Curve; f = 20Hzto 20KHz 150 µV
ELECTRICAL CHARACTERISTCS
(continued)
(V
CC
= 11V, R
L
= 8
, f = 1KHz, T
amb
= 25°C unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
+VS(V)
VIN
(mV)
Iq
(mA)
ST-BY
MUTE
PLAY MUTE ST-BY
+18
1.0
0.5
VMUTE/
STBY
pin 5
4.1
2.3
OFF
OFF
D03AU1461
VOUT
(V)
2.9
0.75
TDA7266MA
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Figure 3. Stand-alone low-cost Application
1
2
4
Vref
ST-BY/MUTE 15
IN1
C3 0.22µF
VCC
3
D03AU1462
+
-
-
+
OUT1+
OUT1-
7
6
S-GND
PW-GND
C1
470µFC2
100nF
R1
47K
C4
10µF
R2
47K
Figu re 4. Dis to rti on v s Ou put Pow er
Figu re 5. Dis to rti on v s Ou put Pow er
Figu re 6. Distorti on v s. Fre q ue n c y
Figu re 7. Gai n vs Frequ enc y
0.010
0.1
1
10
0.1 1 10
Vcc = 11 V
Rl = 8 ohm
f = 15 KHz
f = 5 KHz
f = 1 KHz
Pout (W)
THD (%)
0.010
0.1
1
10
0.1 1 10
THD(%)
Vcc = 9V
Rl= 8 ohm
f = 15K Hz
f = 5 KHz
f = 1KH z
Pout (W)
0.010
0.1
1
10
100 1k 10k 20k
THD(%)
Vcc = 11 V
Rl = 8 o hm
Po ut = 1 0 0mW
Pout = 2W
frequency (Hz)
-5.000
-4.000
-3.000
-2.000
-1.000
0.0
1.0000
2.0000
3.0000
4.0000
5.0000
10 100 1k 10k 100k
Level(dBr)
Vcc = 11V
Rl = 8 ohm
Pout = 1W
frequenc y (H z )
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TDA7266MA
Figure 8. Output Power vs. Supply Voltage
Figure 9. Ptot Dissipation & Efficiency vs. Pout
Figure 10. Mute & Stand-By Attenuation vs
Vpin . 5
Figure 11. Quiescent Current vs. Supply
Voltage
0.0
2.0000
4.0000
6.0000
8.0000
10.000
Po (W)
2.000 4.000 6.000 8.000 10.00 12.00
Vs (V)
d = 10%
d = 1%
Rl = 8 ohm
f = 1kHz
00.511.522.533.544.555.566.577.58
0
0.5
1
1.5
2
2.5
3
3.5
4
0
10
20
30
40
50
60
70
80
Pd (W) µ(%)
Pout(W)
Vcc = 11V
Rl = 8ohm
f = 1KHz
Pd
µ
1 1.5 2 2.5 3 3.5 4 4.5 5
0
10
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
Attenuation (dB )
V pin.5 (V)
345678910111213141516171
8
30
35
40
45
50
55
60
65
70 Iq (mA )
Vsupply(V)
TDA7266MA
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Figure 12. PC Board Component Layout
Figure 13. Evaluation Board Top Layer Layout
Figure 14. Evaluation Board Bottom Layer Layout
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TDA7266MA
HEAT SINK DIMENSIONING:
In order to avoid the thermal protection inter vention, that is placed approximati vely at T
j
= 150°C, it is important
the dimensioning of the Heat Sinker R
Th
(°C/W).
The parameters that influence the dimensioning are:
M axim um dissipa ted power for the device (Pdmax)
Max thermal resistance Junction to case (RTh j-c)
Max. ambient temperature Tam b max
Quies cent current Iq (mA)
Example:
V
CC
= 11V, R
load
= 8ohm, R
Th j-c
= 9 °C/W , T
am b max
= 50°C
P
dmax
= (N° channels) ·
P
dmax
= 1 · ( 3 ) + 0.5 = 3.5W
(Heat Sinker)
In figure 15 is shown the Power derating curve for the device.
Figure 15. Power derating curve
Vcc2
Π2Rload
2
--------------
--------------------------- IqVcc
+
RTh c-a 150 Tamb max
Pd max
----------------------------------------- RTh j-c
150 50
3.5
---------------------- 919.5°C/W===
a) Infi n ite Heats ink
b) 10 °C/ W
c) 15 °C/ W
d) 20 °C/ W
(d)
(a)
(b)
(c)
0
2
4
6
8
10
0 40 80 120 160
Tamb (°C)
Pd (W)
a) Infi n ite Heats ink
b) 10 °C/ W
c) 15 °C/ W
d) 20 °C/ W
(d)
(a)
(b)
(c)
0
2
4
6
8
10
0 40 80 120 160
Tamb (°C)
Pd (W)
TDA7266MA
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SIP9
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 7.1 0.280
a1 2.7 3 0.106 0.118
B230.90
B3 24.8 0.976
b1 0.5 0.020
b3 0.85 1.6 0.033 0.063
C 3.3 0.130
c1 0.43 0.017
c2 1.32 0.052
D 21.2 0.835
d1 14.5 0.571
e 2.54 0.100
e3 20.32 0.800
L 3.1 0.122
L1 3 0.118
L2 17.6 0.693
L3 0.25 0.010
L4 17.4 17.85 0.685 0,702
M 3.2 0.126
N 1 0.039
P 0.15 0.006
D
N
M
L1
19
d1
L3
L2
La1
e3 b3
b1
B
ec1
A
c2 C
P
L4
SIP9
B3
OUTLINE AND
MECHANICAL DATA
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is gra nted
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to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
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TDA7266MA