ISL28005FH20Z-T7A - INTERSIL - Datasheet.Directory

Micropower, Rail-to-Rail Input Current Sense Amplifier

with Voltage Output

ISL28005

The ISL28005 is a micropower, uni-directional high-side and low-

side current sense amplifier featuring a proprietary rail-to-rail

input current sensing amplifier. The ISL28005 is ideal for high-

side current sense applications where the sense voltage is

usually much higher than the amplifier supply voltage. The

device can be used to sense voltages as high as 28V when

operating from a supply voltage as low as 2.7V. The micropower

ISL28005 consumes only 50µA of supply current when operating

from a 2.7V to 28V supply.

The ISL28005 features a common-mode input voltage range

from 0V to 28V. The proprietary architecture extends the input

voltage sensing range down to 0V, making it an excellent choice

for low-side ground sensing applications. The benefit of this

architecture is that a high degree of total output accuracy is

maintained over the entire 0V to 28V common mode input

voltage range.

The ISL28005 is available in fixed (100V/V, 50V/V and 20V/V)

gains in the space saving 5 Ld SOT-23 package. The parts

operate over the extended temperature range from -40°C to

+125°C.

Features

• Low Power Consumption. . . . . . . . . . . . . . . . . . . . . . 50µA,Typ

• Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 28V

• Wide Common Mode Input . . . . . . . . . . . . . . . . . . . . 0V to 28V

• Fixed Gain Versions

- ISL28005-100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100V/V

- ISL28005-50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50V/V

- ISL28005-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/V

• Operating Temperature Range. . . . . . . . . . .-40°C to +125°C

• Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Ld SOT-23

Applications

• Power Management/Monitors

• Power Distribution and Safety

• DC/DC, AC/DC Converters

• Battery Management /Charging

• Automotive Power Distribution

Related Literature

• See AN1531 for “ISL28005 Evaluation Board User’s Guide”

ISL28005

GND

ISL28005

+5VDC

+12VDC

+1.0VDC +1.0VDC

SENSE

OUTPUT

+5VDC

OUTPUT

+12VDC

OUTPUT

MULTIPLE

OUTPUT

POWER SUPPLY

ISENSE

+12VDC

ISENSE

+5VDC

ISENSE

+1.0VDC

RSENSE +5VDC

+5VDC

RSENSE

FIGURE 1. TYPICAL APPLICATION

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

TIME (ms)

VOLTS (V)

VTH(L-H) = 1.52V

VTH(H-L) = 1.23V

VRS+

G100, VOUT = 1V

G50, VOUT = 500mV

G20, VOUT = 200mV

VOUT (G=100)

FIGURE 2. HIGH-SIDE AND LOW-SIDE THRESHOLD VOLTAGE

July 1, 2011

FN6973.4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

ISL28005

2FN6973.4

July 1, 2011

Block Diagram

Pin Configuration

ISL28005

(5 LD SOT-23)

TOP VIEW

GND

RS-

gmHI

gmLO

VSENSE

1.35V

IMIRROR

OUT

VCC

VSENSE

I = 2.86µA

RS+

HIGH-SIDE

LOW-SIDE

SENSING

AND

4VCC

OUT

GND

RS+

RS-

FIXED

GAIN

Pin Descriptions

ISL28005

(5 LD SOT-23)

NAME DESCRIPTION

1GNDPower Ground

2 OUT Amplifier Output

CC Positive Power Supply

4 RS+ Sense Voltage Non-inverting Input

5 RS- Sense Voltage Inverting Input

RS-

VCC

RS+

GND

CAPACITIVELY

COUPLED

ESD CLAMP

OUT

CAPACITIVELY

COUPLED

ESD CLAMP

ISL28005

3FN6973.4

July 1, 2011

Ordering Information

PART NUMBER

(Notes 1, 2, 3) GAIN

PART MARKING

(Note 4)

PACKAGE

Tape & Reel

(Pb-Free)

PKG.

DWG. #

ISL28005FH100Z-T7 100V/V BDEA 5 Ld SOT-23 P5.064A

ISL28005FH100Z-T7A 100V/V BDEA 5 Ld SOT-23 P5.064A

ISL28005FH50Z-T7 50V/V BDDA 5 Ld SOT-23 P5.064A

ISL28005FH50Z-T7A 50V/V BDDA 5 Ld SOT-23 P5.064A

ISL28005FH20Z-T7 20V/V BDCA 5 Ld SOT-23 P5.064A

ISL28005FH20Z-T7A 20V/V BDCA 5 Ld SOT-23 P5.064A

ISL28005FH-100EVAL1Z 100V/V Evaluation Board

ISL28005FH-50EVAL1Z 50V/V Evaluation Board

ISL28005FH-20EVAL1Z 20V/V Evaluation Board

NOTES:

1. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte

tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-

free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28005. For more information on MSL please see techbrief TB363.

4. The part marking is located on the bottom of the part.

ISL28005

4FN6973.4

July 1, 2011

Absolute Maximum Ratings Thermal Information

Max Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..28V

Max Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mA

Max Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±0.5V

Max Input Voltage (RS+, RS-) . . . . . . . . . . . . . . . . . . . . . . . GND-0.5V to 30V

Max Input Current for Input Voltage <GND -0.5V . . . . . . . . . . . . . . . ±20mA

Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite

ESD Rating

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4kV

Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200V

Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5kV

Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W)

5 Ld SOT-23 (Notes 5, 6) . . . . . . . . . . . . . . . 190 90

Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C

Maximum Junction Temperature (TJMAX) . . . . . . . . . . . . . . . . . . . . .+150°C

Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Recommended Operating Conditions

Ambient Temperature Range (TA) . . . . . . . . . . . . . . . . . . .-40°C to +125°C

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product

reliability and result in failures not covered by warranty.

NOTES:

5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

6. For θJC, the “case temp” location is taken at the package top center.

Electrical Specification VCC = 12V, VRS+ = 0V to 28V, VSENSE = 0V, RLOAD = 1MΩ, TA = +25°C unless otherwise specified. Boldface limits

apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization.

PARAMETER DESCRIPTION CONDITIONS

MIN

(Note 7) TYP

MAX

(Note 7) UNIT

VOS Input Offset Voltage

(Notes 8, 9)

VCC = VRS+ = 12V,

VS= 20mV to = 100mV

-500

60 500

500

µV

VCC = 12V, VRS+ = 0.2V, VS= 20mV,

VS = 100mV

-3

-3.3

-1.2 3

3.3

IRS+, IRS - Leakage Current VCC = 0V, VRS+ = 28V 0.041 1.2

1.5

µA

IRS+ Gain = 100 + Input Bias Current VRS+ = 2V, VSENSE = 5mV 4.7 6

µA

VRS+ = 0V, VSENSE = 5mV -500

-600

-425 nA

Gain = 50, Gain = 20 +Input Bias Current VRS+ = 2V, VSENSE = 5mV 4.7 6

µA

VRS+ = 0V, VSENSE = 5mV -700

-840

-432 nA

IRS -Input Bias Current V

RS+ = 2V, VSENSE = 5mV 5 50

VRS+ = 0V, VSENSE = 5mV -125

-130

-45 nA

CMRR Common Mode Rejection Ratio VRS+ = 2V to 28V 105 115 dB

PSRR Power Supply Rejection Ratio VCC = 2.7V to 28V, VRS+ = 2V 90 105 dB

VFSFull-scale Sense Voltage VCC = 28V, VRS+ = 0.2V, 12V 200 mV

GGain

(Note 8)

ISL28005-100 100 V/V

ISL28005-50 50 V/V

ISL28005-20 20 V/V

ISL28005

5FN6973.4

July 1, 2011

GAGain = 100 Gain Accuracy

(Note 10)

VCC = VRS+ = 12V, VSENSE = 20mV to

100mV

-2

-3

VCC = 12V, VRS+ = 0.1V,

VSENSE = 20mV to 100mV

-0.25 %

Gain = 50, Gain = 20 Gain Accuracy

(Note 10)

VCC = VRS+ = 12V, VSENSE = 20mV to

100mV

-2

-3

VCC = 12V, VRS+ = 0.1V,

VSENSE = 20mV to 100mV

-3

-4

-0.31 3

VOA Gain = 100 Total Output Accuracy

(Note 11)

VCC = VRS+ = 12V, VSENSE = 100mV -2.5

-2.7

2.5

2.7

VCC = 12V, VRS+ = 0.1V,

VSENSE = 100mV

-1.25 %

Gain = 50, Gain = 20 Total Output

Accuracy (Note 11)

VCC = VRS+ = 12V, VSENSE = 100mV -2.5

-2.7

2.5

2.7

VCC = 12V, VRS+ = 0.1V,

VSENSE = 100mV

-6

-7

-1.41 6

VOH Output Voltage Swing, High

VCC - VOUT

IO = -500µA, VCC = 2.7V

VSENSE = 100mV

VRS+ = 2V

39 50 mV

VOL Output Voltage Swing, Low

VOUT

IO = 500µA, VCC = 2.7V

VSENSE = 0V, VRS+ = 2V

30 50 mV

ROUT Output Resistance VCC = VRS+ = 12V, VSENSE = 100mV

IOUT = 10µA to 1mA

6.5 Ω

ISC+ Short Circuit Sourcing Current VCC = VRS+ = 5V, RL = 10Ω4.8 mA

ISC- Short Circuit Sinking Current VCC = VRS+ = 5V, RL = 10Ω8.7 mA

ISGain = 100

Supply Current

VRS+ > 2V, VSENSE = 5mV 50 59

µA

Gain = 50, 20

Supply Current

VRS+ > 2V, VSENSE = 5mV 50 62

µA

VCC Supply Voltage Guaranteed by PSRR 2.7 28 V

SR Gain = 100 Slew Rate Pulse on RS+ pin,

VOUT = 8VP-P

(see Figure 17)

0.58 0.76 V/µs

Gain = 50 Slew Rate Pulse on RS+ pin,

VOUT = 8VP-P

(see Figure 17)

0.58 0.67 V/µs

Gain = 20 Slew Rate Pulse on RS+ pin,

VOUT = 3.5VP-P

(see Figure 17)

0.50 0.67 V/µs

BW-3dB Gain = 100

-3dB Bandwidth

VRS+ = 12V, 0.1V, VSENSE = 100mV 110 kHz

Gain = 50

-3dB Bandwidth

VRS+ = 12V, 0.1V, VSENSE = 100mV 160 kHz

Gain = 20

-3dB Bandwidth

VRS+ = 12V, 0.1V, VSENSE = 100mV 180 kHz

Electrical Specification VCC = 12V, VRS+ = 0V to 28V, VSENSE = 0V, RLOAD = 1MΩ, TA = +25°C unless otherwise specified. Boldface limits

apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued)

PARAMETER DESCRIPTION CONDITIONS

MIN

(Note 7) TYP

MAX

(Note 7) UNIT

ISL28005

6FN6973.4

July 1, 2011

tsOutput Settling Time to 1% of Final Value VCC = VRS+ = 12V, VOUT = 10V step,

VSENSE >7mV

15 µs

VCC = VRS+ = 0.2V, VOUT = 10V step,

VSENSE >7mV

20 µs

Capacitive-Load Stability No sustained oscillations 300 pF

ts Power-up Power-Up Time to 1% of Final Value VCC = VRS+ = 12V, VSENSE = 100mV 15 µs

VCC = 12V, VRS+ = 0.2V

VSENSE = 100mV

50 µs

Saturation Recovery Time VCC = VRS+ = 12V, VSENSE = 100mV,

overdrive

10 µs

NOTES:

7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

8. DEFINITION OF TERMS:

• VSENSEA = VSENSE @100mV

• VSENSEB = VSENSE @20mV

• VOUTA = VOUT@VSENSEA = 100mV

• VOUTB = VOUT@VSENSEB = 20mV

• G =

9. VOS is extrapolated from the gain measurement.

10. % Gain Accuracy = GA =

11. Output Accuracy % VOA = where VOUT = VSENSE X GAIN and VSENSE = 100mV

Electrical Specification VCC = 12V, VRS+ = 0V to 28V, VSENSE = 0V, RLOAD = 1MΩ, TA = +25°C unless otherwise specified. Boldface limits

apply over the operating temperature range, -40°C to +125°C. Temperature data established by characterization. (Continued)

PARAMETER DESCRIPTION CONDITIONS

MIN

(Note 7) TYP

MAX

(Note 7) UNIT

GAIN

VOUTAV

OUTB–

VSENSEAV

SENSEB–

------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

VOS VSENSEA

VOUTA

-----------------

–=

GMEASURED GEXPECTED

–

GEXPECTED

---------------------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

100×

VOUTMEASURED VOUTEXPECTED

–

VOUTEXPECTED

-------------------------------------------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

100×

ISL28005

7FN6973.4

July 1, 2011

Typical Performance Curves VCC = 12V, RL = 1M, unless otherwise specified.

FIGURE 3. LARGE SIGNAL TRANSIENT RESPONSE VRS+ = 0.2V,

VSENSE = 100mV

FIGURE 4. LARGE SIGNAL TRANSIENT RESPONSE VRS+ = 12V,

VSENSE = 100mV

FIGURE 5. HIGH-SIDE and LOW-SIDE THRESHOLD VOLTAGE

VRS+(L-H) and VRS+(H-L), VSENSE = 10mV

FIGURE 6. VOUT vs VRS+, VSENSE = 20mV TRANSIENT

RESPONSE

FIGURE 7. NORMALIZED VOA vs IOUT FIGURE 8. GAIN vs FREQUENCY VRS+= 100mV/12V,

VSENSE = 100mV, VOUT = 250mVP-P

0 102030405060708090100

TIME (µs)

VOUT (V)

GAIN 100

0 102030405060708090100

TIME (µs)

VOUT (V)

GAIN 100

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

TIME (ms)

VOLTS (V)

VTH(L-H) = 1.52V

VTH(H-L) = 1.23V

VRS+

G100, VOUT = 1V

G50, VOUT = 500mV

G20, VOUT = 200mV

VOUT (G = 100)

0.4

0.8

1.2

1.6

2.0

2.4

0 0.20.40.60.81.01.21.41.61.82.0

TIME (ms)

VRS+ (V)

VOUT (V)

RL = 1M

VCC = 12V

VOUT (G = 100)

VRS+

G100, VOUT = 2V

G50, VOUT = 1V

G20, VOUT = 400mV

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

1µ 10µ 100µ 1m 10m

OUT

(A)

VOA PERCENT ACCURACY (%)

+25°C

-40°C

+125°C

GAIN 100

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

GAIN (dB)

-35

-25

-15

-5

GAIN 100

VCC = 12V

AV = 100

RL = 1M

VSENSE = 100mV

VRS+= 100mV

VRS+ = 12V

ISL28005

8FN6973.4

July 1, 2011

FIGURE 9. NORMALIZED VOA vs IOUT FIGURE 10. GAIN vs FREQUENCY VRS+= 100mV/12V,

VSENSE = 100mV, VOUT = 250mVP-P

FIGURE 11. NORMALIZED VOA vs IOUT FIGURE 12. GAIN vs FREQUENCY VRS+=100mV/12V,

VSENSE = 100mV, VOUT = 250mVP-P

Typical Performance Curves VCC = 12V, RL = 1M, unless otherwise specified. (Continued)

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

1µ 10µ 100µ 1m 10m

OUT

(A)

VOA PERCENT ACCURACY (%)

+25°C

-40°C

+125°C

GAIN 50

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

GAIN (dB)

-35

-25

-15

-5

VCC = 12V

AV = 100

RL = 1M

VSENSE = 100mV

GAIN 50

VRS+= 100mV

VRS+ = 12V

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

1µ 10µ 100µ 1m 10m

OUT

(A)

VOA PERCENT ACCURACY (%)

+25°C

-40°C

+125°C

GAIN 20

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

GAIN (dB)

-35

-25

-15

-5

VCC = 12V

AV = 100

RL = 1M

VSENSE = 100mV

GAIN 20

VRS+= 100mV

VRS+ = 12V

ISL28005

9FN6973.4

July 1, 2011

Applications Information

Functional Description

The ISL28005-20, ISL28005-50 and ISL28005-100 are single

supply, uni-directional current sense amplifiers with fixed gains

of 20V/V, 50V/V and 100V/V respectively.

The ISL28005 is a 2-stage amplifier. Figure 18 shows the active

circuitry for high-side current sense applications where the sense

voltage is between 1.35V to 28V. Figure 19 shows the active

circuitry for ground sense applications where the sense voltage is

between 0V to 1.35V.

The first stage is a bi-level trans-conductance amp and level

translator. The gm stage converts the low voltage drop (VSENSE)

sensed across an external milli-ohm sense resistor, to a current

(@ gm = 21.3µA/V). The trans-conductance amplifier forces a

current through R1 resulting to a voltage drop across R1 that is

equal to the sense voltage (VSENSE). The current through R1 is

mirrored across R5 creating a ground-referenced voltage at the

input of the second amplifier equal to VSENSE.

The second stage is responsible for the overall gain and

frequency response performance of the device. The fixed gains

(20, 50, 100) are set with internal resistors Rf and Rg. The only

external component needed is a current sense resistor (typically

0.001Ω to 0.01Ω, 1W to 2W).

The transfer function is given in Equation 1.

The input gm stage derives its ~2.86µA supply current from the

input source through the RS+ terminal as long as the sensed

voltage at the RS+ pin is >1.35V and the gmHI amplifier is

selected. When the sense voltage at RS+ drops below the 1.35V

threshold, the gmLO amplifier kicks in and the gmLO output

current reverses, flowing out of the RS- pin.

Test Circuits and Waveforms

FIGURE 13. IS, VOS, VOA, CMRR, PSRR, GAIN ACCURACY FIGURE 14. INPUT BIAS CURRENT, LEAKAGE CURRENT

FIGURE 15. SLEW RATE, ts, SATURATION RECOVERY TIME FIGURE 16. GAIN vs FREQUENCY

FIGURE 17. SLEW RATE

RS+

VCC

RS-

VOUT

OUT

GND

VSENSE

VRS+

1MΩ

RS+

VCC

RS-

VOUT

OUT

GND

VSENSE

VRS+

1MΩ

RS+

VCC

RS-

VOUT

OUT

GND

VRS-

VRS+

1MΩ

PULSE

GENERATOR

RS+

VCC

RS-

VOUT

OUT

GND

VSENSE

VRS+

1MΩ

SIGNAL

GENERATOR

RS+

VCC

RS-

VOUT

OUT

GND

VRS+

1MΩ

PULSE

GENERATOR

VOUT GAIN ISRSVOS

+()×=(EQ. 1)

ISL28005

10 FN6973.4

July 1, 2011

FIGURE 18. HIGH-SIDE CURRENT DETECTION

RS+

RS-

gmHI

gmLO

LOAD

VSENSE

1.35V

IMIRROR

OUT

VCC

HIGH-SIDE

SENSING

OPTIONAL

TRANSIENT

PROTECTION

OPTIONAL

FILTER

CAPACITOR

‘VSENSE

VCC = 2V to 28V

I = 2.86µA

GND

VSENSE VRS+ = 2V TO 28V

FIGURE 19. LOW-SIDE CURRENT DETECTION

RS-

gmHI

gmLO

LOAD

VSENSE

1.35V

IMIRROR

OUT

VCC

LOW-SIDE

SENSING

OPTIONAL

TRANSIENT

PROTECTION

OPTIONAL

FILTER

CAPACITOR

‘VSENSE

VCC = 2V TO 28V

I = 2.86µA

VCC

GND

VSENSE VRS+= 0V TO 2V

RS+

ISL28005

11 FN6973.4

July 1, 2011

Hysteretic Comparator

The input trans-conductance amps are under control of a

hysteretic comparator operating from the incoming source

voltage on the RS+ pin (see Figure 20). The comparator monitors

the voltage on RS+ and switches the sense amplifier from the

low-side gm amp to the high-side gm amplifier whenever the

input voltage at RS+ increases above the 1.35V threshold.

Conversely, a decreasing voltage on the RS+ pin, causes the

hysteric comparator to switch from the high-side gm amp to the

low-side gm amp as the voltage decreases below 1.35V. It is that

low-side sense gm amplifier that gives the ISL28005 the

proprietary ability to sense current all the way to 0V. Negative

voltages on the RS+ or RS- are beyond the sensing voltage range

of this amplifier.

Typical Application Circuit

Figure 22 shows the basic application circuit and optional

protection components for switched-load applications. For

applications where the load and the power source is permanently

connected, only an external sense resistor is needed. For

applications where fast transients are caused by hot plugging the

source or load, external protection components may be needed.

The external current limiting resistor (RP) in Figure 22 may be

required to limit the peak current through the internal ESD

diodes to < 20mA. This condition can occur in applications that

experience high levels of in-rush current causing high peak

voltages that can damage the internal ESD diodes. An RP resistor

value of 100Ω will provide protection for a 2V transient with the

maximum of 20mA flowing through the input while adding only

an additional 13µV (worse case over-temperature) of VOS. Refer

to the following formula:

((RP x IRS-) = (100Ω x 130nA) = 13µV)

Switching applications can generate voltage spikes that can

overdrive the amplifier input and drive the output of the amplifier

into the rails, resulting in a long overload recovery time.

Capacitors CM and CD filter the common mode and differential

voltage spikes.

Error Sources

There are 3 dominant error sources: gain error, input offset

voltage error and Kelvin voltage error (see Figure 21). The gain

error is dominated by the internal resistance matching

tolerances. The remaining errors appear as sense voltage errors

at the input to the amplifier. They are VOS of the amplifier and

Kelvin voltage errors. If the transient protection resistor is added,

an additional VOS error can result from the IxR voltage due to

input bias current. The limiting resistor should only be added to

the RS- input, due to the high-side gm amplifier (gmHI) sinking

several micro amps of current through the RS+ pin.

Layout Guidelines

Kelvin Connected Sense Resistor

The source of Kelvin voltage errors is illustrated in Figure 21. The

resistance of 1/2 oz. copper is ~1mΩ per square with a TC of

~3900ppm/°C (0.39%/°C). When you compare this unwanted

parasitic resistance with the total of 1mΩ to 10mΩ resistance of

the sense resistor, it is easy to see why the sense connection

must be chosen very carefully. For example, consider a

maximum current of 20A through a 0.005Ω sense resistor,

generating a VSENSE = 0.1 and a full scale output voltage of 10V

(G = 100). Two side contacts of only 0.25 square per contact puts

the VSENSE input about 0.5 x 1mΩ away from the resistor end

capacitor. If only 10A the 20A total current flows through the

kelvin path to the resistor, you get an error voltage of 10mV

(10A x 0.5sq x 0.001Ω/sq. = 10mV) added to the 100mV sense

voltage for a sense voltage error of 10% (0.110V - 0.1)/0.1V) x

100.

FIGURE 20. GAIN ACCURACY vs VRS+ = 0V TO 2V

VRS+ (V)

-0.5

-0.4

-0.3

-0.2

-0.1

0.1

0.2

0.3

0.4

0.5

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

ACCURACY (%)

FIGURE 21. PC BOARD CURRENT SENSE KELVIN CONNECTION

PC Board

Non-uniform

Current Flow

Current Sense Resistor

1 to 10mO

Current In Current Out

Kelvin VSContacts

Copper Trace

30mO/Sq.

PC Board

Non-uniform

Current Flow

Current Sense Resistor

1 to 10mO

Current In Current Out

Kelvin VSContacts

Copper Trace

30mO/Sq.

CURRENT SENSE RESISTOR

1mΩ TO 10mΩ1mΩ /SQ

CURRENT OUT

CURRENT IN

NON-UNIFORM

CURRENT FLOW

PC BOARD

KELVIN VS CONTACTS

1/2 Oz COPPER TRACE

ISL28005

12 FN6973.4

July 1, 2011

Overall Accuracy (VOA %)

VOA is defined as the total output accuracy Referred-to-Output

(RTO). The output accuracy contains all offset and gain errors, at

a single output voltage. Equation 2 is used to calculate the %

total output accuracy.

where

VOUT Actual = VSENSE x GAIN

Example: Gain = 100, For 100mV VSENSE input we measure

10.1V. The overall accuracy (VOA) is 1% as shown in Equation 3.

Power Dissipation

It is possible to exceed the +150°C maximum junction

temperatures under certain load and power supply conditions. It

is therefore important to calculate the maximum junction

temperature (TJMAX) for all applications to determine if power

supply voltages, load conditions, or package type need to be

modified to remain in the safe operating area. These parameters

are related using Equation 4:

where:

•P

DMAXTOTAL is the sum of the maximum power dissipation of

each amplifier in the package (PDMAX)

•PD

MAX for each amplifier can be calculated using Equation 5:

where:

•T

MAX = Maximum ambient temperature

•θJA = Thermal resistance of the package

•PD

MAX = Maximum power dissipation of 1 amplifier

•V

CC = Total supply voltage

•I

qMAX = Maximum quiescent supply current of 1 amplifier

•V

OUTMAX = Maximum output voltage swing of the application

•R

L = Load resistance

FIGURE 22. TYPICAL APPLICATION CIRCUIT

gmHI

gmLO

1.35V

OUT

VCC

I = 2.86µA

GND

RS-

(1mΩ

0.1Ω)

0.1VDC

28VDC

LOAD

2.7VDC

28VDC

RS+

VOA 100

VOUTactual VOUT ectedexp–

VOUT ectedexp

------------------------------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

×=(EQ. 2)

(EQ. 3)

VOA 100 10.1 10–

-------------------------

⎝⎠

⎛⎞

×1percent==

TJMAX TMAX θJAxPDMAXTOTAL

+= (EQ. 4)

PDMAX VSIqMAX VS

( - VOUTMAX)VOUTMAX

------------------------

×+×=(EQ. 5)

ISL28005

Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted

in the quality certifications found at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time

without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be

accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6973.4

July 1, 2011

For additional products, see www.intersil.com/product_tree

Products

Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products

address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.

Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a

complete list of Intersil product families.

*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page

on intersil.com: ISL28005

To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff

FITs are available from our website at http://rel.intersil.com/reports/search.php

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make

sure you have the latest Rev.

DATE REVISION CHANGE

4/11/11 FN6973.4 Corrected location of the load in Figure 19. Moved Load from the ground side of the input sense circuit to the high side of the

voltage source

Updated note in Min Max column of spec table from "Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless

otherwise specified. Temperature limits established by characterization and are not production tested." to "Compliance to

datasheet limits is assured by one or more methods: production test, characterization and/or design."

9/2/10 FN6973.3 Added -T7A tape and reel package options to Ordering Information Table for all packages.

5/12/10 FN6973.2 Added Note 4 to Part Marking Column in “Ordering Information” on page 3.

Corrected hyperlinks in Notes 1 and 3 in “Ordering Information” on page 3.

Corrected ISL28005 hyperlink in “Products” on page 13.

4/12/10 Added Eval boards to ordering info.

4/7/10 Added “Related Literature” on page 1

Updated Package Drawing Number in the “Ordering Information” on page 3 from MDP0038 to P50.64A.

Revised package outline drawing from MDP0038 to P5.064A on page 14. MDP0038 package contained 2 packages for both

the 5 and 6 Ld SOT-23. MDP0038 was obsoleted and the packages were separated and made into 2 separate package outline

drawings; P5.064A and P6.064A. Changes to the 5 Ld SOT-23 were to move dimensions from table onto drawing, add land

pattern and add JEDEC reference number.

2/3/10 FN6973.1 -Page1:

Edited last sentence of paragraph 2.

Moved order of GAIN listings from 20, 50, 100 to 100, 50, 20 in the 3rd paragraph.

Under Features ....removed "Low Input Offset Voltage 250µV,max"

Under Features .... moved order of parts listing from 20, 50, 100 (from top to bottom) to 100, 50, 20.

-Page 3:

Removed coming soon on ISL28005FH50Z and ISL28005FH20Z and changes the order or listing them to 100, 50, 20.

-Page 5:

VOA test. Under conditions column ...deleted “20mV to”. It now reads ... Vsense = 100mV

SR test. Under conditions column ..deleted what was there. It now reads ... Pulse on RS+pin, See Figure 17

-Page 6:

ts test. Removed Gain = 100 and Gain = 100V/V in both description and conditions columns respectively.

-Page 9

Added Figure 17 and adjusted figure numbers to account for the added figure.

12/14/09 FN6973.0 Initial Release

ISL28005

14 FN6973.4

July 1, 2011

Package Outline Drawing

P5.064A

5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE

Rev 0, 2/10

Dimension is exclusive of mold flash, protrusions or gate burrs.

This dimension is measured at Datum “H”.

Package conforms to JEDEC MO-178AA.

Foot length is measured at reference to guage plane.

Dimensions in ( ) for Reference Only.

Dimensioning and tolerancing conform to ASME Y14.5M-1994.

Dimensions are in millimeters.1.

NOTES:

DETAIL "X"

SIDE VIEW

TYPICAL RECOMMENDED LAND PATTERN

TOP VIEW

INDEX AREA

PIN 1

SEATING PLANE

GAUGE

0.45±0.1

(2 PLCS)

10° TYP

1.90

0.40 ±0.05

2.90

0.95

1.60

2.80

0.05-0.15

1.14 ±0.15

0.20 CA-B DM

(1.20)

(0.60)

(0.95)

(2.40)

0.10 C

0.08-0.20

SEE DETAIL X

1.45 MAX

(0.60)

0-3°

0.20 C

(1.90)

0.15 C

A-B

(0.25)

END VIEW

PLANE