HA19211BP/BNT/BMP High-Speed, Low-Power 8-bit A/D Flash Converter November 1996 Description The HA19211BP/BNT/BMP high-speed, low-power 8-bit A/D flash converters require no sampling and holding circuits. The digital outputs and clock inputs of these monolithic bipolar ICs are fully TTL/CMOS compatible. These devices are suitable for high-speed image processing applications such as video signal digitization. Features * * * * * * 8-bit resolution (with overflow) Low power consumption (250 mW Typ) High conversion rate (20 Msps Min) Single power supply operation: +5 V Built-in output latch circuit TTL/CMOS compatible digital outputs and clock inputs Applications * Digital TV/VCR * Industrial pattern recognition equipment * High-speed measuring devices Ordering Information Type No. Package HA19211BP 600mil 28-pin plastic DIP (DP-28) HA19211BNT 400mil 30-pin plastic shrink DIP (DP-30S) HA19211BMP 44-pin plastic QFI (MP-44) HA19211BP/BNT/BMP Pin Arrangement 30 ISET NC 2 29 VIN CLK 3 28 NC VRM 4 27 NC GND 5 26 GND VCC 6 25 VCC NC 7 24 OF NC 8 23 NC VRB 9 22 VRT VCC 10 21 VCC GND 11 20 GND B8 12 19 B1 B7 13 18 B2 B6 14 17 B3 B5 15 16 B4 GND VCC NC NC NC NC NC NC NC VRB VCC GND 5 4 3 2 1 6 7 8 9 10 11 12 13 14 15 16 17 1819202122 ISET VIN NC NC NC 1 4443424140 39 38 37 36 35 34 33 32 31 30 29 28 2324252627 NC B4 B3 B2 B1 CLK VRM NC CLK CLK NC * HA19211BMP B8 B7 B6 B5 NC * HA19211BNT (Top View) (Top View) * HA19211BP NC 1 28 ISET CLK 2 27 VIN CLK 3 26 NC VRM 4 25 NC GND 5 24 GND VCC 6 23 VCC NC 7 22 OF VRB 8 21 VRT VCC 9 20 VCC GND 10 19 GND B8 11 18 B1 B7 12 17 B2 B6 13 16 B3 B5 14 15 B4 (Top View) 2 NC GND VCC OF NC NC NC NC NC VRT VCC GND HA19211BP/BNT/BMP Pin Descriptions HA19211BP, HA19211BMP Pin No. Symbol Function 1 (1) NC No Connected 2 (2) CLK Inverted clock input 3 (3) CLK Clock input 4 (5) VRM Reference voltage compensation input 5 (6) GND Ground 6 (7) VCC Power supply (+5 V) 7 (8) NC No Connected 8 (15) VRB Low-level reference voltage input 9 (16) VCC Power supply (+5 V) 10 (17) GND Ground 11 (18) B8 Digital output (MSB) 12 (19) B7 Digital output 13 (20) B6 Digital output 14 (21) B5 Digital output 15 (24) B4 Digital output 16 (25) B3 Digital output 17 (26) B2 Digital output 18 (27) B1 Digital output (LSB) 19 (28) GND Ground 20 (29) VCC Power Supply (+5 V) 21 (30) VRT High-level reference voltage input 22 (36) OF Overflow output 23 (37) VCC Power supply (+5 V) 24 (38) GND Ground 25 (39) NC No connected 26 (40) NC No connected 27 (43) VIN Analog input 28 (44) I SET Output current setting input Note: Pin numbers in parentheses are for the HA19211BMP. For this chip pins 4, 9 to 14, 22, 23, 31 to 35, 41 and 42 are no connected. 3 HA19211BP/BNT/BMP HA19211BNT Pin No. Symbol Function 1 CLK Inverted clock input 2 NC No connected 3 CLK Clock input 4 VRM Reference voltage compensation input 5 GND Ground 6 VCC Power supply (+5 V) 7 NC No connected 8 NC No connected 9 VRB Low-level reference voltage input 10 VCC Power supply (+5 V) 11 GND Ground 12 B8 Digital output (MSB) 13 B7 Digital output 14 B6 Digital output 15 B5 Digital output 16 B4 Digital output 17 B3 Digital output 18 B2 Digital output 19 B1 Digital output (LSB) 20 GND Ground 21 VCC Power supply (+5 V) 22 VRT High-level reference voltage input 23 NC No connected 24 OF Digital output (overflow) 25 VCC Power supply (+5 V) 26 GND Ground 27 NC No connected 28 NC No connected 29 VIN Analog input 30 I SET Output current setting input 4 HA19211BP/BNT/BMP Block Diagram CLK CLK Vcc x 4 Clock Driver I SET Vcc V IN V RT OF 6-bit Latch 256 B8 B7 255 6-bit Latch V RM 128 256 to 6-bit x 4 Encoder 6-bit Latch V RB Comparator & Latch B6 B5 B4 B3 2 1 6-bit x 4 to 8-bit Encoder & Output Buffer 6-bit Latch B2 B1 GND GND x 4 5 HA19211BP/BNT/BMP Absolute Maximum Ratings ( Ta = 25C unless otherwise specified) Parameter Symbol Rating Unit VCC +7.0 V VIN 0 to V CC - 0.9 V VR 0 to V CC - 0.9 V VCLK 0 to V CC V Power dissipation PT 800 mW Operating temperature Topr -20 to +85 C Storage temperature Tstg -55 to +125 C Reference voltage difference VRT - VRB 2.1 V Output current setting I SET(max) 5 mA Reference center tap voltage VRM Open state voltage 0.1 V Power supply voltage Analog Input voltage* Reference voltage* 1 1 Clock input voltage* 2 Notes: 1. VIN and VR should never be below 1.2 V at the same time. 2. VCLK and VCLK should never be below 1.5 V at the same time. 6 HA19211BP/BNT/BMP Electrical Characteristics (Ta = 25C, V CC = 5 V, VRT = 3.5 V, VRB = 1.5 V, unless otherwise specified) Item Symbol Resolution Min Typ Max Unit 8 8 8 bits Power supply voltage VCC 4.75 5.0 5.25 V Power supply current I CC -- 50 75 mA Test conditions VCC = 5.0 V, fCLK = 20 Msps, I SET = 0 mA Reference current (+) I RT -- 11 14.5 mA Reference current (-) I RB -14.5 -11 -- mA Input current I IN -- 70 200 A VIN = 4.1 V Input capacitance CIN -- 40 -- pF f IN = 1 MHz, VRB < VIN < VRT Digital output high voltage VOH1 4.0 4.2 -- V I OH = -400 A, ISET = 0 mA VOH2 3.5 3.8 -- V I OH = -5 mA, ISET = 0 mA Digital output low voltage VOL -- 0.6 0.70 V I OL = 400 A, ISET = 2 mA Clock input current II -400 -- 400 A VCLK : 0.4 V to 2.7 V Clock input high voltage VIH 2.0 -- VCC V Clock input low voltage VIL 0 -- 0.8 V Static linearity Differential D.N.L -0.5 -- 0.5 LSB Error I.N.L -- -- 2.0 LSBP-P Maximum conversion rate f CLK 20 -- -- Msps f IN = 3.58 MHz Differential gain DG -- 1.0 -- % f CLK = 20 Msps, NTSC, Differential phase DP -- 0.5 -- deg 40 IRE UNLOCKED Clock pulse width t WH 25 30 -- ns f CLK = 20 Msps t WL 15 20 -- ns I SET = 5 mA Digital output delay time t PD -- 35 46 ns Digital output hold time t HOLD 5 10 -- ns Integral 7 HA19211BP/BNT/BMP Output Code Table Input voltage OF B8 B7 VRB 0 0 VRB +1LSB 0 VRB + 2LSB B2 B1 0 0 0 0 0 0 1 0 0 0 1 0 VRB +127LSB 0 0 1 1 1 VRB +128LSB 0 1 0 0 0 VRT - 2LSB 0 1 1 1 0 VRT -1LSB 0 1 1 1 1 VRT 1 1 1 1 1 8 ... + 1.5 V + 3.5 V + + V RB V RM V RT V IN 1 2 128 255 256 Clock Driver CLK Comparator & Latch CLK 256 to 6-bit x 4 Encoder GND 6-bit Latch 6-bit Latch 6-bit Latch 6-bit Latch Vcc Vcc 6-bit x 4 to 8-bit Encoder & Output Buffer I SET B1 B2 B3 B4 B5 B6 B7 B8 OF 10 F 1,000 p Latch CLK HD74HC374 Output voltage resistance 1 k - 2 k + LSB MSB OF HA19211BP/BNT/BMP Application Example 9 HA19211BP/BNT/BMP Timing Chart N+2 N V in CLK N+1 N+3 t WL t WH N Undefined N+1 Sampling Latch Comparator operating mode Interstep latch operating mode 10 Through t PD t HOLD Undefined Through Latch N+3 Sampling Latch N+1 Latch N+2 Sampling Latch N Digital output Undefined Latch N+2 Through Latch N+3 Through HA19211BP/BNT/BMP When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi's permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user's unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi's semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. 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