HA19211BP/BNT/BMP
High-Speed, Low-Power 8-bit A/D Flash Converter
November 1996
Description
The HA19211BP/BNT/BMP high-speed, low-power 8-bit A/D flash converters require no sampling and
holding circuits. The digital outputs and clock inputs of these monolithic bipolar ICs are fully TTL/CMOS
compatible.
These devices are suitable for high-speed image processing applications such as video signal digitization.
Features
8-bit resolution (with overflow)
Low power consumption (250 mW Typ)
High conversion rate (20 Msps Min)
Single power supply operation: +5 V
Built-in output latch circuit
TTL/CMOS compatible digital outputs and clock inputs
Applications
Digital TV/VCR
Industrial pattern recognition equipment
High-speed measuring devices
Ordering Information
Type No. Package
HA19211BP 600mil 28-pin plastic DIP (DP-28)
HA19211BNT 400mil 30-pin plastic shrink DIP (DP-30S)
HA19211BMP 44-pin plastic QFI (MP-44)
HA19211BP/BNT/BMP
2
Pin Arrangement
ISET
VIN
NC
NC
GND
VCC
OF
NC
VRT
VCC
GND
B1
B2
B3
B4
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CLK
NC
CLK
VRM
GND
VCC
NC
NC
VRB
VCC
GND
B8
B7
B6
B5
(Top View)
(Top View)
(Top View)
• HA19211BNT
• HA19211BP
• HA19211BMP
39
38
37
36
35
34
33
32
31
30
29
28
NC
GND
VCC
OF
NC
NC
NC
NC
NC
VRT
VCC
GND
GND
VCC
NC
NC
NC
NC
NC
NC
NC
VRB
VCC
GND
6
7
8
9
10
11
12
13
14
15
16
17
VRM
NC
CLK
CLK
NC
ISET
VIN
NC
NC
NC
5 4 3 2 1 4443424140
1819202122 2324252627
B8
B7
B6
B5
NC
NC
B4
B3
B2
B1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NC
CLK
CLK
VRM
GND
VCC
NC
VRB
VCC
GND
B8
B7
B6
B5
ISET
VIN
NC
NC
GND
VCC
OF
VRT
VCC
GND
B1
B2
B3
B4
HA19211BP/BNT/BMP
3
Pin Descriptions
HA19211BP, HA19211BMP
Pin No. Symbol Function
1 (1) NC No Connected
2 (2) CLK Inverted clock input
3 (3) CLK Clock input
4 (5) VRM Reference voltage compensation input
5 (6) GND Ground
6 (7) VCC Power supply (+5 V)
7 (8) NC No Connected
8 (15) VRB Low-level reference voltage input
9 (16) VCC Power supply (+5 V)
10 (17) GND Ground
11 (18) B8 Digital output (MSB)
12 (19) B7 Digital output
13 (20) B6 Digital output
14 (21) B5 Digital output
15 (24) B4 Digital output
16 (25) B3 Digital output
17 (26) B2 Digital output
18 (27) B1 Digital output (LSB)
19 (28) GND Ground
20 (29) VCC Power Supply (+5 V)
21 (30) VRT High-level reference voltage input
22 (36) OF Overflow output
23 (37) VCC Power supply (+5 V)
24 (38) GND Ground
25 (39) NC No connected
26 (40) NC No connected
27 (43) VIN Analog input
28 (44) ISET Output current setting input
Note: Pin numbers in parentheses are for the HA19211BMP. For this chip pins 4, 9 to 14, 22, 23, 31 to 35,
41 and 42 are no connected.
HA19211BP/BNT/BMP
4
HA19211BNT
Pin No. Symbol Function
1CLK Inverted clock input
2 NC No connected
3 CLK Clock input
4V
RM Reference voltage compensation input
5 GND Ground
6V
CC Power supply (+5 V)
7 NC No connected
8 NC No connected
9V
RB Low-level reference voltage input
10 VCC Power supply (+5 V)
11 GND Ground
12 B8 Digital output (MSB)
13 B7 Digital output
14 B6 Digital output
15 B5 Digital output
16 B4 Digital output
17 B3 Digital output
18 B2 Digital output
19 B1 Digital output (LSB)
20 GND Ground
21 VCC Power supply (+5 V)
22 VRT High-level reference voltage input
23 NC No connected
24 OF Digital output (overflow)
25 VCC Power supply (+5 V)
26 GND Ground
27 NC No connected
28 NC No connected
29 VIN Analog input
30 ISET Output current setting input
HA19211BP/BNT/BMP
5
Block Diagram
OF
B8
B7
B6
B5
B4
B3
B2
B1
GND
GND 4×
Comparator
& Latch
1
2
128
255
256
Clock
Driver
CLK CLK
6-bit
Latch
6-bit
Latch
6-bit
Latch
6-bit
Latch
Vcc ×4SETI
VIN
VRT
VRM
VRB
6-bit 4
to 8-bit
Encoder
&
Output
Buffer
×
256 to
6-bit 4
Encoder
×
Vcc
HA19211BP/BNT/BMP
6
Absolute Maximum Ratings ( Ta = 25°C unless otherwise specified)
Parameter Symbol Rating Unit
Power supply voltage VCC +7.0 V
Analog Input voltage*1VIN 0 to VCC – 0.9 V
Reference voltage*1VR0 to VCC – 0.9 V
Clock input voltage*2VCLK 0 to VCC V
Power dissipation PT800 mW
Operating temperature Topr –20 to +85 °C
Storage temperature Tstg –55 to +125 °C
Reference voltage difference VRT – VRB 2.1 V
Output current setting ISET(max) 5mA
Reference center tap voltage VRM Open state
voltage ±0.1 V
Notes: 1. VIN and VR should never be below 1.2 V at the same time.
2. VCLK and VCLK should never be below 1.5 V at the same time.
HA19211BP/BNT/BMP
7
Electrical Characteristics (Ta = 25°C, VCC = 5 V, VRT = 3.5 V, VRB = 1.5 V, unless
otherwise specified)
Item Symbol Min Typ Max Unit Test conditions
Resolution 8 8 8 bits
Power supply voltage VCC 4.75 5.0 5.25 V
Power supply current ICC —5075mAV
CC = 5.0 V, fCLK = 20 Msps,
ISET = 0 mA
Reference current (+) IRT 11 14.5 mA
Reference current (–) IRB –14.5 –11 mA
Input current IIN 70 200 µAV
IN = 4.1 V
Input capacitance CIN 40 pF fIN = 1 MHz, VRB < VIN < VRT
Digital output high voltage VOH1 4.0 4.2 V IOH = –400 µA, ISET = 0 mA
VOH2 3.5 3.8 V IOH = –5 mA, ISET = 0 mA
Digital output low voltage VOL 0.6 0.70 V IOL = 400 µA, ISET = 2 mA
Clock input current II–400 400 µAV
CLK: 0.4 V to 2.7 V
Clock input high voltage VIH 2.0 VCC V
Clock input low voltage VIL 0 0.8 V
Static linearity Differential D.N.L –0.5 0.5 LSB
Error Integral I.N.L 2.0 LSBP-P
Maximum conversion rate fCLK 20 Msps fIN = 3.58 MHz
Differential gain DG 1.0 % fCLK = 20 Msps, NTSC,
Differential phase DP 0.5 deg 40 IRE UNLOCKED
Clock pulse width tWH 25 30 ns fCLK = 20 Msps
tWL 15 20 ns ISET = 5 mA
Digital output delay time tPD —3546ns
Digital output hold time tHOLD 510ns
HA19211BP/BNT/BMP
8
Output Code Table
Input voltage OF B8 B7 ... B2 B1
VRB 000 00
V
RB +1LSB 0 0 0 0 1
VRB + 2LSB 0 0 0 1 0
VRB +127LSB 0 0 1 1 1
VRB +128LSB 0 1 0 0 0
VRT – 2LSB 0 1 1 1 0
VRT –1LSB 0 1 1 1 1
VRT 111 11
HA19211BP/BNT/BMP
9
Application Example
OF
B8
B7
B6
B5
B4
B3
B2
B1
GNDComparator
& Latch
1
2
128
255
256
Clock
Driver
CLK
6-bit
Latch
6-bit
Latch
6-bit
Latch
6-bit
Latch
SETI
VIN
VRT
VRM
VRB
6-bit 4
to 8-bit
Encoder
&
Output
Buffer
×
256 to
6-bit 4
Encoder
×
+
+
CLK
Vcc
Vcc
+ 3.5 V
+ 1.5 V
Latch
CLK
HD74HC374
LSB
MSB
OF
Output voltage resistance
1 k – 2 k
+
10 µF 1,000 p
HA19211BP/BNT/BMP
10
Timing Chart
V in
WH
CLK
Comparator
operating mode
Digital output
Interstep latch
operating mode
tWLt
N
N + 1
N + 2
N + 3
N Undefined N + 1 Undefined N + 2 Undefined N + 3
Sampling Sampling Sampling
Latch Latch Latch Latch
N N + 1 N + 2 N + 3
Latch Latch LatchThrough Through Through Through
PDtHOLDt
HA19211BP/BNT/BMP
11
When using this document, keep the following in mind:
1. This document may, wholly or partially, be subject to change without notice.
2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of
this document without Hitachi’s permission.
3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any
other reasons during operation of the user’s unit according to this document.
4. Circuitry and other examples described herein are meant merely to indicate the characteristics and
performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for any intellectual
property claims or other problems that may result from applications based on the examples described
herein.
5. No license is granted by implication or otherwise under any patents or other rights of any third party or
Hitachi, Ltd.
6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL
APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales company.
Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi’s products are
requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL
APPLICATIONS.
Hitachi, Ltd.
Semiconductor & IC Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100, Japan
Tel: Tokyo (03) 3270-2111
Fax: (03) 3270-5109
For further information write to:
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U S A
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